David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * linux/arch/arm/common/time-acorn.c |
| 4 | * |
| 5 | * Copyright (c) 1996-2000 Russell King. |
| 6 | * |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 7 | * Changelog: |
| 8 | * 24-Sep-1996 RMK Created |
| 9 | * 10-Oct-1996 RMK Brought up to date with arch-sa110eval |
| 10 | * 04-Dec-1997 RMK Updated for new arch/arm/time.c |
| 11 | * 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500 |
| 12 | */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 13 | #include <linux/clocksource.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 14 | #include <linux/init.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <linux/io.h> |
| 18 | |
| 19 | #include <mach/hardware.h> |
| 20 | #include <asm/hardware/ioc.h> |
| 21 | |
| 22 | #include <asm/mach/time.h> |
| 23 | |
| 24 | #define RPC_CLOCK_FREQ 2000000 |
| 25 | #define RPC_LATCH DIV_ROUND_CLOSEST(RPC_CLOCK_FREQ, HZ) |
| 26 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 27 | static u32 ioc_time; |
| 28 | |
| 29 | static u64 ioc_timer_read(struct clocksource *cs) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 30 | { |
| 31 | unsigned int count1, count2, status; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 32 | unsigned long flags; |
| 33 | u32 ticks; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 34 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 35 | local_irq_save(flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 36 | ioc_writeb (0, IOC_T0LATCH); |
| 37 | barrier (); |
| 38 | count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); |
| 39 | barrier (); |
| 40 | status = ioc_readb(IOC_IRQREQA); |
| 41 | barrier (); |
| 42 | ioc_writeb (0, IOC_T0LATCH); |
| 43 | barrier (); |
| 44 | count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 45 | ticks = ioc_time + RPC_LATCH - count2; |
| 46 | local_irq_restore(flags); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 47 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 48 | if (count2 < count1) { |
| 49 | /* |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 50 | * The timer has not reloaded between reading count1 and |
| 51 | * count2, check whether an interrupt was actually pending. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 52 | */ |
| 53 | if (status & (1 << 5)) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 54 | ticks += RPC_LATCH; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 55 | } else if (count2 > count1) { |
| 56 | /* |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 57 | * The timer has reloaded, so count2 indicates the new |
| 58 | * count since the wrap. The interrupt would not have |
| 59 | * been processed, so add the missed ticks. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 60 | */ |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 61 | ticks += RPC_LATCH; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 62 | } |
| 63 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 64 | return ticks; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 65 | } |
| 66 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 67 | static struct clocksource ioctime_clocksource = { |
| 68 | .read = ioc_timer_read, |
| 69 | .mask = CLOCKSOURCE_MASK(32), |
| 70 | .rating = 100, |
| 71 | }; |
| 72 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 73 | void __init ioctime_init(void) |
| 74 | { |
| 75 | ioc_writeb(RPC_LATCH & 255, IOC_T0LTCHL); |
| 76 | ioc_writeb(RPC_LATCH >> 8, IOC_T0LTCHH); |
| 77 | ioc_writeb(0, IOC_T0GO); |
| 78 | } |
| 79 | |
| 80 | static irqreturn_t |
| 81 | ioc_timer_interrupt(int irq, void *dev_id) |
| 82 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 83 | ioc_time += RPC_LATCH; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 84 | timer_tick(); |
| 85 | return IRQ_HANDLED; |
| 86 | } |
| 87 | |
| 88 | static struct irqaction ioc_timer_irq = { |
| 89 | .name = "timer", |
| 90 | .handler = ioc_timer_interrupt |
| 91 | }; |
| 92 | |
| 93 | /* |
| 94 | * Set up timer interrupt. |
| 95 | */ |
| 96 | void __init ioc_timer_init(void) |
| 97 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 98 | WARN_ON(clocksource_register_hz(&ioctime_clocksource, RPC_CLOCK_FREQ)); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 99 | ioctime_init(); |
| 100 | setup_irq(IRQ_TIMER0, &ioc_timer_irq); |
| 101 | } |