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review.trustedfirmware.org / hafnium / third_party / linux.git / 0f672f6c0b52b7b0700b0915c72b540721af4465 / . / arch / arm / mach-omap2 / sram.h
blob: 447bd3eed0fd30e11c1c008b888773ea6326b60d [file] [log] [blame]
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame^]1/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]2/*
3 * Interface for functions that need to be run in internal SRAM
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]4 */
5
6#ifndef __ASSEMBLY__
7#include <plat/sram.h>
8
9extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
10 u32 base_cs, u32 force_unlock);
11extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
12 u32 mem_type);
13extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
14
15extern void omap3_sram_restore_context(void);
16
17/* Do not use these */
18extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
19extern unsigned long omap24xx_sram_reprogram_clock_sz;
20
21extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
22 u32 base_cs, u32 force_unlock);
23extern unsigned long omap242x_sram_ddr_init_sz;
24
25extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
26 int bypass);
27extern unsigned long omap242x_sram_set_prcm_sz;
28
29extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
30 u32 mem_type);
31extern unsigned long omap242x_sram_reprogram_sdrc_sz;
32
33
34extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
35 u32 base_cs, u32 force_unlock);
36extern unsigned long omap243x_sram_ddr_init_sz;
37
38extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
39 int bypass);
40extern unsigned long omap243x_sram_set_prcm_sz;
41
42extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
43 u32 mem_type);
44extern unsigned long omap243x_sram_reprogram_sdrc_sz;
45
46#ifdef CONFIG_PM
47extern void omap_push_sram_idle(void);
48#else
49static inline void omap_push_sram_idle(void) {}
50#endif /* CONFIG_PM */
51
52#endif /* __ASSEMBLY__ */
53
54/*
55 * OMAP2+: define the SRAM PA addresses.
56 * Used by the SRAM management code and the idle sleep code.
57 */
58#define OMAP2_SRAM_PA 0x40200000
59#define OMAP3_SRAM_PA 0x40200000