David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * linux/arch/arm/mach-omap1/devices.c |
| 4 | * |
| 5 | * OMAP1 platform device setup/initialization |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <linux/dma-mapping.h> |
| 9 | #include <linux/gpio.h> |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/spi/spi.h> |
| 15 | |
| 16 | #include <linux/platform_data/omap-wd-timer.h> |
| 17 | |
| 18 | #include <asm/mach/map.h> |
| 19 | |
| 20 | #include <mach/tc.h> |
| 21 | #include <mach/mux.h> |
| 22 | |
| 23 | #include <mach/omap7xx.h> |
| 24 | #include "camera.h" |
| 25 | #include <mach/hardware.h> |
| 26 | |
| 27 | #include "common.h" |
| 28 | #include "clock.h" |
| 29 | #include "mmc.h" |
| 30 | #include "sram.h" |
| 31 | |
| 32 | #if IS_ENABLED(CONFIG_RTC_DRV_OMAP) |
| 33 | |
| 34 | #define OMAP_RTC_BASE 0xfffb4800 |
| 35 | |
| 36 | static struct resource rtc_resources[] = { |
| 37 | { |
| 38 | .start = OMAP_RTC_BASE, |
| 39 | .end = OMAP_RTC_BASE + 0x5f, |
| 40 | .flags = IORESOURCE_MEM, |
| 41 | }, |
| 42 | { |
| 43 | .start = INT_RTC_TIMER, |
| 44 | .flags = IORESOURCE_IRQ, |
| 45 | }, |
| 46 | { |
| 47 | .start = INT_RTC_ALARM, |
| 48 | .flags = IORESOURCE_IRQ, |
| 49 | }, |
| 50 | }; |
| 51 | |
| 52 | static struct platform_device omap_rtc_device = { |
| 53 | .name = "omap_rtc", |
| 54 | .id = -1, |
| 55 | .num_resources = ARRAY_SIZE(rtc_resources), |
| 56 | .resource = rtc_resources, |
| 57 | }; |
| 58 | |
| 59 | static void omap_init_rtc(void) |
| 60 | { |
| 61 | (void) platform_device_register(&omap_rtc_device); |
| 62 | } |
| 63 | #else |
| 64 | static inline void omap_init_rtc(void) {} |
| 65 | #endif |
| 66 | |
| 67 | static inline void omap_init_mbox(void) { } |
| 68 | |
| 69 | /*-------------------------------------------------------------------------*/ |
| 70 | |
| 71 | #if IS_ENABLED(CONFIG_MMC_OMAP) |
| 72 | |
| 73 | static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, |
| 74 | int controller_nr) |
| 75 | { |
| 76 | if (controller_nr == 0) { |
| 77 | if (cpu_is_omap7xx()) { |
| 78 | omap_cfg_reg(MMC_7XX_CMD); |
| 79 | omap_cfg_reg(MMC_7XX_CLK); |
| 80 | omap_cfg_reg(MMC_7XX_DAT0); |
| 81 | } else { |
| 82 | omap_cfg_reg(MMC_CMD); |
| 83 | omap_cfg_reg(MMC_CLK); |
| 84 | omap_cfg_reg(MMC_DAT0); |
| 85 | } |
| 86 | |
| 87 | if (cpu_is_omap1710()) { |
| 88 | omap_cfg_reg(M15_1710_MMC_CLKI); |
| 89 | omap_cfg_reg(P19_1710_MMC_CMDDIR); |
| 90 | omap_cfg_reg(P20_1710_MMC_DATDIR0); |
| 91 | } |
| 92 | if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) { |
| 93 | omap_cfg_reg(MMC_DAT1); |
| 94 | /* NOTE: DAT2 can be on W10 (here) or M15 */ |
| 95 | if (!mmc_controller->slots[0].nomux) |
| 96 | omap_cfg_reg(MMC_DAT2); |
| 97 | omap_cfg_reg(MMC_DAT3); |
| 98 | } |
| 99 | } |
| 100 | |
| 101 | /* Block 2 is on newer chips, and has many pinout options */ |
| 102 | if (cpu_is_omap16xx() && controller_nr == 1) { |
| 103 | if (!mmc_controller->slots[1].nomux) { |
| 104 | omap_cfg_reg(Y8_1610_MMC2_CMD); |
| 105 | omap_cfg_reg(Y10_1610_MMC2_CLK); |
| 106 | omap_cfg_reg(R18_1610_MMC2_CLKIN); |
| 107 | omap_cfg_reg(W8_1610_MMC2_DAT0); |
| 108 | if (mmc_controller->slots[1].wires == 4) { |
| 109 | omap_cfg_reg(V8_1610_MMC2_DAT1); |
| 110 | omap_cfg_reg(W15_1610_MMC2_DAT2); |
| 111 | omap_cfg_reg(R10_1610_MMC2_DAT3); |
| 112 | } |
| 113 | |
| 114 | /* These are needed for the level shifter */ |
| 115 | omap_cfg_reg(V9_1610_MMC2_CMDDIR); |
| 116 | omap_cfg_reg(V5_1610_MMC2_DATDIR0); |
| 117 | omap_cfg_reg(W19_1610_MMC2_DATDIR1); |
| 118 | } |
| 119 | |
| 120 | /* Feedback clock must be set on OMAP-1710 MMC2 */ |
| 121 | if (cpu_is_omap1710()) |
| 122 | omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), |
| 123 | MOD_CONF_CTRL_1); |
| 124 | } |
| 125 | } |
| 126 | |
| 127 | #define OMAP_MMC_NR_RES 4 |
| 128 | |
| 129 | /* |
| 130 | * Register MMC devices. |
| 131 | */ |
| 132 | static int __init omap_mmc_add(const char *name, int id, unsigned long base, |
| 133 | unsigned long size, unsigned int irq, |
| 134 | unsigned rx_req, unsigned tx_req, |
| 135 | struct omap_mmc_platform_data *data) |
| 136 | { |
| 137 | struct platform_device *pdev; |
| 138 | struct resource res[OMAP_MMC_NR_RES]; |
| 139 | int ret; |
| 140 | |
| 141 | pdev = platform_device_alloc(name, id); |
| 142 | if (!pdev) |
| 143 | return -ENOMEM; |
| 144 | |
| 145 | memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource)); |
| 146 | res[0].start = base; |
| 147 | res[0].end = base + size - 1; |
| 148 | res[0].flags = IORESOURCE_MEM; |
| 149 | res[1].start = res[1].end = irq; |
| 150 | res[1].flags = IORESOURCE_IRQ; |
| 151 | res[2].start = rx_req; |
| 152 | res[2].name = "rx"; |
| 153 | res[2].flags = IORESOURCE_DMA; |
| 154 | res[3].start = tx_req; |
| 155 | res[3].name = "tx"; |
| 156 | res[3].flags = IORESOURCE_DMA; |
| 157 | |
| 158 | if (cpu_is_omap7xx()) |
| 159 | data->slots[0].features = MMC_OMAP7XX; |
| 160 | if (cpu_is_omap15xx()) |
| 161 | data->slots[0].features = MMC_OMAP15XX; |
| 162 | if (cpu_is_omap16xx()) |
| 163 | data->slots[0].features = MMC_OMAP16XX; |
| 164 | |
| 165 | ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); |
| 166 | if (ret == 0) |
| 167 | ret = platform_device_add_data(pdev, data, sizeof(*data)); |
| 168 | if (ret) |
| 169 | goto fail; |
| 170 | |
| 171 | ret = platform_device_add(pdev); |
| 172 | if (ret) |
| 173 | goto fail; |
| 174 | |
| 175 | /* return device handle to board setup code */ |
| 176 | data->dev = &pdev->dev; |
| 177 | return 0; |
| 178 | |
| 179 | fail: |
| 180 | platform_device_put(pdev); |
| 181 | return ret; |
| 182 | } |
| 183 | |
| 184 | void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, |
| 185 | int nr_controllers) |
| 186 | { |
| 187 | int i; |
| 188 | |
| 189 | for (i = 0; i < nr_controllers; i++) { |
| 190 | unsigned long base, size; |
| 191 | unsigned rx_req, tx_req; |
| 192 | unsigned int irq = 0; |
| 193 | |
| 194 | if (!mmc_data[i]) |
| 195 | continue; |
| 196 | |
| 197 | omap1_mmc_mux(mmc_data[i], i); |
| 198 | |
| 199 | switch (i) { |
| 200 | case 0: |
| 201 | base = OMAP1_MMC1_BASE; |
| 202 | irq = INT_MMC; |
| 203 | rx_req = 22; |
| 204 | tx_req = 21; |
| 205 | break; |
| 206 | case 1: |
| 207 | if (!cpu_is_omap16xx()) |
| 208 | return; |
| 209 | base = OMAP1_MMC2_BASE; |
| 210 | irq = INT_1610_MMC2; |
| 211 | rx_req = 55; |
| 212 | tx_req = 54; |
| 213 | break; |
| 214 | default: |
| 215 | continue; |
| 216 | } |
| 217 | size = OMAP1_MMC_SIZE; |
| 218 | |
| 219 | omap_mmc_add("mmci-omap", i, base, size, irq, |
| 220 | rx_req, tx_req, mmc_data[i]); |
| 221 | } |
| 222 | } |
| 223 | |
| 224 | #endif |
| 225 | |
| 226 | /*-------------------------------------------------------------------------*/ |
| 227 | |
| 228 | /* OMAP7xx SPI support */ |
| 229 | #if IS_ENABLED(CONFIG_SPI_OMAP_100K) |
| 230 | |
| 231 | struct platform_device omap_spi1 = { |
| 232 | .name = "omap1_spi100k", |
| 233 | .id = 1, |
| 234 | }; |
| 235 | |
| 236 | struct platform_device omap_spi2 = { |
| 237 | .name = "omap1_spi100k", |
| 238 | .id = 2, |
| 239 | }; |
| 240 | |
| 241 | static void omap_init_spi100k(void) |
| 242 | { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 243 | if (!cpu_is_omap7xx()) |
| 244 | return; |
| 245 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 246 | omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); |
| 247 | if (omap_spi1.dev.platform_data) |
| 248 | platform_device_register(&omap_spi1); |
| 249 | |
| 250 | omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); |
| 251 | if (omap_spi2.dev.platform_data) |
| 252 | platform_device_register(&omap_spi2); |
| 253 | } |
| 254 | |
| 255 | #else |
| 256 | static inline void omap_init_spi100k(void) |
| 257 | { |
| 258 | } |
| 259 | #endif |
| 260 | |
| 261 | |
| 262 | #define OMAP1_CAMERA_BASE 0xfffb6800 |
| 263 | #define OMAP1_CAMERA_IOSIZE 0x1c |
| 264 | |
| 265 | static struct resource omap1_camera_resources[] = { |
| 266 | [0] = { |
| 267 | .start = OMAP1_CAMERA_BASE, |
| 268 | .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1, |
| 269 | .flags = IORESOURCE_MEM, |
| 270 | }, |
| 271 | [1] = { |
| 272 | .start = INT_CAMERA, |
| 273 | .flags = IORESOURCE_IRQ, |
| 274 | }, |
| 275 | }; |
| 276 | |
| 277 | static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32); |
| 278 | |
| 279 | static struct platform_device omap1_camera_device = { |
| 280 | .name = "omap1-camera", |
| 281 | .id = 0, /* This is used to put cameras on this interface */ |
| 282 | .dev = { |
| 283 | .dma_mask = &omap1_camera_dma_mask, |
| 284 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 285 | }, |
| 286 | .num_resources = ARRAY_SIZE(omap1_camera_resources), |
| 287 | .resource = omap1_camera_resources, |
| 288 | }; |
| 289 | |
| 290 | void __init omap1_camera_init(void *info) |
| 291 | { |
| 292 | struct platform_device *dev = &omap1_camera_device; |
| 293 | int ret; |
| 294 | |
| 295 | dev->dev.platform_data = info; |
| 296 | |
| 297 | ret = platform_device_register(dev); |
| 298 | if (ret) |
| 299 | dev_err(&dev->dev, "unable to register device: %d\n", ret); |
| 300 | } |
| 301 | |
| 302 | |
| 303 | /*-------------------------------------------------------------------------*/ |
| 304 | |
| 305 | static inline void omap_init_sti(void) {} |
| 306 | |
| 307 | /* Numbering for the SPI-capable controllers when used for SPI: |
| 308 | * spi = 1 |
| 309 | * uwire = 2 |
| 310 | * mmc1..2 = 3..4 |
| 311 | * mcbsp1..3 = 5..7 |
| 312 | */ |
| 313 | |
| 314 | #if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE) |
| 315 | |
| 316 | #define OMAP_UWIRE_BASE 0xfffb3000 |
| 317 | |
| 318 | static struct resource uwire_resources[] = { |
| 319 | { |
| 320 | .start = OMAP_UWIRE_BASE, |
| 321 | .end = OMAP_UWIRE_BASE + 0x20, |
| 322 | .flags = IORESOURCE_MEM, |
| 323 | }, |
| 324 | }; |
| 325 | |
| 326 | static struct platform_device omap_uwire_device = { |
| 327 | .name = "omap_uwire", |
| 328 | .id = -1, |
| 329 | .num_resources = ARRAY_SIZE(uwire_resources), |
| 330 | .resource = uwire_resources, |
| 331 | }; |
| 332 | |
| 333 | static void omap_init_uwire(void) |
| 334 | { |
| 335 | /* FIXME define and use a boot tag; not all boards will be hooking |
| 336 | * up devices to the microwire controller, and multi-board configs |
| 337 | * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway... |
| 338 | */ |
| 339 | |
| 340 | /* board-specific code must configure chipselects (only a few |
| 341 | * are normally used) and SCLK/SDI/SDO (each has two choices). |
| 342 | */ |
| 343 | (void) platform_device_register(&omap_uwire_device); |
| 344 | } |
| 345 | #else |
| 346 | static inline void omap_init_uwire(void) {} |
| 347 | #endif |
| 348 | |
| 349 | |
| 350 | #define OMAP1_RNG_BASE 0xfffe5000 |
| 351 | |
| 352 | static struct resource omap1_rng_resources[] = { |
| 353 | { |
| 354 | .start = OMAP1_RNG_BASE, |
| 355 | .end = OMAP1_RNG_BASE + 0x4f, |
| 356 | .flags = IORESOURCE_MEM, |
| 357 | }, |
| 358 | }; |
| 359 | |
| 360 | static struct platform_device omap1_rng_device = { |
| 361 | .name = "omap_rng", |
| 362 | .id = -1, |
| 363 | .num_resources = ARRAY_SIZE(omap1_rng_resources), |
| 364 | .resource = omap1_rng_resources, |
| 365 | }; |
| 366 | |
| 367 | static void omap1_init_rng(void) |
| 368 | { |
| 369 | if (!cpu_is_omap16xx()) |
| 370 | return; |
| 371 | |
| 372 | (void) platform_device_register(&omap1_rng_device); |
| 373 | } |
| 374 | |
| 375 | /*-------------------------------------------------------------------------*/ |
| 376 | |
| 377 | /* |
| 378 | * This gets called after board-specific INIT_MACHINE, and initializes most |
| 379 | * on-chip peripherals accessible on this board (except for few like USB): |
| 380 | * |
| 381 | * (a) Does any "standard config" pin muxing needed. Board-specific |
| 382 | * code will have muxed GPIO pins and done "nonstandard" setup; |
| 383 | * that code could live in the boot loader. |
| 384 | * (b) Populating board-specific platform_data with the data drivers |
| 385 | * rely on to handle wiring variations. |
| 386 | * (c) Creating platform devices as meaningful on this board and |
| 387 | * with this kernel configuration. |
| 388 | * |
| 389 | * Claiming GPIOs, and setting their direction and initial values, is the |
| 390 | * responsibility of the device drivers. So is responding to probe(). |
| 391 | * |
| 392 | * Board-specific knowledge like creating devices or pin setup is to be |
| 393 | * kept out of drivers as much as possible. In particular, pin setup |
| 394 | * may be handled by the boot loader, and drivers should expect it will |
| 395 | * normally have been done by the time they're probed. |
| 396 | */ |
| 397 | static int __init omap1_init_devices(void) |
| 398 | { |
| 399 | if (!cpu_class_is_omap1()) |
| 400 | return -ENODEV; |
| 401 | |
| 402 | omap_sram_init(); |
| 403 | omap1_clk_late_init(); |
| 404 | |
| 405 | /* please keep these calls, and their implementations above, |
| 406 | * in alphabetical order so they're easier to sort through. |
| 407 | */ |
| 408 | |
| 409 | omap_init_mbox(); |
| 410 | omap_init_rtc(); |
| 411 | omap_init_spi100k(); |
| 412 | omap_init_sti(); |
| 413 | omap_init_uwire(); |
| 414 | omap1_init_rng(); |
| 415 | |
| 416 | return 0; |
| 417 | } |
| 418 | arch_initcall(omap1_init_devices); |
| 419 | |
| 420 | #if IS_ENABLED(CONFIG_OMAP_WATCHDOG) |
| 421 | |
| 422 | static struct resource wdt_resources[] = { |
| 423 | { |
| 424 | .start = 0xfffeb000, |
| 425 | .end = 0xfffeb07F, |
| 426 | .flags = IORESOURCE_MEM, |
| 427 | }, |
| 428 | }; |
| 429 | |
| 430 | static struct platform_device omap_wdt_device = { |
| 431 | .name = "omap_wdt", |
| 432 | .id = -1, |
| 433 | .num_resources = ARRAY_SIZE(wdt_resources), |
| 434 | .resource = wdt_resources, |
| 435 | }; |
| 436 | |
| 437 | static int __init omap_init_wdt(void) |
| 438 | { |
| 439 | struct omap_wd_timer_platform_data pdata; |
| 440 | int ret; |
| 441 | |
| 442 | if (!cpu_is_omap16xx()) |
| 443 | return -ENODEV; |
| 444 | |
| 445 | pdata.read_reset_sources = omap1_get_reset_sources; |
| 446 | |
| 447 | ret = platform_device_register(&omap_wdt_device); |
| 448 | if (!ret) { |
| 449 | ret = platform_device_add_data(&omap_wdt_device, &pdata, |
| 450 | sizeof(pdata)); |
| 451 | if (ret) |
| 452 | platform_device_del(&omap_wdt_device); |
| 453 | } |
| 454 | |
| 455 | return ret; |
| 456 | } |
| 457 | subsys_initcall(omap_init_wdt); |
| 458 | #endif |