| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Application Subsystem Power Management Unit |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __ASM_MACH_REGS_APMU_H |
| 7 | #define __ASM_MACH_REGS_APMU_H |
| 8 | |
| 9 | #include "addr-map.h" |
| 10 | |
| 11 | #define APMU_FNCLK_EN (1 << 4) |
| 12 | #define APMU_AXICLK_EN (1 << 3) |
| 13 | #define APMU_FNRST_DIS (1 << 1) |
| 14 | #define APMU_AXIRST_DIS (1 << 0) |
| 15 | |
| 16 | /* Wake Clear Register */ |
| 17 | #define APMU_WAKE_CLR APMU_REG(0x07c) |
| 18 | |
| 19 | #define APMU_PXA168_KP_WAKE_CLR (1 << 7) |
| 20 | #define APMU_PXA168_CFI_WAKE_CLR (1 << 6) |
| 21 | #define APMU_PXA168_XD_WAKE_CLR (1 << 5) |
| 22 | #define APMU_PXA168_MSP_WAKE_CLR (1 << 4) |
| 23 | #define APMU_PXA168_SD4_WAKE_CLR (1 << 3) |
| 24 | #define APMU_PXA168_SD3_WAKE_CLR (1 << 2) |
| 25 | #define APMU_PXA168_SD2_WAKE_CLR (1 << 1) |
| 26 | #define APMU_PXA168_SD1_WAKE_CLR (1 << 0) |
| 27 | |
| 28 | #endif /* __ASM_MACH_REGS_APMU_H */ |