David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * linux/arch/arm/kernel/irq.c |
| 4 | * |
| 5 | * Copyright (C) 1992 Linus Torvalds |
| 6 | * Modifications for ARM processor Copyright (C) 1995-2000 Russell King. |
| 7 | * |
| 8 | * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation. |
| 9 | * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and |
| 10 | * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>. |
| 11 | * |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 12 | * This file contains the code used by various IRQ handling routines: |
| 13 | * asking for different IRQ's should be done through these routines |
| 14 | * instead of just grabbing them. Thus setups with different IRQ numbers |
| 15 | * shouldn't result in any weird surprises, and installing new handlers |
| 16 | * should be easier. |
| 17 | * |
| 18 | * IRQ's are in fact implemented a bit like signal handlers for the kernel. |
| 19 | * Naturally it's not a 1:1 relation, but there are similarities. |
| 20 | */ |
| 21 | #include <linux/kernel_stat.h> |
| 22 | #include <linux/signal.h> |
| 23 | #include <linux/ioport.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/irq.h> |
| 26 | #include <linux/irqchip.h> |
| 27 | #include <linux/random.h> |
| 28 | #include <linux/smp.h> |
| 29 | #include <linux/init.h> |
| 30 | #include <linux/seq_file.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 31 | #include <linux/errno.h> |
| 32 | #include <linux/list.h> |
| 33 | #include <linux/kallsyms.h> |
| 34 | #include <linux/proc_fs.h> |
| 35 | #include <linux/export.h> |
| 36 | |
| 37 | #include <asm/hardware/cache-l2x0.h> |
| 38 | #include <asm/hardware/cache-uniphier.h> |
| 39 | #include <asm/outercache.h> |
| 40 | #include <asm/exception.h> |
| 41 | #include <asm/mach/arch.h> |
| 42 | #include <asm/mach/irq.h> |
| 43 | #include <asm/mach/time.h> |
| 44 | |
| 45 | unsigned long irq_err_count; |
| 46 | |
| 47 | int arch_show_interrupts(struct seq_file *p, int prec) |
| 48 | { |
| 49 | #ifdef CONFIG_FIQ |
| 50 | show_fiq_list(p, prec); |
| 51 | #endif |
| 52 | #ifdef CONFIG_SMP |
| 53 | show_ipi_list(p, prec); |
| 54 | #endif |
| 55 | seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); |
| 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | /* |
| 60 | * handle_IRQ handles all hardware IRQ's. Decoded IRQs should |
| 61 | * not come via this function. Instead, they should provide their |
| 62 | * own 'handler'. Used by platform code implementing C-based 1st |
| 63 | * level decoding. |
| 64 | */ |
| 65 | void handle_IRQ(unsigned int irq, struct pt_regs *regs) |
| 66 | { |
| 67 | __handle_domain_irq(NULL, irq, false, regs); |
| 68 | } |
| 69 | |
| 70 | /* |
| 71 | * asm_do_IRQ is the interface to be used from assembly code. |
| 72 | */ |
| 73 | asmlinkage void __exception_irq_entry |
| 74 | asm_do_IRQ(unsigned int irq, struct pt_regs *regs) |
| 75 | { |
| 76 | handle_IRQ(irq, regs); |
| 77 | } |
| 78 | |
| 79 | void __init init_IRQ(void) |
| 80 | { |
| 81 | int ret; |
| 82 | |
| 83 | if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq) |
| 84 | irqchip_init(); |
| 85 | else |
| 86 | machine_desc->init_irq(); |
| 87 | |
| 88 | if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) && |
| 89 | (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) { |
| 90 | if (!outer_cache.write_sec) |
| 91 | outer_cache.write_sec = machine_desc->l2c_write_sec; |
| 92 | ret = l2x0_of_init(machine_desc->l2c_aux_val, |
| 93 | machine_desc->l2c_aux_mask); |
| 94 | if (ret && ret != -ENODEV) |
| 95 | pr_err("L2C: failed to init: %d\n", ret); |
| 96 | } |
| 97 | |
| 98 | uniphier_cache_init(); |
| 99 | } |
| 100 | |
| 101 | #ifdef CONFIG_SPARSE_IRQ |
| 102 | int __init arch_probe_nr_irqs(void) |
| 103 | { |
| 104 | nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS; |
| 105 | return nr_irqs; |
| 106 | } |
| 107 | #endif |