Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | What: /sys/class/watchdog/watchdogn/bootstatus |
| 2 | Date: August 2015 |
| 3 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 4 | Description: |
| 5 | It is a read only file. It contains status of the watchdog |
| 6 | device at boot. It is equivalent to WDIOC_GETBOOTSTATUS of |
| 7 | ioctl interface. |
| 8 | |
| 9 | What: /sys/class/watchdog/watchdogn/identity |
| 10 | Date: August 2015 |
| 11 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 12 | Description: |
| 13 | It is a read only file. It contains identity string of |
| 14 | watchdog device. |
| 15 | |
| 16 | What: /sys/class/watchdog/watchdogn/nowayout |
| 17 | Date: August 2015 |
| 18 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 19 | Description: |
| 20 | It is a read only file. While reading, it gives '1' if that |
| 21 | device supports nowayout feature else, it gives '0'. |
| 22 | |
| 23 | What: /sys/class/watchdog/watchdogn/state |
| 24 | Date: August 2015 |
| 25 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 26 | Description: |
| 27 | It is a read only file. It gives active/inactive status of |
| 28 | watchdog device. |
| 29 | |
| 30 | What: /sys/class/watchdog/watchdogn/status |
| 31 | Date: August 2015 |
| 32 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 33 | Description: |
| 34 | It is a read only file. It contains watchdog device's |
| 35 | internal status bits. It is equivalent to WDIOC_GETSTATUS |
| 36 | of ioctl interface. |
| 37 | |
| 38 | What: /sys/class/watchdog/watchdogn/timeleft |
| 39 | Date: August 2015 |
| 40 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 41 | Description: |
| 42 | It is a read only file. It contains value of time left for |
| 43 | reset generation. It is equivalent to WDIOC_GETTIMELEFT of |
| 44 | ioctl interface. |
| 45 | |
| 46 | What: /sys/class/watchdog/watchdogn/timeout |
| 47 | Date: August 2015 |
| 48 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 49 | Description: |
| 50 | It is a read only file. It is read to know about current |
| 51 | value of timeout programmed. |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 52 | |
| 53 | What: /sys/class/watchdog/watchdogn/pretimeout |
| 54 | Date: December 2016 |
| 55 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 56 | Description: |
| 57 | It is a read only file. It specifies the time in seconds before |
| 58 | timeout when the pretimeout interrupt is delivered. Pretimeout |
| 59 | is an optional feature. |
| 60 | |
| 61 | What: /sys/class/watchdog/watchdogn/pretimeout_avaialable_governors |
| 62 | Date: February 2017 |
| 63 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 64 | Description: |
| 65 | It is a read only file. It shows the pretimeout governors |
| 66 | available for this watchdog. |
| 67 | |
| 68 | What: /sys/class/watchdog/watchdogn/pretimeout_governor |
| 69 | Date: February 2017 |
| 70 | Contact: Wim Van Sebroeck <wim@iguana.be> |
| 71 | Description: |
| 72 | It is a read/write file. When read, the currently assigned |
| 73 | pretimeout governor is returned. When written, it sets |
| 74 | the pretimeout governor. |
| 75 | |
| 76 | What: /sys/class/watchdog/watchdog1/access_cs0 |
| 77 | Date: August 2019 |
| 78 | Contact: Ivan Mikhaylov <i.mikhaylov@yadro.com>, |
| 79 | Alexander Amelkin <a.amelkin@yadro.com> |
| 80 | Description: |
| 81 | It is a read/write file. This attribute exists only if the |
| 82 | system has booted from the alternate flash chip due to |
| 83 | expiration of a watchdog timer of AST2400/AST2500 when |
| 84 | alternate boot function was enabled with 'aspeed,alt-boot' |
| 85 | devicetree option for that watchdog or with an appropriate |
| 86 | h/w strapping (for WDT2 only). |
| 87 | |
| 88 | At alternate flash the 'access_cs0' sysfs node provides: |
| 89 | ast2400: a way to get access to the primary SPI flash |
| 90 | chip at CS0 after booting from the alternate |
| 91 | chip at CS1. |
| 92 | ast2500: a way to restore the normal address mapping |
| 93 | from (CS0->CS1, CS1->CS0) to (CS0->CS0, |
| 94 | CS1->CS1). |
| 95 | |
| 96 | Clearing the boot code selection and timeout counter also |
| 97 | resets to the initial state the chip select line mapping. When |
| 98 | the SoC is in normal mapping state (i.e. booted from CS0), |
| 99 | clearing those bits does nothing for both versions of the SoC. |
| 100 | For alternate boot mode (booted from CS1 due to wdt2 |
| 101 | expiration) the behavior differs as described above. |
| 102 | |
| 103 | This option can be used with wdt2 (watchdog1) only. |
| 104 | |
| 105 | When read, the current status of the boot code selection is |
| 106 | shown. When written with any non-zero value, it clears |
| 107 | the boot code selection and the timeout counter, which results |
| 108 | in chipselect reset for AST2400/AST2500. |