blob: 80ff00025c03dac4e2219bc22eaf7501344825de [file] [log] [blame]
David Brazdil0f672f62019-12-10 10:32:29 +00001// SPDX-License-Identifier: GPL-2.0
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * driver for Microsemi PQI-based storage controllers
David Brazdil0f672f62019-12-10 10:32:29 +00004 * Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries
5 * Copyright (c) 2016-2018 Microsemi Corporation
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006 * Copyright (c) 2016 PMC-Sierra, Inc.
7 *
David Brazdil0f672f62019-12-10 10:32:29 +00008 * Questions/Comments/Bugfixes to storagedev@microchip.com
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009 *
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/pci.h>
15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/sched.h>
18#include <linux/rtc.h>
19#include <linux/bcd.h>
20#include <linux/reboot.h>
21#include <linux/cciss_ioctl.h>
22#include <linux/blk-mq-pci.h>
23#include <scsi/scsi_host.h>
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_device.h>
26#include <scsi/scsi_eh.h>
27#include <scsi/scsi_transport_sas.h>
28#include <asm/unaligned.h>
29#include "smartpqi.h"
30#include "smartpqi_sis.h"
31
32#if !defined(BUILD_TIMESTAMP)
33#define BUILD_TIMESTAMP
34#endif
35
David Brazdil0f672f62019-12-10 10:32:29 +000036#define DRIVER_VERSION "1.2.8-026"
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000037#define DRIVER_MAJOR 1
David Brazdil0f672f62019-12-10 10:32:29 +000038#define DRIVER_MINOR 2
39#define DRIVER_RELEASE 8
40#define DRIVER_REVISION 26
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000041
42#define DRIVER_NAME "Microsemi PQI Driver (v" \
43 DRIVER_VERSION BUILD_TIMESTAMP ")"
44#define DRIVER_NAME_SHORT "smartpqi"
45
46#define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor))
47
48MODULE_AUTHOR("Microsemi");
49MODULE_DESCRIPTION("Driver for Microsemi Smart Family Controller version "
50 DRIVER_VERSION);
51MODULE_SUPPORTED_DEVICE("Microsemi Smart Family Controllers");
52MODULE_VERSION(DRIVER_VERSION);
53MODULE_LICENSE("GPL");
54
55static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info);
56static void pqi_ctrl_offline_worker(struct work_struct *work);
57static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info);
58static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info);
59static void pqi_scan_start(struct Scsi_Host *shost);
60static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
61 struct pqi_queue_group *queue_group, enum pqi_io_path path,
62 struct pqi_io_request *io_request);
63static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
64 struct pqi_iu_header *request, unsigned int flags,
65 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs);
66static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
67 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
68 unsigned int cdb_length, struct pqi_queue_group *queue_group,
69 struct pqi_encryption_info *encryption_info, bool raid_bypass);
David Brazdil0f672f62019-12-10 10:32:29 +000070static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info);
71static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info);
72static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info);
73static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info,
74 u32 bytes_requested);
75static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info);
76static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info);
77static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
78 struct pqi_scsi_dev *device, unsigned long timeout_secs);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000079
80/* for flags argument to pqi_submit_raid_request_synchronous() */
81#define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1
82
83static struct scsi_transport_template *pqi_sas_transport_template;
84
85static atomic_t pqi_controller_count = ATOMIC_INIT(0);
86
87enum pqi_lockup_action {
88 NONE,
89 REBOOT,
90 PANIC
91};
92
93static enum pqi_lockup_action pqi_lockup_action = NONE;
94
95static struct {
96 enum pqi_lockup_action action;
97 char *name;
98} pqi_lockup_actions[] = {
99 {
100 .action = NONE,
101 .name = "none",
102 },
103 {
104 .action = REBOOT,
105 .name = "reboot",
106 },
107 {
108 .action = PANIC,
109 .name = "panic",
110 },
111};
112
113static unsigned int pqi_supported_event_types[] = {
114 PQI_EVENT_TYPE_HOTPLUG,
115 PQI_EVENT_TYPE_HARDWARE,
116 PQI_EVENT_TYPE_PHYSICAL_DEVICE,
117 PQI_EVENT_TYPE_LOGICAL_DEVICE,
David Brazdil0f672f62019-12-10 10:32:29 +0000118 PQI_EVENT_TYPE_OFA,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000119 PQI_EVENT_TYPE_AIO_STATE_CHANGE,
120 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE,
121};
122
123static int pqi_disable_device_id_wildcards;
124module_param_named(disable_device_id_wildcards,
125 pqi_disable_device_id_wildcards, int, 0644);
126MODULE_PARM_DESC(disable_device_id_wildcards,
127 "Disable device ID wildcards.");
128
129static int pqi_disable_heartbeat;
130module_param_named(disable_heartbeat,
131 pqi_disable_heartbeat, int, 0644);
132MODULE_PARM_DESC(disable_heartbeat,
133 "Disable heartbeat.");
134
135static int pqi_disable_ctrl_shutdown;
136module_param_named(disable_ctrl_shutdown,
137 pqi_disable_ctrl_shutdown, int, 0644);
138MODULE_PARM_DESC(disable_ctrl_shutdown,
139 "Disable controller shutdown when controller locked up.");
140
141static char *pqi_lockup_action_param;
142module_param_named(lockup_action,
143 pqi_lockup_action_param, charp, 0644);
144MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n"
145 "\t\tSupported: none, reboot, panic\n"
146 "\t\tDefault: none");
147
David Brazdil0f672f62019-12-10 10:32:29 +0000148static int pqi_expose_ld_first;
149module_param_named(expose_ld_first,
150 pqi_expose_ld_first, int, 0644);
151MODULE_PARM_DESC(expose_ld_first,
152 "Expose logical drives before physical drives.");
153
154static int pqi_hide_vsep;
155module_param_named(hide_vsep,
156 pqi_hide_vsep, int, 0644);
157MODULE_PARM_DESC(hide_vsep,
158 "Hide the virtual SEP for direct attached drives.");
159
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000160static char *raid_levels[] = {
161 "RAID-0",
162 "RAID-4",
163 "RAID-1(1+0)",
164 "RAID-5",
165 "RAID-5+1",
166 "RAID-ADG",
167 "RAID-1(ADM)",
168};
169
170static char *pqi_raid_level_to_string(u8 raid_level)
171{
172 if (raid_level < ARRAY_SIZE(raid_levels))
173 return raid_levels[raid_level];
174
175 return "RAID UNKNOWN";
176}
177
178#define SA_RAID_0 0
179#define SA_RAID_4 1
180#define SA_RAID_1 2 /* also used for RAID 10 */
181#define SA_RAID_5 3 /* also used for RAID 50 */
182#define SA_RAID_51 4
183#define SA_RAID_6 5 /* also used for RAID 60 */
184#define SA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
185#define SA_RAID_MAX SA_RAID_ADM
186#define SA_RAID_UNKNOWN 0xff
187
188static inline void pqi_scsi_done(struct scsi_cmnd *scmd)
189{
190 pqi_prep_for_scsi_done(scmd);
191 scmd->scsi_done(scmd);
192}
193
David Brazdil0f672f62019-12-10 10:32:29 +0000194static inline void pqi_disable_write_same(struct scsi_device *sdev)
195{
196 sdev->no_write_same = 1;
197}
198
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000199static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2)
200{
201 return memcmp(scsi3addr1, scsi3addr2, 8) == 0;
202}
203
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000204static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device)
205{
206 return !device->is_physical_device;
207}
208
209static inline bool pqi_is_external_raid_addr(u8 *scsi3addr)
210{
211 return scsi3addr[2] != 0;
212}
213
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000214static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info)
215{
216 if (ctrl_info->controller_online)
217 if (!sis_is_firmware_running(ctrl_info))
218 pqi_take_ctrl_offline(ctrl_info);
219}
220
221static inline bool pqi_is_hba_lunid(u8 *scsi3addr)
222{
223 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID);
224}
225
226static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(
227 struct pqi_ctrl_info *ctrl_info)
228{
229 return sis_read_driver_scratch(ctrl_info);
230}
231
232static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info,
233 enum pqi_ctrl_mode mode)
234{
235 sis_write_driver_scratch(ctrl_info, mode);
236}
237
238static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info)
239{
240 ctrl_info->block_requests = true;
241 scsi_block_requests(ctrl_info->scsi_host);
242}
243
244static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info)
245{
246 ctrl_info->block_requests = false;
247 wake_up_all(&ctrl_info->block_requests_wait);
248 pqi_retry_raid_bypass_requests(ctrl_info);
249 scsi_unblock_requests(ctrl_info->scsi_host);
250}
251
Olivier Deprez0e641232021-09-23 10:07:05 +0200252static inline void pqi_ctrl_block_device_reset(struct pqi_ctrl_info *ctrl_info)
253{
254 ctrl_info->block_device_reset = true;
255}
256
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000257static unsigned long pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info,
258 unsigned long timeout_msecs)
259{
260 unsigned long remaining_msecs;
261
262 if (!pqi_ctrl_blocked(ctrl_info))
263 return timeout_msecs;
264
265 atomic_inc(&ctrl_info->num_blocked_threads);
266
267 if (timeout_msecs == NO_TIMEOUT) {
268 wait_event(ctrl_info->block_requests_wait,
269 !pqi_ctrl_blocked(ctrl_info));
270 remaining_msecs = timeout_msecs;
271 } else {
272 unsigned long remaining_jiffies;
273
274 remaining_jiffies =
275 wait_event_timeout(ctrl_info->block_requests_wait,
276 !pqi_ctrl_blocked(ctrl_info),
277 msecs_to_jiffies(timeout_msecs));
278 remaining_msecs = jiffies_to_msecs(remaining_jiffies);
279 }
280
281 atomic_dec(&ctrl_info->num_blocked_threads);
282
283 return remaining_msecs;
284}
285
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000286static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info)
287{
288 while (atomic_read(&ctrl_info->num_busy_threads) >
289 atomic_read(&ctrl_info->num_blocked_threads))
290 usleep_range(1000, 2000);
291}
292
293static inline bool pqi_device_offline(struct pqi_scsi_dev *device)
294{
295 return device->device_offline;
296}
297
298static inline void pqi_device_reset_start(struct pqi_scsi_dev *device)
299{
300 device->in_reset = true;
301}
302
303static inline void pqi_device_reset_done(struct pqi_scsi_dev *device)
304{
305 device->in_reset = false;
306}
307
308static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device)
309{
310 return device->in_reset;
311}
312
David Brazdil0f672f62019-12-10 10:32:29 +0000313static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info)
314{
315 ctrl_info->in_ofa = true;
316}
317
318static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info)
319{
320 ctrl_info->in_ofa = false;
321}
322
323static inline bool pqi_ctrl_in_ofa(struct pqi_ctrl_info *ctrl_info)
324{
325 return ctrl_info->in_ofa;
326}
327
328static inline void pqi_device_remove_start(struct pqi_scsi_dev *device)
329{
330 device->in_remove = true;
331}
332
333static inline bool pqi_device_in_remove(struct pqi_ctrl_info *ctrl_info,
334 struct pqi_scsi_dev *device)
335{
336 return device->in_remove && !ctrl_info->in_shutdown;
337}
338
Olivier Deprez0e641232021-09-23 10:07:05 +0200339static inline void pqi_ctrl_shutdown_start(struct pqi_ctrl_info *ctrl_info)
340{
341 ctrl_info->in_shutdown = true;
342}
343
344static inline bool pqi_ctrl_in_shutdown(struct pqi_ctrl_info *ctrl_info)
345{
346 return ctrl_info->in_shutdown;
347}
348
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000349static inline void pqi_schedule_rescan_worker_with_delay(
350 struct pqi_ctrl_info *ctrl_info, unsigned long delay)
351{
352 if (pqi_ctrl_offline(ctrl_info))
353 return;
David Brazdil0f672f62019-12-10 10:32:29 +0000354 if (pqi_ctrl_in_ofa(ctrl_info))
355 return;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000356
357 schedule_delayed_work(&ctrl_info->rescan_work, delay);
358}
359
360static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info)
361{
362 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0);
363}
364
David Brazdil0f672f62019-12-10 10:32:29 +0000365#define PQI_RESCAN_WORK_DELAY (10 * PQI_HZ)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000366
367static inline void pqi_schedule_rescan_worker_delayed(
368 struct pqi_ctrl_info *ctrl_info)
369{
370 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY);
371}
372
373static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info)
374{
375 cancel_delayed_work_sync(&ctrl_info->rescan_work);
376}
377
Olivier Deprez0e641232021-09-23 10:07:05 +0200378static inline void pqi_cancel_event_worker(struct pqi_ctrl_info *ctrl_info)
379{
380 cancel_work_sync(&ctrl_info->event_work);
381}
382
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000383static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info)
384{
385 if (!ctrl_info->heartbeat_counter)
386 return 0;
387
388 return readl(ctrl_info->heartbeat_counter);
389}
390
David Brazdil0f672f62019-12-10 10:32:29 +0000391static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info)
392{
393 if (!ctrl_info->soft_reset_status)
394 return 0;
395
396 return readb(ctrl_info->soft_reset_status);
397}
398
399static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info,
400 u8 clear)
401{
402 u8 status;
403
404 if (!ctrl_info->soft_reset_status)
405 return;
406
407 status = pqi_read_soft_reset_status(ctrl_info);
408 status &= ~clear;
409 writeb(status, ctrl_info->soft_reset_status);
410}
411
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000412static int pqi_map_single(struct pci_dev *pci_dev,
413 struct pqi_sg_descriptor *sg_descriptor, void *buffer,
David Brazdil0f672f62019-12-10 10:32:29 +0000414 size_t buffer_length, enum dma_data_direction data_direction)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000415{
416 dma_addr_t bus_address;
417
David Brazdil0f672f62019-12-10 10:32:29 +0000418 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000419 return 0;
420
David Brazdil0f672f62019-12-10 10:32:29 +0000421 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000422 data_direction);
David Brazdil0f672f62019-12-10 10:32:29 +0000423 if (dma_mapping_error(&pci_dev->dev, bus_address))
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000424 return -ENOMEM;
425
426 put_unaligned_le64((u64)bus_address, &sg_descriptor->address);
427 put_unaligned_le32(buffer_length, &sg_descriptor->length);
428 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
429
430 return 0;
431}
432
433static void pqi_pci_unmap(struct pci_dev *pci_dev,
434 struct pqi_sg_descriptor *descriptors, int num_descriptors,
David Brazdil0f672f62019-12-10 10:32:29 +0000435 enum dma_data_direction data_direction)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000436{
437 int i;
438
David Brazdil0f672f62019-12-10 10:32:29 +0000439 if (data_direction == DMA_NONE)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000440 return;
441
442 for (i = 0; i < num_descriptors; i++)
David Brazdil0f672f62019-12-10 10:32:29 +0000443 dma_unmap_single(&pci_dev->dev,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000444 (dma_addr_t)get_unaligned_le64(&descriptors[i].address),
445 get_unaligned_le32(&descriptors[i].length),
446 data_direction);
447}
448
449static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info,
450 struct pqi_raid_path_request *request, u8 cmd,
451 u8 *scsi3addr, void *buffer, size_t buffer_length,
David Brazdil0f672f62019-12-10 10:32:29 +0000452 u16 vpd_page, enum dma_data_direction *dir)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000453{
454 u8 *cdb;
David Brazdil0f672f62019-12-10 10:32:29 +0000455 size_t cdb_length = buffer_length;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000456
457 memset(request, 0, sizeof(*request));
458
459 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
460 put_unaligned_le16(offsetof(struct pqi_raid_path_request,
461 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH,
462 &request->header.iu_length);
463 put_unaligned_le32(buffer_length, &request->buffer_length);
464 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number));
465 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
466 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
467
468 cdb = request->cdb;
469
470 switch (cmd) {
471 case INQUIRY:
472 request->data_direction = SOP_READ_FLAG;
473 cdb[0] = INQUIRY;
474 if (vpd_page & VPD_PAGE) {
475 cdb[1] = 0x1;
476 cdb[2] = (u8)vpd_page;
477 }
David Brazdil0f672f62019-12-10 10:32:29 +0000478 cdb[4] = (u8)cdb_length;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000479 break;
480 case CISS_REPORT_LOG:
481 case CISS_REPORT_PHYS:
482 request->data_direction = SOP_READ_FLAG;
483 cdb[0] = cmd;
484 if (cmd == CISS_REPORT_PHYS)
485 cdb[1] = CISS_REPORT_PHYS_EXTENDED;
486 else
487 cdb[1] = CISS_REPORT_LOG_EXTENDED;
David Brazdil0f672f62019-12-10 10:32:29 +0000488 put_unaligned_be32(cdb_length, &cdb[6]);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000489 break;
490 case CISS_GET_RAID_MAP:
491 request->data_direction = SOP_READ_FLAG;
492 cdb[0] = CISS_READ;
493 cdb[1] = CISS_GET_RAID_MAP;
David Brazdil0f672f62019-12-10 10:32:29 +0000494 put_unaligned_be32(cdb_length, &cdb[6]);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000495 break;
496 case SA_FLUSH_CACHE:
497 request->data_direction = SOP_WRITE_FLAG;
498 cdb[0] = BMIC_WRITE;
499 cdb[6] = BMIC_FLUSH_CACHE;
David Brazdil0f672f62019-12-10 10:32:29 +0000500 put_unaligned_be16(cdb_length, &cdb[7]);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000501 break;
David Brazdil0f672f62019-12-10 10:32:29 +0000502 case BMIC_SENSE_DIAG_OPTIONS:
503 cdb_length = 0;
504 /* fall through */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000505 case BMIC_IDENTIFY_CONTROLLER:
506 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
David Brazdil0f672f62019-12-10 10:32:29 +0000507 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000508 request->data_direction = SOP_READ_FLAG;
509 cdb[0] = BMIC_READ;
510 cdb[6] = cmd;
David Brazdil0f672f62019-12-10 10:32:29 +0000511 put_unaligned_be16(cdb_length, &cdb[7]);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000512 break;
David Brazdil0f672f62019-12-10 10:32:29 +0000513 case BMIC_SET_DIAG_OPTIONS:
514 cdb_length = 0;
515 /* fall through */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000516 case BMIC_WRITE_HOST_WELLNESS:
517 request->data_direction = SOP_WRITE_FLAG;
518 cdb[0] = BMIC_WRITE;
519 cdb[6] = cmd;
David Brazdil0f672f62019-12-10 10:32:29 +0000520 put_unaligned_be16(cdb_length, &cdb[7]);
521 break;
522 case BMIC_CSMI_PASSTHRU:
523 request->data_direction = SOP_BIDIRECTIONAL;
524 cdb[0] = BMIC_WRITE;
525 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU;
526 cdb[6] = cmd;
527 put_unaligned_be16(cdb_length, &cdb[7]);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000528 break;
529 default:
Olivier Deprez0e641232021-09-23 10:07:05 +0200530 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", cmd);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000531 break;
532 }
533
534 switch (request->data_direction) {
535 case SOP_READ_FLAG:
David Brazdil0f672f62019-12-10 10:32:29 +0000536 *dir = DMA_FROM_DEVICE;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000537 break;
538 case SOP_WRITE_FLAG:
David Brazdil0f672f62019-12-10 10:32:29 +0000539 *dir = DMA_TO_DEVICE;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000540 break;
541 case SOP_NO_DIRECTION_FLAG:
David Brazdil0f672f62019-12-10 10:32:29 +0000542 *dir = DMA_NONE;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000543 break;
544 default:
David Brazdil0f672f62019-12-10 10:32:29 +0000545 *dir = DMA_BIDIRECTIONAL;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000546 break;
547 }
548
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000549 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0],
David Brazdil0f672f62019-12-10 10:32:29 +0000550 buffer, buffer_length, *dir);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000551}
552
553static inline void pqi_reinit_io_request(struct pqi_io_request *io_request)
554{
555 io_request->scmd = NULL;
556 io_request->status = 0;
557 io_request->error_info = NULL;
558 io_request->raid_bypass = false;
559}
560
561static struct pqi_io_request *pqi_alloc_io_request(
562 struct pqi_ctrl_info *ctrl_info)
563{
564 struct pqi_io_request *io_request;
565 u16 i = ctrl_info->next_io_request_slot; /* benignly racy */
566
567 while (1) {
568 io_request = &ctrl_info->io_request_pool[i];
569 if (atomic_inc_return(&io_request->refcount) == 1)
570 break;
571 atomic_dec(&io_request->refcount);
572 i = (i + 1) % ctrl_info->max_io_slots;
573 }
574
575 /* benignly racy */
576 ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots;
577
578 pqi_reinit_io_request(io_request);
579
580 return io_request;
581}
582
583static void pqi_free_io_request(struct pqi_io_request *io_request)
584{
585 atomic_dec(&io_request->refcount);
586}
587
David Brazdil0f672f62019-12-10 10:32:29 +0000588static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd,
589 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page,
590 struct pqi_raid_error_info *error_info,
591 unsigned long timeout_msecs)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000592{
593 int rc;
David Brazdil0f672f62019-12-10 10:32:29 +0000594 enum dma_data_direction dir;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000595 struct pqi_raid_path_request request;
596
597 rc = pqi_build_raid_path_request(ctrl_info, &request,
David Brazdil0f672f62019-12-10 10:32:29 +0000598 cmd, scsi3addr, buffer,
599 buffer_length, vpd_page, &dir);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000600 if (rc)
601 return rc;
602
David Brazdil0f672f62019-12-10 10:32:29 +0000603 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
604 0, error_info, timeout_msecs);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000605
David Brazdil0f672f62019-12-10 10:32:29 +0000606 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000607 return rc;
608}
609
David Brazdil0f672f62019-12-10 10:32:29 +0000610/* Helper functions for pqi_send_scsi_raid_request */
611
612static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info,
613 u8 cmd, void *buffer, size_t buffer_length)
614{
615 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
616 buffer, buffer_length, 0, NULL, NO_TIMEOUT);
617}
618
619static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info,
620 u8 cmd, void *buffer, size_t buffer_length,
621 struct pqi_raid_error_info *error_info)
622{
623 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
624 buffer, buffer_length, 0, error_info, NO_TIMEOUT);
625}
626
627
628static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info,
629 struct bmic_identify_controller *buffer)
630{
631 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER,
632 buffer, sizeof(*buffer));
633}
634
635static inline int pqi_sense_subsystem_info(struct pqi_ctrl_info *ctrl_info,
636 struct bmic_sense_subsystem_info *sense_info)
637{
638 return pqi_send_ctrl_raid_request(ctrl_info,
639 BMIC_SENSE_SUBSYSTEM_INFORMATION,
640 sense_info, sizeof(*sense_info));
641}
642
643static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000644 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length)
645{
David Brazdil0f672f62019-12-10 10:32:29 +0000646 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr,
647 buffer, buffer_length, vpd_page, NULL, NO_TIMEOUT);
648}
649
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000650static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info,
651 struct pqi_scsi_dev *device,
652 struct bmic_identify_physical_device *buffer,
653 size_t buffer_length)
654{
655 int rc;
David Brazdil0f672f62019-12-10 10:32:29 +0000656 enum dma_data_direction dir;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000657 u16 bmic_device_index;
658 struct pqi_raid_path_request request;
659
660 rc = pqi_build_raid_path_request(ctrl_info, &request,
661 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer,
David Brazdil0f672f62019-12-10 10:32:29 +0000662 buffer_length, 0, &dir);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000663 if (rc)
664 return rc;
665
666 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr);
667 request.cdb[2] = (u8)bmic_device_index;
668 request.cdb[9] = (u8)(bmic_device_index >> 8);
669
670 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
671 0, NULL, NO_TIMEOUT);
672
David Brazdil0f672f62019-12-10 10:32:29 +0000673 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000674 return rc;
675}
676
677static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info,
678 enum bmic_flush_cache_shutdown_event shutdown_event)
679{
680 int rc;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000681 struct bmic_flush_cache *flush_cache;
682
683 /*
684 * Don't bother trying to flush the cache if the controller is
685 * locked up.
686 */
687 if (pqi_ctrl_offline(ctrl_info))
688 return -ENXIO;
689
690 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL);
691 if (!flush_cache)
692 return -ENOMEM;
693
694 flush_cache->shutdown_event = shutdown_event;
695
David Brazdil0f672f62019-12-10 10:32:29 +0000696 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache,
697 sizeof(*flush_cache));
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000698
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000699 kfree(flush_cache);
700
701 return rc;
702}
703
David Brazdil0f672f62019-12-10 10:32:29 +0000704int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info,
705 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length,
706 struct pqi_raid_error_info *error_info)
707{
708 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU,
709 buffer, buffer_length, error_info);
710}
711
712#define PQI_FETCH_PTRAID_DATA (1UL<<31)
713
714static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000715{
716 int rc;
David Brazdil0f672f62019-12-10 10:32:29 +0000717 struct bmic_diag_options *diag;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000718
David Brazdil0f672f62019-12-10 10:32:29 +0000719 diag = kzalloc(sizeof(*diag), GFP_KERNEL);
720 if (!diag)
721 return -ENOMEM;
722
723 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS,
724 diag, sizeof(*diag));
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000725 if (rc)
David Brazdil0f672f62019-12-10 10:32:29 +0000726 goto out;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000727
David Brazdil0f672f62019-12-10 10:32:29 +0000728 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000729
David Brazdil0f672f62019-12-10 10:32:29 +0000730 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS,
731 diag, sizeof(*diag));
732out:
733 kfree(diag);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000734
735 return rc;
736}
737
David Brazdil0f672f62019-12-10 10:32:29 +0000738static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info,
739 void *buffer, size_t buffer_length)
740{
741 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS,
742 buffer, buffer_length);
743}
744
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000745#pragma pack(1)
746
747struct bmic_host_wellness_driver_version {
748 u8 start_tag[4];
749 u8 driver_version_tag[2];
750 __le16 driver_version_length;
751 char driver_version[32];
David Brazdil0f672f62019-12-10 10:32:29 +0000752 u8 dont_write_tag[2];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000753 u8 end_tag[2];
754};
755
756#pragma pack()
757
758static int pqi_write_driver_version_to_host_wellness(
759 struct pqi_ctrl_info *ctrl_info)
760{
761 int rc;
762 struct bmic_host_wellness_driver_version *buffer;
763 size_t buffer_length;
764
765 buffer_length = sizeof(*buffer);
766
767 buffer = kmalloc(buffer_length, GFP_KERNEL);
768 if (!buffer)
769 return -ENOMEM;
770
771 buffer->start_tag[0] = '<';
772 buffer->start_tag[1] = 'H';
773 buffer->start_tag[2] = 'W';
774 buffer->start_tag[3] = '>';
775 buffer->driver_version_tag[0] = 'D';
776 buffer->driver_version_tag[1] = 'V';
777 put_unaligned_le16(sizeof(buffer->driver_version),
778 &buffer->driver_version_length);
779 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION,
780 sizeof(buffer->driver_version) - 1);
781 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0';
David Brazdil0f672f62019-12-10 10:32:29 +0000782 buffer->dont_write_tag[0] = 'D';
783 buffer->dont_write_tag[1] = 'W';
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000784 buffer->end_tag[0] = 'Z';
785 buffer->end_tag[1] = 'Z';
786
787 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
788
789 kfree(buffer);
790
791 return rc;
792}
793
794#pragma pack(1)
795
796struct bmic_host_wellness_time {
797 u8 start_tag[4];
798 u8 time_tag[2];
799 __le16 time_length;
800 u8 time[8];
801 u8 dont_write_tag[2];
802 u8 end_tag[2];
803};
804
805#pragma pack()
806
807static int pqi_write_current_time_to_host_wellness(
808 struct pqi_ctrl_info *ctrl_info)
809{
810 int rc;
811 struct bmic_host_wellness_time *buffer;
812 size_t buffer_length;
813 time64_t local_time;
814 unsigned int year;
815 struct tm tm;
816
817 buffer_length = sizeof(*buffer);
818
819 buffer = kmalloc(buffer_length, GFP_KERNEL);
820 if (!buffer)
821 return -ENOMEM;
822
823 buffer->start_tag[0] = '<';
824 buffer->start_tag[1] = 'H';
825 buffer->start_tag[2] = 'W';
826 buffer->start_tag[3] = '>';
827 buffer->time_tag[0] = 'T';
828 buffer->time_tag[1] = 'D';
829 put_unaligned_le16(sizeof(buffer->time),
830 &buffer->time_length);
831
832 local_time = ktime_get_real_seconds();
833 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm);
834 year = tm.tm_year + 1900;
835
836 buffer->time[0] = bin2bcd(tm.tm_hour);
837 buffer->time[1] = bin2bcd(tm.tm_min);
838 buffer->time[2] = bin2bcd(tm.tm_sec);
839 buffer->time[3] = 0;
840 buffer->time[4] = bin2bcd(tm.tm_mon + 1);
841 buffer->time[5] = bin2bcd(tm.tm_mday);
842 buffer->time[6] = bin2bcd(year / 100);
843 buffer->time[7] = bin2bcd(year % 100);
844
845 buffer->dont_write_tag[0] = 'D';
846 buffer->dont_write_tag[1] = 'W';
847 buffer->end_tag[0] = 'Z';
848 buffer->end_tag[1] = 'Z';
849
850 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
851
852 kfree(buffer);
853
854 return rc;
855}
856
David Brazdil0f672f62019-12-10 10:32:29 +0000857#define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * PQI_HZ)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000858
859static void pqi_update_time_worker(struct work_struct *work)
860{
861 int rc;
862 struct pqi_ctrl_info *ctrl_info;
863
864 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
865 update_time_work);
866
867 if (pqi_ctrl_offline(ctrl_info))
868 return;
869
870 rc = pqi_write_current_time_to_host_wellness(ctrl_info);
871 if (rc)
872 dev_warn(&ctrl_info->pci_dev->dev,
873 "error updating time on controller\n");
874
875 schedule_delayed_work(&ctrl_info->update_time_work,
876 PQI_UPDATE_TIME_WORK_INTERVAL);
877}
878
879static inline void pqi_schedule_update_time_worker(
880 struct pqi_ctrl_info *ctrl_info)
881{
882 schedule_delayed_work(&ctrl_info->update_time_work, 0);
883}
884
885static inline void pqi_cancel_update_time_worker(
886 struct pqi_ctrl_info *ctrl_info)
887{
888 cancel_delayed_work_sync(&ctrl_info->update_time_work);
889}
890
David Brazdil0f672f62019-12-10 10:32:29 +0000891static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000892 void *buffer, size_t buffer_length)
893{
David Brazdil0f672f62019-12-10 10:32:29 +0000894 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer,
895 buffer_length);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000896}
897
898static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd,
899 void **buffer)
900{
901 int rc;
902 size_t lun_list_length;
903 size_t lun_data_length;
904 size_t new_lun_list_length;
905 void *lun_data = NULL;
906 struct report_lun_header *report_lun_header;
907
908 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL);
909 if (!report_lun_header) {
910 rc = -ENOMEM;
911 goto out;
912 }
913
914 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header,
915 sizeof(*report_lun_header));
916 if (rc)
917 goto out;
918
919 lun_list_length = get_unaligned_be32(&report_lun_header->list_length);
920
921again:
922 lun_data_length = sizeof(struct report_lun_header) + lun_list_length;
923
924 lun_data = kmalloc(lun_data_length, GFP_KERNEL);
925 if (!lun_data) {
926 rc = -ENOMEM;
927 goto out;
928 }
929
930 if (lun_list_length == 0) {
931 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header));
932 goto out;
933 }
934
935 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length);
936 if (rc)
937 goto out;
938
939 new_lun_list_length = get_unaligned_be32(
940 &((struct report_lun_header *)lun_data)->list_length);
941
942 if (new_lun_list_length > lun_list_length) {
943 lun_list_length = new_lun_list_length;
944 kfree(lun_data);
945 goto again;
946 }
947
948out:
949 kfree(report_lun_header);
950
951 if (rc) {
952 kfree(lun_data);
953 lun_data = NULL;
954 }
955
956 *buffer = lun_data;
957
958 return rc;
959}
960
961static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info,
962 void **buffer)
963{
964 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS,
965 buffer);
966}
967
968static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info,
969 void **buffer)
970{
971 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer);
972}
973
974static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info,
975 struct report_phys_lun_extended **physdev_list,
976 struct report_log_lun_extended **logdev_list)
977{
978 int rc;
979 size_t logdev_list_length;
980 size_t logdev_data_length;
981 struct report_log_lun_extended *internal_logdev_list;
982 struct report_log_lun_extended *logdev_data;
983 struct report_lun_header report_lun_header;
984
985 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list);
986 if (rc)
987 dev_err(&ctrl_info->pci_dev->dev,
988 "report physical LUNs failed\n");
989
990 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list);
991 if (rc)
992 dev_err(&ctrl_info->pci_dev->dev,
993 "report logical LUNs failed\n");
994
995 /*
996 * Tack the controller itself onto the end of the logical device list.
997 */
998
999 logdev_data = *logdev_list;
1000
1001 if (logdev_data) {
1002 logdev_list_length =
1003 get_unaligned_be32(&logdev_data->header.list_length);
1004 } else {
1005 memset(&report_lun_header, 0, sizeof(report_lun_header));
1006 logdev_data =
1007 (struct report_log_lun_extended *)&report_lun_header;
1008 logdev_list_length = 0;
1009 }
1010
1011 logdev_data_length = sizeof(struct report_lun_header) +
1012 logdev_list_length;
1013
1014 internal_logdev_list = kmalloc(logdev_data_length +
1015 sizeof(struct report_log_lun_extended), GFP_KERNEL);
1016 if (!internal_logdev_list) {
1017 kfree(*logdev_list);
1018 *logdev_list = NULL;
1019 return -ENOMEM;
1020 }
1021
1022 memcpy(internal_logdev_list, logdev_data, logdev_data_length);
1023 memset((u8 *)internal_logdev_list + logdev_data_length, 0,
1024 sizeof(struct report_log_lun_extended_entry));
1025 put_unaligned_be32(logdev_list_length +
1026 sizeof(struct report_log_lun_extended_entry),
1027 &internal_logdev_list->header.list_length);
1028
1029 kfree(*logdev_list);
1030 *logdev_list = internal_logdev_list;
1031
1032 return 0;
1033}
1034
1035static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device,
1036 int bus, int target, int lun)
1037{
1038 device->bus = bus;
1039 device->target = target;
1040 device->lun = lun;
1041}
1042
1043static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device)
1044{
1045 u8 *scsi3addr;
1046 u32 lunid;
1047 int bus;
1048 int target;
1049 int lun;
1050
1051 scsi3addr = device->scsi3addr;
1052 lunid = get_unaligned_le32(scsi3addr);
1053
1054 if (pqi_is_hba_lunid(scsi3addr)) {
1055 /* The specified device is the controller. */
1056 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff);
1057 device->target_lun_valid = true;
1058 return;
1059 }
1060
1061 if (pqi_is_logical_device(device)) {
1062 if (device->is_external_raid_device) {
1063 bus = PQI_EXTERNAL_RAID_VOLUME_BUS;
1064 target = (lunid >> 16) & 0x3fff;
1065 lun = lunid & 0xff;
1066 } else {
1067 bus = PQI_RAID_VOLUME_BUS;
1068 target = 0;
1069 lun = lunid & 0x3fff;
1070 }
1071 pqi_set_bus_target_lun(device, bus, target, lun);
1072 device->target_lun_valid = true;
1073 return;
1074 }
1075
1076 /*
1077 * Defer target and LUN assignment for non-controller physical devices
1078 * because the SAS transport layer will make these assignments later.
1079 */
1080 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0);
1081}
1082
1083static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info,
1084 struct pqi_scsi_dev *device)
1085{
1086 int rc;
1087 u8 raid_level;
1088 u8 *buffer;
1089
1090 raid_level = SA_RAID_UNKNOWN;
1091
1092 buffer = kmalloc(64, GFP_KERNEL);
1093 if (buffer) {
1094 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1095 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64);
1096 if (rc == 0) {
1097 raid_level = buffer[8];
1098 if (raid_level > SA_RAID_MAX)
1099 raid_level = SA_RAID_UNKNOWN;
1100 }
1101 kfree(buffer);
1102 }
1103
1104 device->raid_level = raid_level;
1105}
1106
1107static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info,
1108 struct pqi_scsi_dev *device, struct raid_map *raid_map)
1109{
1110 char *err_msg;
1111 u32 raid_map_size;
1112 u32 r5or6_blocks_per_row;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001113
1114 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1115
1116 if (raid_map_size < offsetof(struct raid_map, disk_data)) {
1117 err_msg = "RAID map too small";
1118 goto bad_raid_map;
1119 }
1120
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001121 if (device->raid_level == SA_RAID_1) {
1122 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) {
1123 err_msg = "invalid RAID-1 map";
1124 goto bad_raid_map;
1125 }
1126 } else if (device->raid_level == SA_RAID_ADM) {
1127 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) {
1128 err_msg = "invalid RAID-1(ADM) map";
1129 goto bad_raid_map;
1130 }
1131 } else if ((device->raid_level == SA_RAID_5 ||
1132 device->raid_level == SA_RAID_6) &&
1133 get_unaligned_le16(&raid_map->layout_map_count) > 1) {
1134 /* RAID 50/60 */
1135 r5or6_blocks_per_row =
1136 get_unaligned_le16(&raid_map->strip_size) *
1137 get_unaligned_le16(&raid_map->data_disks_per_row);
1138 if (r5or6_blocks_per_row == 0) {
1139 err_msg = "invalid RAID-5 or RAID-6 map";
1140 goto bad_raid_map;
1141 }
1142 }
1143
1144 return 0;
1145
1146bad_raid_map:
1147 dev_warn(&ctrl_info->pci_dev->dev,
1148 "logical device %08x%08x %s\n",
1149 *((u32 *)&device->scsi3addr),
1150 *((u32 *)&device->scsi3addr[4]), err_msg);
1151
1152 return -EINVAL;
1153}
1154
1155static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info,
1156 struct pqi_scsi_dev *device)
1157{
1158 int rc;
David Brazdil0f672f62019-12-10 10:32:29 +00001159 u32 raid_map_size;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001160 struct raid_map *raid_map;
1161
1162 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL);
1163 if (!raid_map)
1164 return -ENOMEM;
1165
David Brazdil0f672f62019-12-10 10:32:29 +00001166 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1167 device->scsi3addr, raid_map, sizeof(*raid_map),
1168 0, NULL, NO_TIMEOUT);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001169
1170 if (rc)
1171 goto error;
1172
David Brazdil0f672f62019-12-10 10:32:29 +00001173 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1174
1175 if (raid_map_size > sizeof(*raid_map)) {
1176
1177 kfree(raid_map);
1178
1179 raid_map = kmalloc(raid_map_size, GFP_KERNEL);
1180 if (!raid_map)
1181 return -ENOMEM;
1182
1183 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1184 device->scsi3addr, raid_map, raid_map_size,
1185 0, NULL, NO_TIMEOUT);
1186 if (rc)
1187 goto error;
1188
1189 if (get_unaligned_le32(&raid_map->structure_size)
1190 != raid_map_size) {
1191 dev_warn(&ctrl_info->pci_dev->dev,
1192 "Requested %d bytes, received %d bytes",
1193 raid_map_size,
1194 get_unaligned_le32(&raid_map->structure_size));
Olivier Deprez0e641232021-09-23 10:07:05 +02001195 rc = -EINVAL;
David Brazdil0f672f62019-12-10 10:32:29 +00001196 goto error;
1197 }
1198 }
1199
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001200 rc = pqi_validate_raid_map(ctrl_info, device, raid_map);
1201 if (rc)
1202 goto error;
1203
1204 device->raid_map = raid_map;
1205
1206 return 0;
1207
1208error:
1209 kfree(raid_map);
1210
1211 return rc;
1212}
1213
1214static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info,
1215 struct pqi_scsi_dev *device)
1216{
1217 int rc;
1218 u8 *buffer;
1219 u8 bypass_status;
1220
1221 buffer = kmalloc(64, GFP_KERNEL);
1222 if (!buffer)
1223 return;
1224
1225 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1226 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64);
1227 if (rc)
1228 goto out;
1229
1230#define RAID_BYPASS_STATUS 4
1231#define RAID_BYPASS_CONFIGURED 0x1
1232#define RAID_BYPASS_ENABLED 0x2
1233
1234 bypass_status = buffer[RAID_BYPASS_STATUS];
1235 device->raid_bypass_configured =
1236 (bypass_status & RAID_BYPASS_CONFIGURED) != 0;
1237 if (device->raid_bypass_configured &&
1238 (bypass_status & RAID_BYPASS_ENABLED) &&
1239 pqi_get_raid_map(ctrl_info, device) == 0)
1240 device->raid_bypass_enabled = true;
1241
1242out:
1243 kfree(buffer);
1244}
1245
1246/*
1247 * Use vendor-specific VPD to determine online/offline status of a volume.
1248 */
1249
1250static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info,
1251 struct pqi_scsi_dev *device)
1252{
1253 int rc;
1254 size_t page_length;
1255 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE;
1256 bool volume_offline = true;
1257 u32 volume_flags;
1258 struct ciss_vpd_logical_volume_status *vpd;
1259
1260 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL);
1261 if (!vpd)
1262 goto no_buffer;
1263
1264 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1265 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd));
1266 if (rc)
1267 goto out;
1268
David Brazdil0f672f62019-12-10 10:32:29 +00001269 if (vpd->page_code != CISS_VPD_LV_STATUS)
1270 goto out;
1271
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001272 page_length = offsetof(struct ciss_vpd_logical_volume_status,
1273 volume_status) + vpd->page_length;
1274 if (page_length < sizeof(*vpd))
1275 goto out;
1276
1277 volume_status = vpd->volume_status;
1278 volume_flags = get_unaligned_be32(&vpd->flags);
1279 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0;
1280
1281out:
1282 kfree(vpd);
1283no_buffer:
1284 device->volume_status = volume_status;
1285 device->volume_offline = volume_offline;
1286}
1287
1288#define PQI_INQUIRY_PAGE0_RETRIES 3
1289
1290static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info,
1291 struct pqi_scsi_dev *device)
1292{
1293 int rc;
1294 u8 *buffer;
1295 unsigned int retries;
1296
David Brazdil0f672f62019-12-10 10:32:29 +00001297 if (device->is_expander_smp_device)
1298 return 0;
1299
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001300 buffer = kmalloc(64, GFP_KERNEL);
1301 if (!buffer)
1302 return -ENOMEM;
1303
1304 /* Send an inquiry to the device to see what it is. */
1305 for (retries = 0;;) {
1306 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0,
1307 buffer, 64);
1308 if (rc == 0)
1309 break;
1310 if (pqi_is_logical_device(device) ||
1311 rc != PQI_CMD_STATUS_ABORTED ||
1312 ++retries > PQI_INQUIRY_PAGE0_RETRIES)
1313 goto out;
1314 }
1315
1316 scsi_sanitize_inquiry_string(&buffer[8], 8);
1317 scsi_sanitize_inquiry_string(&buffer[16], 16);
1318
1319 device->devtype = buffer[0] & 0x1f;
1320 memcpy(device->vendor, &buffer[8], sizeof(device->vendor));
1321 memcpy(device->model, &buffer[16], sizeof(device->model));
1322
1323 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) {
1324 if (device->is_external_raid_device) {
1325 device->raid_level = SA_RAID_UNKNOWN;
1326 device->volume_status = CISS_LV_OK;
1327 device->volume_offline = false;
1328 } else {
1329 pqi_get_raid_level(ctrl_info, device);
1330 pqi_get_raid_bypass_status(ctrl_info, device);
1331 pqi_get_volume_status(ctrl_info, device);
1332 }
1333 }
1334
1335out:
1336 kfree(buffer);
1337
1338 return rc;
1339}
1340
1341static void pqi_get_physical_disk_info(struct pqi_ctrl_info *ctrl_info,
1342 struct pqi_scsi_dev *device,
1343 struct bmic_identify_physical_device *id_phys)
1344{
1345 int rc;
1346
1347 memset(id_phys, 0, sizeof(*id_phys));
1348
1349 rc = pqi_identify_physical_device(ctrl_info, device,
1350 id_phys, sizeof(*id_phys));
1351 if (rc) {
1352 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH;
1353 return;
1354 }
David Brazdil0f672f62019-12-10 10:32:29 +00001355 device->box_index = id_phys->box_index;
1356 device->phys_box_on_bus = id_phys->phys_box_on_bus;
1357 device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001358 device->queue_depth =
1359 get_unaligned_le16(&id_phys->current_queue_depth_limit);
1360 device->device_type = id_phys->device_type;
1361 device->active_path_index = id_phys->active_path_number;
1362 device->path_map = id_phys->redundant_path_present_map;
1363 memcpy(&device->box,
1364 &id_phys->alternate_paths_phys_box_on_port,
1365 sizeof(device->box));
1366 memcpy(&device->phys_connector,
1367 &id_phys->alternate_paths_phys_connector,
1368 sizeof(device->phys_connector));
1369 device->bay = id_phys->phys_bay_in_box;
1370}
1371
1372static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info,
1373 struct pqi_scsi_dev *device)
1374{
1375 char *status;
1376 static const char unknown_state_str[] =
1377 "Volume is in an unknown state (%u)";
1378 char unknown_state_buffer[sizeof(unknown_state_str) + 10];
1379
1380 switch (device->volume_status) {
1381 case CISS_LV_OK:
1382 status = "Volume online";
1383 break;
1384 case CISS_LV_FAILED:
1385 status = "Volume failed";
1386 break;
1387 case CISS_LV_NOT_CONFIGURED:
1388 status = "Volume not configured";
1389 break;
1390 case CISS_LV_DEGRADED:
1391 status = "Volume degraded";
1392 break;
1393 case CISS_LV_READY_FOR_RECOVERY:
1394 status = "Volume ready for recovery operation";
1395 break;
1396 case CISS_LV_UNDERGOING_RECOVERY:
1397 status = "Volume undergoing recovery";
1398 break;
1399 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED:
1400 status = "Wrong physical drive was replaced";
1401 break;
1402 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM:
1403 status = "A physical drive not properly connected";
1404 break;
1405 case CISS_LV_HARDWARE_OVERHEATING:
1406 status = "Hardware is overheating";
1407 break;
1408 case CISS_LV_HARDWARE_HAS_OVERHEATED:
1409 status = "Hardware has overheated";
1410 break;
1411 case CISS_LV_UNDERGOING_EXPANSION:
1412 status = "Volume undergoing expansion";
1413 break;
1414 case CISS_LV_NOT_AVAILABLE:
1415 status = "Volume waiting for transforming volume";
1416 break;
1417 case CISS_LV_QUEUED_FOR_EXPANSION:
1418 status = "Volume queued for expansion";
1419 break;
1420 case CISS_LV_DISABLED_SCSI_ID_CONFLICT:
1421 status = "Volume disabled due to SCSI ID conflict";
1422 break;
1423 case CISS_LV_EJECTED:
1424 status = "Volume has been ejected";
1425 break;
1426 case CISS_LV_UNDERGOING_ERASE:
1427 status = "Volume undergoing background erase";
1428 break;
1429 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD:
1430 status = "Volume ready for predictive spare rebuild";
1431 break;
1432 case CISS_LV_UNDERGOING_RPI:
1433 status = "Volume undergoing rapid parity initialization";
1434 break;
1435 case CISS_LV_PENDING_RPI:
1436 status = "Volume queued for rapid parity initialization";
1437 break;
1438 case CISS_LV_ENCRYPTED_NO_KEY:
1439 status = "Encrypted volume inaccessible - key not present";
1440 break;
1441 case CISS_LV_UNDERGOING_ENCRYPTION:
1442 status = "Volume undergoing encryption process";
1443 break;
1444 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING:
1445 status = "Volume undergoing encryption re-keying process";
1446 break;
1447 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1448 status = "Volume encrypted but encryption is disabled";
1449 break;
1450 case CISS_LV_PENDING_ENCRYPTION:
1451 status = "Volume pending migration to encrypted state";
1452 break;
1453 case CISS_LV_PENDING_ENCRYPTION_REKEYING:
1454 status = "Volume pending encryption rekeying";
1455 break;
1456 case CISS_LV_NOT_SUPPORTED:
1457 status = "Volume not supported on this controller";
1458 break;
1459 case CISS_LV_STATUS_UNAVAILABLE:
1460 status = "Volume status not available";
1461 break;
1462 default:
1463 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer),
1464 unknown_state_str, device->volume_status);
1465 status = unknown_state_buffer;
1466 break;
1467 }
1468
1469 dev_info(&ctrl_info->pci_dev->dev,
1470 "scsi %d:%d:%d:%d %s\n",
1471 ctrl_info->scsi_host->host_no,
1472 device->bus, device->target, device->lun, status);
1473}
1474
1475static void pqi_rescan_worker(struct work_struct *work)
1476{
1477 struct pqi_ctrl_info *ctrl_info;
1478
1479 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
1480 rescan_work);
1481
1482 pqi_scan_scsi_devices(ctrl_info);
1483}
1484
1485static int pqi_add_device(struct pqi_ctrl_info *ctrl_info,
1486 struct pqi_scsi_dev *device)
1487{
1488 int rc;
1489
1490 if (pqi_is_logical_device(device))
1491 rc = scsi_add_device(ctrl_info->scsi_host, device->bus,
1492 device->target, device->lun);
1493 else
1494 rc = pqi_add_sas_device(ctrl_info->sas_host, device);
1495
1496 return rc;
1497}
1498
David Brazdil0f672f62019-12-10 10:32:29 +00001499#define PQI_PENDING_IO_TIMEOUT_SECS 20
1500
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001501static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info,
1502 struct pqi_scsi_dev *device)
1503{
David Brazdil0f672f62019-12-10 10:32:29 +00001504 int rc;
1505
1506 pqi_device_remove_start(device);
1507
1508 rc = pqi_device_wait_for_pending_io(ctrl_info, device,
1509 PQI_PENDING_IO_TIMEOUT_SECS);
1510 if (rc)
1511 dev_err(&ctrl_info->pci_dev->dev,
1512 "scsi %d:%d:%d:%d removing device with %d outstanding commands\n",
1513 ctrl_info->scsi_host->host_no, device->bus,
1514 device->target, device->lun,
1515 atomic_read(&device->scsi_cmds_outstanding));
1516
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001517 if (pqi_is_logical_device(device))
1518 scsi_remove_device(device->sdev);
1519 else
1520 pqi_remove_sas_device(device);
1521}
1522
1523/* Assumes the SCSI device list lock is held. */
1524
1525static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info,
1526 int bus, int target, int lun)
1527{
1528 struct pqi_scsi_dev *device;
1529
1530 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1531 scsi_device_list_entry)
1532 if (device->bus == bus && device->target == target &&
1533 device->lun == lun)
1534 return device;
1535
1536 return NULL;
1537}
1538
1539static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1,
1540 struct pqi_scsi_dev *dev2)
1541{
1542 if (dev1->is_physical_device != dev2->is_physical_device)
1543 return false;
1544
1545 if (dev1->is_physical_device)
1546 return dev1->wwid == dev2->wwid;
1547
1548 return memcmp(dev1->volume_id, dev2->volume_id,
1549 sizeof(dev1->volume_id)) == 0;
1550}
1551
1552enum pqi_find_result {
1553 DEVICE_NOT_FOUND,
1554 DEVICE_CHANGED,
1555 DEVICE_SAME,
1556};
1557
1558static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info,
1559 struct pqi_scsi_dev *device_to_find,
1560 struct pqi_scsi_dev **matching_device)
1561{
1562 struct pqi_scsi_dev *device;
1563
1564 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1565 scsi_device_list_entry) {
1566 if (pqi_scsi3addr_equal(device_to_find->scsi3addr,
1567 device->scsi3addr)) {
1568 *matching_device = device;
1569 if (pqi_device_equal(device_to_find, device)) {
1570 if (device_to_find->volume_offline)
1571 return DEVICE_CHANGED;
1572 return DEVICE_SAME;
1573 }
1574 return DEVICE_CHANGED;
1575 }
1576 }
1577
1578 return DEVICE_NOT_FOUND;
1579}
1580
David Brazdil0f672f62019-12-10 10:32:29 +00001581static inline const char *pqi_device_type(struct pqi_scsi_dev *device)
1582{
1583 if (device->is_expander_smp_device)
1584 return "Enclosure SMP ";
1585
1586 return scsi_device_type(device->devtype);
1587}
1588
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001589#define PQI_DEV_INFO_BUFFER_LENGTH 128
1590
1591static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info,
1592 char *action, struct pqi_scsi_dev *device)
1593{
1594 ssize_t count;
1595 char buffer[PQI_DEV_INFO_BUFFER_LENGTH];
1596
1597 count = snprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH,
1598 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus);
1599
1600 if (device->target_lun_valid)
1601 count += snprintf(buffer + count,
1602 PQI_DEV_INFO_BUFFER_LENGTH - count,
1603 "%d:%d",
1604 device->target,
1605 device->lun);
1606 else
1607 count += snprintf(buffer + count,
1608 PQI_DEV_INFO_BUFFER_LENGTH - count,
1609 "-:-");
1610
1611 if (pqi_is_logical_device(device))
1612 count += snprintf(buffer + count,
1613 PQI_DEV_INFO_BUFFER_LENGTH - count,
1614 " %08x%08x",
1615 *((u32 *)&device->scsi3addr),
1616 *((u32 *)&device->scsi3addr[4]));
1617 else
1618 count += snprintf(buffer + count,
1619 PQI_DEV_INFO_BUFFER_LENGTH - count,
1620 " %016llx", device->sas_address);
1621
1622 count += snprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count,
1623 " %s %.8s %.16s ",
David Brazdil0f672f62019-12-10 10:32:29 +00001624 pqi_device_type(device),
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001625 device->vendor,
1626 device->model);
1627
1628 if (pqi_is_logical_device(device)) {
1629 if (device->devtype == TYPE_DISK)
1630 count += snprintf(buffer + count,
1631 PQI_DEV_INFO_BUFFER_LENGTH - count,
1632 "SSDSmartPathCap%c En%c %-12s",
1633 device->raid_bypass_configured ? '+' : '-',
1634 device->raid_bypass_enabled ? '+' : '-',
1635 pqi_raid_level_to_string(device->raid_level));
1636 } else {
1637 count += snprintf(buffer + count,
1638 PQI_DEV_INFO_BUFFER_LENGTH - count,
1639 "AIO%c", device->aio_enabled ? '+' : '-');
1640 if (device->devtype == TYPE_DISK ||
1641 device->devtype == TYPE_ZBC)
1642 count += snprintf(buffer + count,
1643 PQI_DEV_INFO_BUFFER_LENGTH - count,
1644 " qd=%-6d", device->queue_depth);
1645 }
1646
1647 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer);
1648}
1649
1650/* Assumes the SCSI device list lock is held. */
1651
1652static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device,
1653 struct pqi_scsi_dev *new_device)
1654{
1655 existing_device->devtype = new_device->devtype;
1656 existing_device->device_type = new_device->device_type;
1657 existing_device->bus = new_device->bus;
1658 if (new_device->target_lun_valid) {
1659 existing_device->target = new_device->target;
1660 existing_device->lun = new_device->lun;
1661 existing_device->target_lun_valid = true;
1662 }
1663
1664 /* By definition, the scsi3addr and wwid fields are already the same. */
1665
1666 existing_device->is_physical_device = new_device->is_physical_device;
1667 existing_device->is_external_raid_device =
1668 new_device->is_external_raid_device;
David Brazdil0f672f62019-12-10 10:32:29 +00001669 existing_device->is_expander_smp_device =
1670 new_device->is_expander_smp_device;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001671 existing_device->aio_enabled = new_device->aio_enabled;
1672 memcpy(existing_device->vendor, new_device->vendor,
1673 sizeof(existing_device->vendor));
1674 memcpy(existing_device->model, new_device->model,
1675 sizeof(existing_device->model));
1676 existing_device->sas_address = new_device->sas_address;
1677 existing_device->raid_level = new_device->raid_level;
1678 existing_device->queue_depth = new_device->queue_depth;
1679 existing_device->aio_handle = new_device->aio_handle;
1680 existing_device->volume_status = new_device->volume_status;
1681 existing_device->active_path_index = new_device->active_path_index;
1682 existing_device->path_map = new_device->path_map;
1683 existing_device->bay = new_device->bay;
David Brazdil0f672f62019-12-10 10:32:29 +00001684 existing_device->box_index = new_device->box_index;
1685 existing_device->phys_box_on_bus = new_device->phys_box_on_bus;
1686 existing_device->phy_connected_dev_type =
1687 new_device->phy_connected_dev_type;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001688 memcpy(existing_device->box, new_device->box,
1689 sizeof(existing_device->box));
1690 memcpy(existing_device->phys_connector, new_device->phys_connector,
1691 sizeof(existing_device->phys_connector));
1692 existing_device->offload_to_mirror = 0;
1693 kfree(existing_device->raid_map);
1694 existing_device->raid_map = new_device->raid_map;
1695 existing_device->raid_bypass_configured =
1696 new_device->raid_bypass_configured;
1697 existing_device->raid_bypass_enabled =
1698 new_device->raid_bypass_enabled;
David Brazdil0f672f62019-12-10 10:32:29 +00001699 existing_device->device_offline = false;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001700
1701 /* To prevent this from being freed later. */
1702 new_device->raid_map = NULL;
1703}
1704
1705static inline void pqi_free_device(struct pqi_scsi_dev *device)
1706{
1707 if (device) {
1708 kfree(device->raid_map);
1709 kfree(device);
1710 }
1711}
1712
1713/*
1714 * Called when exposing a new device to the OS fails in order to re-adjust
1715 * our internal SCSI device list to match the SCSI ML's view.
1716 */
1717
1718static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info,
1719 struct pqi_scsi_dev *device)
1720{
1721 unsigned long flags;
1722
1723 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1724 list_del(&device->scsi_device_list_entry);
1725 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1726
1727 /* Allow the device structure to be freed later. */
1728 device->keep_device = false;
1729}
1730
David Brazdil0f672f62019-12-10 10:32:29 +00001731static inline bool pqi_is_device_added(struct pqi_scsi_dev *device)
1732{
1733 if (device->is_expander_smp_device)
1734 return device->sas_port != NULL;
1735
1736 return device->sdev != NULL;
1737}
1738
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001739static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info,
1740 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices)
1741{
1742 int rc;
1743 unsigned int i;
1744 unsigned long flags;
1745 enum pqi_find_result find_result;
1746 struct pqi_scsi_dev *device;
1747 struct pqi_scsi_dev *next;
1748 struct pqi_scsi_dev *matching_device;
1749 LIST_HEAD(add_list);
1750 LIST_HEAD(delete_list);
1751
1752 /*
1753 * The idea here is to do as little work as possible while holding the
1754 * spinlock. That's why we go to great pains to defer anything other
1755 * than updating the internal device list until after we release the
1756 * spinlock.
1757 */
1758
1759 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1760
1761 /* Assume that all devices in the existing list have gone away. */
1762 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1763 scsi_device_list_entry)
1764 device->device_gone = true;
1765
1766 for (i = 0; i < num_new_devices; i++) {
1767 device = new_device_list[i];
1768
1769 find_result = pqi_scsi_find_entry(ctrl_info, device,
1770 &matching_device);
1771
1772 switch (find_result) {
1773 case DEVICE_SAME:
1774 /*
1775 * The newly found device is already in the existing
1776 * device list.
1777 */
1778 device->new_device = false;
1779 matching_device->device_gone = false;
1780 pqi_scsi_update_device(matching_device, device);
1781 break;
1782 case DEVICE_NOT_FOUND:
1783 /*
1784 * The newly found device is NOT in the existing device
1785 * list.
1786 */
1787 device->new_device = true;
1788 break;
1789 case DEVICE_CHANGED:
1790 /*
1791 * The original device has gone away and we need to add
1792 * the new device.
1793 */
1794 device->new_device = true;
1795 break;
1796 }
1797 }
1798
1799 /* Process all devices that have gone away. */
1800 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list,
1801 scsi_device_list_entry) {
1802 if (device->device_gone) {
1803 list_del(&device->scsi_device_list_entry);
1804 list_add_tail(&device->delete_list_entry, &delete_list);
1805 }
1806 }
1807
1808 /* Process all new devices. */
1809 for (i = 0; i < num_new_devices; i++) {
1810 device = new_device_list[i];
1811 if (!device->new_device)
1812 continue;
1813 if (device->volume_offline)
1814 continue;
1815 list_add_tail(&device->scsi_device_list_entry,
1816 &ctrl_info->scsi_device_list);
1817 list_add_tail(&device->add_list_entry, &add_list);
1818 /* To prevent this device structure from being freed later. */
1819 device->keep_device = true;
1820 }
1821
1822 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1823
David Brazdil0f672f62019-12-10 10:32:29 +00001824 if (pqi_ctrl_in_ofa(ctrl_info))
1825 pqi_ctrl_ofa_done(ctrl_info);
1826
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001827 /* Remove all devices that have gone away. */
1828 list_for_each_entry_safe(device, next, &delete_list,
1829 delete_list_entry) {
1830 if (device->volume_offline) {
1831 pqi_dev_info(ctrl_info, "offline", device);
1832 pqi_show_volume_status(ctrl_info, device);
1833 } else {
1834 pqi_dev_info(ctrl_info, "removed", device);
1835 }
David Brazdil0f672f62019-12-10 10:32:29 +00001836 if (pqi_is_device_added(device))
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001837 pqi_remove_device(ctrl_info, device);
1838 list_del(&device->delete_list_entry);
1839 pqi_free_device(device);
1840 }
1841
1842 /*
1843 * Notify the SCSI ML if the queue depth of any existing device has
1844 * changed.
1845 */
1846 list_for_each_entry(device, &ctrl_info->scsi_device_list,
1847 scsi_device_list_entry) {
1848 if (device->sdev && device->queue_depth !=
1849 device->advertised_queue_depth) {
1850 device->advertised_queue_depth = device->queue_depth;
1851 scsi_change_queue_depth(device->sdev,
1852 device->advertised_queue_depth);
1853 }
1854 }
1855
1856 /* Expose any new devices. */
1857 list_for_each_entry_safe(device, next, &add_list, add_list_entry) {
David Brazdil0f672f62019-12-10 10:32:29 +00001858 if (!pqi_is_device_added(device)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001859 pqi_dev_info(ctrl_info, "added", device);
1860 rc = pqi_add_device(ctrl_info, device);
1861 if (rc) {
1862 dev_warn(&ctrl_info->pci_dev->dev,
1863 "scsi %d:%d:%d:%d addition failed, device not added\n",
1864 ctrl_info->scsi_host->host_no,
1865 device->bus, device->target,
1866 device->lun);
1867 pqi_fixup_botched_add(ctrl_info, device);
1868 }
1869 }
1870 }
1871}
1872
1873static bool pqi_is_supported_device(struct pqi_scsi_dev *device)
1874{
David Brazdil0f672f62019-12-10 10:32:29 +00001875 bool is_supported;
1876
1877 if (device->is_expander_smp_device)
1878 return true;
1879
1880 is_supported = false;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001881
1882 switch (device->devtype) {
1883 case TYPE_DISK:
1884 case TYPE_ZBC:
1885 case TYPE_TAPE:
1886 case TYPE_MEDIUM_CHANGER:
1887 case TYPE_ENCLOSURE:
1888 is_supported = true;
1889 break;
1890 case TYPE_RAID:
1891 /*
1892 * Only support the HBA controller itself as a RAID
1893 * controller. If it's a RAID controller other than
1894 * the HBA itself (an external RAID controller, for
1895 * example), we don't support it.
1896 */
1897 if (pqi_is_hba_lunid(device->scsi3addr))
1898 is_supported = true;
1899 break;
1900 }
1901
1902 return is_supported;
1903}
1904
1905static inline bool pqi_skip_device(u8 *scsi3addr)
1906{
1907 /* Ignore all masked devices. */
1908 if (MASKED_DEVICE(scsi3addr))
1909 return true;
1910
1911 return false;
1912}
1913
David Brazdil0f672f62019-12-10 10:32:29 +00001914static inline void pqi_mask_device(u8 *scsi3addr)
1915{
1916 scsi3addr[3] |= 0xc0;
1917}
1918
1919static inline bool pqi_is_device_with_sas_address(struct pqi_scsi_dev *device)
1920{
1921 if (!device->is_physical_device)
1922 return false;
1923
1924 if (device->is_expander_smp_device)
1925 return true;
1926
1927 switch (device->devtype) {
1928 case TYPE_DISK:
1929 case TYPE_ZBC:
1930 case TYPE_ENCLOSURE:
1931 return true;
1932 }
1933
1934 return false;
1935}
1936
1937static inline bool pqi_expose_device(struct pqi_scsi_dev *device)
1938{
1939 return !device->is_physical_device ||
1940 !pqi_skip_device(device->scsi3addr);
1941}
1942
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001943static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info)
1944{
1945 int i;
1946 int rc;
1947 LIST_HEAD(new_device_list_head);
1948 struct report_phys_lun_extended *physdev_list = NULL;
1949 struct report_log_lun_extended *logdev_list = NULL;
1950 struct report_phys_lun_extended_entry *phys_lun_ext_entry;
1951 struct report_log_lun_extended_entry *log_lun_ext_entry;
1952 struct bmic_identify_physical_device *id_phys = NULL;
1953 u32 num_physicals;
1954 u32 num_logicals;
1955 struct pqi_scsi_dev **new_device_list = NULL;
1956 struct pqi_scsi_dev *device;
1957 struct pqi_scsi_dev *next;
1958 unsigned int num_new_devices;
1959 unsigned int num_valid_devices;
1960 bool is_physical_device;
1961 u8 *scsi3addr;
David Brazdil0f672f62019-12-10 10:32:29 +00001962 unsigned int physical_index;
1963 unsigned int logical_index;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001964 static char *out_of_memory_msg =
1965 "failed to allocate memory, device discovery stopped";
1966
1967 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list);
1968 if (rc)
1969 goto out;
1970
1971 if (physdev_list)
1972 num_physicals =
1973 get_unaligned_be32(&physdev_list->header.list_length)
1974 / sizeof(physdev_list->lun_entries[0]);
1975 else
1976 num_physicals = 0;
1977
1978 if (logdev_list)
1979 num_logicals =
1980 get_unaligned_be32(&logdev_list->header.list_length)
1981 / sizeof(logdev_list->lun_entries[0]);
1982 else
1983 num_logicals = 0;
1984
1985 if (num_physicals) {
1986 /*
1987 * We need this buffer for calls to pqi_get_physical_disk_info()
1988 * below. We allocate it here instead of inside
1989 * pqi_get_physical_disk_info() because it's a fairly large
1990 * buffer.
1991 */
1992 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL);
1993 if (!id_phys) {
1994 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
1995 out_of_memory_msg);
1996 rc = -ENOMEM;
1997 goto out;
1998 }
David Brazdil0f672f62019-12-10 10:32:29 +00001999 if (pqi_hide_vsep) {
2000 int i;
2001
2002 for (i = num_physicals - 1; i >= 0; i--) {
2003 phys_lun_ext_entry =
2004 &physdev_list->lun_entries[i];
2005 if (CISS_GET_DRIVE_NUMBER(
2006 phys_lun_ext_entry->lunid) ==
2007 PQI_VSEP_CISS_BTL) {
2008 pqi_mask_device(
2009 phys_lun_ext_entry->lunid);
2010 break;
2011 }
2012 }
2013 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002014 }
2015
2016 num_new_devices = num_physicals + num_logicals;
2017
2018 new_device_list = kmalloc_array(num_new_devices,
2019 sizeof(*new_device_list),
2020 GFP_KERNEL);
2021 if (!new_device_list) {
2022 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg);
2023 rc = -ENOMEM;
2024 goto out;
2025 }
2026
2027 for (i = 0; i < num_new_devices; i++) {
2028 device = kzalloc(sizeof(*device), GFP_KERNEL);
2029 if (!device) {
2030 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2031 out_of_memory_msg);
2032 rc = -ENOMEM;
2033 goto out;
2034 }
2035 list_add_tail(&device->new_device_list_entry,
2036 &new_device_list_head);
2037 }
2038
2039 device = NULL;
2040 num_valid_devices = 0;
David Brazdil0f672f62019-12-10 10:32:29 +00002041 physical_index = 0;
2042 logical_index = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002043
2044 for (i = 0; i < num_new_devices; i++) {
2045
David Brazdil0f672f62019-12-10 10:32:29 +00002046 if ((!pqi_expose_ld_first && i < num_physicals) ||
2047 (pqi_expose_ld_first && i >= num_logicals)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002048 is_physical_device = true;
David Brazdil0f672f62019-12-10 10:32:29 +00002049 phys_lun_ext_entry =
2050 &physdev_list->lun_entries[physical_index++];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002051 log_lun_ext_entry = NULL;
2052 scsi3addr = phys_lun_ext_entry->lunid;
2053 } else {
2054 is_physical_device = false;
2055 phys_lun_ext_entry = NULL;
2056 log_lun_ext_entry =
David Brazdil0f672f62019-12-10 10:32:29 +00002057 &logdev_list->lun_entries[logical_index++];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002058 scsi3addr = log_lun_ext_entry->lunid;
2059 }
2060
2061 if (is_physical_device && pqi_skip_device(scsi3addr))
2062 continue;
2063
2064 if (device)
2065 device = list_next_entry(device, new_device_list_entry);
2066 else
2067 device = list_first_entry(&new_device_list_head,
2068 struct pqi_scsi_dev, new_device_list_entry);
2069
2070 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
2071 device->is_physical_device = is_physical_device;
David Brazdil0f672f62019-12-10 10:32:29 +00002072 if (is_physical_device) {
2073 if (phys_lun_ext_entry->device_type ==
2074 SA_EXPANDER_SMP_DEVICE)
2075 device->is_expander_smp_device = true;
2076 } else {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002077 device->is_external_raid_device =
2078 pqi_is_external_raid_addr(scsi3addr);
David Brazdil0f672f62019-12-10 10:32:29 +00002079 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002080
2081 /* Gather information about the device. */
2082 rc = pqi_get_device_info(ctrl_info, device);
2083 if (rc == -ENOMEM) {
2084 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2085 out_of_memory_msg);
2086 goto out;
2087 }
2088 if (rc) {
2089 if (device->is_physical_device)
2090 dev_warn(&ctrl_info->pci_dev->dev,
2091 "obtaining device info failed, skipping physical device %016llx\n",
2092 get_unaligned_be64(
2093 &phys_lun_ext_entry->wwid));
2094 else
2095 dev_warn(&ctrl_info->pci_dev->dev,
2096 "obtaining device info failed, skipping logical device %08x%08x\n",
2097 *((u32 *)&device->scsi3addr),
2098 *((u32 *)&device->scsi3addr[4]));
2099 rc = 0;
2100 continue;
2101 }
2102
2103 if (!pqi_is_supported_device(device))
2104 continue;
2105
2106 pqi_assign_bus_target_lun(device);
2107
2108 if (device->is_physical_device) {
2109 device->wwid = phys_lun_ext_entry->wwid;
2110 if ((phys_lun_ext_entry->device_flags &
2111 REPORT_PHYS_LUN_DEV_FLAG_AIO_ENABLED) &&
David Brazdil0f672f62019-12-10 10:32:29 +00002112 phys_lun_ext_entry->aio_handle) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002113 device->aio_enabled = true;
David Brazdil0f672f62019-12-10 10:32:29 +00002114 device->aio_handle =
2115 phys_lun_ext_entry->aio_handle;
2116 }
2117
2118 pqi_get_physical_disk_info(ctrl_info,
2119 device, id_phys);
2120
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002121 } else {
2122 memcpy(device->volume_id, log_lun_ext_entry->volume_id,
2123 sizeof(device->volume_id));
2124 }
2125
David Brazdil0f672f62019-12-10 10:32:29 +00002126 if (pqi_is_device_with_sas_address(device))
2127 device->sas_address = get_unaligned_be64(&device->wwid);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002128
2129 new_device_list[num_valid_devices++] = device;
2130 }
2131
2132 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices);
2133
2134out:
2135 list_for_each_entry_safe(device, next, &new_device_list_head,
2136 new_device_list_entry) {
2137 if (device->keep_device)
2138 continue;
2139 list_del(&device->new_device_list_entry);
2140 pqi_free_device(device);
2141 }
2142
2143 kfree(new_device_list);
2144 kfree(physdev_list);
2145 kfree(logdev_list);
2146 kfree(id_phys);
2147
2148 return rc;
2149}
2150
2151static void pqi_remove_all_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2152{
2153 unsigned long flags;
2154 struct pqi_scsi_dev *device;
2155
2156 while (1) {
2157 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
2158
2159 device = list_first_entry_or_null(&ctrl_info->scsi_device_list,
2160 struct pqi_scsi_dev, scsi_device_list_entry);
2161 if (device)
2162 list_del(&device->scsi_device_list_entry);
2163
2164 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
2165 flags);
2166
2167 if (!device)
2168 break;
2169
David Brazdil0f672f62019-12-10 10:32:29 +00002170 if (pqi_is_device_added(device))
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002171 pqi_remove_device(ctrl_info, device);
2172 pqi_free_device(device);
2173 }
2174}
2175
2176static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2177{
David Brazdil0f672f62019-12-10 10:32:29 +00002178 int rc = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002179
2180 if (pqi_ctrl_offline(ctrl_info))
2181 return -ENXIO;
2182
David Brazdil0f672f62019-12-10 10:32:29 +00002183 if (!mutex_trylock(&ctrl_info->scan_mutex)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002184 pqi_schedule_rescan_worker_delayed(ctrl_info);
David Brazdil0f672f62019-12-10 10:32:29 +00002185 rc = -EINPROGRESS;
2186 } else {
2187 rc = pqi_update_scsi_devices(ctrl_info);
2188 if (rc)
2189 pqi_schedule_rescan_worker_delayed(ctrl_info);
2190 mutex_unlock(&ctrl_info->scan_mutex);
2191 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002192
2193 return rc;
2194}
2195
2196static void pqi_scan_start(struct Scsi_Host *shost)
2197{
David Brazdil0f672f62019-12-10 10:32:29 +00002198 struct pqi_ctrl_info *ctrl_info;
2199
2200 ctrl_info = shost_to_hba(shost);
2201 if (pqi_ctrl_in_ofa(ctrl_info))
2202 return;
2203
2204 pqi_scan_scsi_devices(ctrl_info);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002205}
2206
2207/* Returns TRUE if scan is finished. */
2208
2209static int pqi_scan_finished(struct Scsi_Host *shost,
2210 unsigned long elapsed_time)
2211{
2212 struct pqi_ctrl_info *ctrl_info;
2213
2214 ctrl_info = shost_priv(shost);
2215
2216 return !mutex_is_locked(&ctrl_info->scan_mutex);
2217}
2218
2219static void pqi_wait_until_scan_finished(struct pqi_ctrl_info *ctrl_info)
2220{
2221 mutex_lock(&ctrl_info->scan_mutex);
2222 mutex_unlock(&ctrl_info->scan_mutex);
2223}
2224
2225static void pqi_wait_until_lun_reset_finished(struct pqi_ctrl_info *ctrl_info)
2226{
2227 mutex_lock(&ctrl_info->lun_reset_mutex);
2228 mutex_unlock(&ctrl_info->lun_reset_mutex);
2229}
2230
David Brazdil0f672f62019-12-10 10:32:29 +00002231static void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info)
2232{
2233 mutex_lock(&ctrl_info->ofa_mutex);
2234 mutex_unlock(&ctrl_info->ofa_mutex);
2235}
2236
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002237static inline void pqi_set_encryption_info(
2238 struct pqi_encryption_info *encryption_info, struct raid_map *raid_map,
2239 u64 first_block)
2240{
2241 u32 volume_blk_size;
2242
2243 /*
2244 * Set the encryption tweak values based on logical block address.
2245 * If the block size is 512, the tweak value is equal to the LBA.
2246 * For other block sizes, tweak value is (LBA * block size) / 512.
2247 */
2248 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size);
2249 if (volume_blk_size != 512)
2250 first_block = (first_block * volume_blk_size) / 512;
2251
2252 encryption_info->data_encryption_key_index =
2253 get_unaligned_le16(&raid_map->data_encryption_key_index);
2254 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block);
2255 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block);
2256}
2257
2258/*
2259 * Attempt to perform RAID bypass mapping for a logical volume I/O.
2260 */
2261
2262#define PQI_RAID_BYPASS_INELIGIBLE 1
2263
2264static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
2265 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
2266 struct pqi_queue_group *queue_group)
2267{
2268 struct raid_map *raid_map;
2269 bool is_write = false;
2270 u32 map_index;
2271 u64 first_block;
2272 u64 last_block;
2273 u32 block_cnt;
2274 u32 blocks_per_row;
2275 u64 first_row;
2276 u64 last_row;
2277 u32 first_row_offset;
2278 u32 last_row_offset;
2279 u32 first_column;
2280 u32 last_column;
2281 u64 r0_first_row;
2282 u64 r0_last_row;
2283 u32 r5or6_blocks_per_row;
2284 u64 r5or6_first_row;
2285 u64 r5or6_last_row;
2286 u32 r5or6_first_row_offset;
2287 u32 r5or6_last_row_offset;
2288 u32 r5or6_first_column;
2289 u32 r5or6_last_column;
2290 u16 data_disks_per_row;
2291 u32 total_disks_per_row;
2292 u16 layout_map_count;
2293 u32 stripesize;
2294 u16 strip_size;
2295 u32 first_group;
2296 u32 last_group;
2297 u32 current_group;
2298 u32 map_row;
2299 u32 aio_handle;
2300 u64 disk_block;
2301 u32 disk_block_cnt;
2302 u8 cdb[16];
2303 u8 cdb_length;
2304 int offload_to_mirror;
2305 struct pqi_encryption_info *encryption_info_ptr;
2306 struct pqi_encryption_info encryption_info;
2307#if BITS_PER_LONG == 32
2308 u64 tmpdiv;
2309#endif
2310
2311 /* Check for valid opcode, get LBA and block count. */
2312 switch (scmd->cmnd[0]) {
2313 case WRITE_6:
2314 is_write = true;
2315 /* fall through */
2316 case READ_6:
2317 first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) |
2318 (scmd->cmnd[2] << 8) | scmd->cmnd[3]);
2319 block_cnt = (u32)scmd->cmnd[4];
2320 if (block_cnt == 0)
2321 block_cnt = 256;
2322 break;
2323 case WRITE_10:
2324 is_write = true;
2325 /* fall through */
2326 case READ_10:
2327 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2328 block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]);
2329 break;
2330 case WRITE_12:
2331 is_write = true;
2332 /* fall through */
2333 case READ_12:
2334 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2335 block_cnt = get_unaligned_be32(&scmd->cmnd[6]);
2336 break;
2337 case WRITE_16:
2338 is_write = true;
2339 /* fall through */
2340 case READ_16:
2341 first_block = get_unaligned_be64(&scmd->cmnd[2]);
2342 block_cnt = get_unaligned_be32(&scmd->cmnd[10]);
2343 break;
2344 default:
2345 /* Process via normal I/O path. */
2346 return PQI_RAID_BYPASS_INELIGIBLE;
2347 }
2348
2349 /* Check for write to non-RAID-0. */
2350 if (is_write && device->raid_level != SA_RAID_0)
2351 return PQI_RAID_BYPASS_INELIGIBLE;
2352
2353 if (unlikely(block_cnt == 0))
2354 return PQI_RAID_BYPASS_INELIGIBLE;
2355
2356 last_block = first_block + block_cnt - 1;
2357 raid_map = device->raid_map;
2358
2359 /* Check for invalid block or wraparound. */
2360 if (last_block >= get_unaligned_le64(&raid_map->volume_blk_cnt) ||
2361 last_block < first_block)
2362 return PQI_RAID_BYPASS_INELIGIBLE;
2363
2364 data_disks_per_row = get_unaligned_le16(&raid_map->data_disks_per_row);
2365 strip_size = get_unaligned_le16(&raid_map->strip_size);
2366 layout_map_count = get_unaligned_le16(&raid_map->layout_map_count);
2367
2368 /* Calculate stripe information for the request. */
2369 blocks_per_row = data_disks_per_row * strip_size;
2370#if BITS_PER_LONG == 32
2371 tmpdiv = first_block;
2372 do_div(tmpdiv, blocks_per_row);
2373 first_row = tmpdiv;
2374 tmpdiv = last_block;
2375 do_div(tmpdiv, blocks_per_row);
2376 last_row = tmpdiv;
2377 first_row_offset = (u32)(first_block - (first_row * blocks_per_row));
2378 last_row_offset = (u32)(last_block - (last_row * blocks_per_row));
2379 tmpdiv = first_row_offset;
2380 do_div(tmpdiv, strip_size);
2381 first_column = tmpdiv;
2382 tmpdiv = last_row_offset;
2383 do_div(tmpdiv, strip_size);
2384 last_column = tmpdiv;
2385#else
2386 first_row = first_block / blocks_per_row;
2387 last_row = last_block / blocks_per_row;
2388 first_row_offset = (u32)(first_block - (first_row * blocks_per_row));
2389 last_row_offset = (u32)(last_block - (last_row * blocks_per_row));
2390 first_column = first_row_offset / strip_size;
2391 last_column = last_row_offset / strip_size;
2392#endif
2393
2394 /* If this isn't a single row/column then give to the controller. */
2395 if (first_row != last_row || first_column != last_column)
2396 return PQI_RAID_BYPASS_INELIGIBLE;
2397
2398 /* Proceeding with driver mapping. */
2399 total_disks_per_row = data_disks_per_row +
2400 get_unaligned_le16(&raid_map->metadata_disks_per_row);
2401 map_row = ((u32)(first_row >> raid_map->parity_rotation_shift)) %
2402 get_unaligned_le16(&raid_map->row_cnt);
2403 map_index = (map_row * total_disks_per_row) + first_column;
2404
2405 /* RAID 1 */
2406 if (device->raid_level == SA_RAID_1) {
2407 if (device->offload_to_mirror)
2408 map_index += data_disks_per_row;
2409 device->offload_to_mirror = !device->offload_to_mirror;
2410 } else if (device->raid_level == SA_RAID_ADM) {
2411 /* RAID ADM */
2412 /*
2413 * Handles N-way mirrors (R1-ADM) and R10 with # of drives
2414 * divisible by 3.
2415 */
2416 offload_to_mirror = device->offload_to_mirror;
2417 if (offload_to_mirror == 0) {
2418 /* use physical disk in the first mirrored group. */
2419 map_index %= data_disks_per_row;
2420 } else {
2421 do {
2422 /*
2423 * Determine mirror group that map_index
2424 * indicates.
2425 */
2426 current_group = map_index / data_disks_per_row;
2427
2428 if (offload_to_mirror != current_group) {
2429 if (current_group <
2430 layout_map_count - 1) {
2431 /*
2432 * Select raid index from
2433 * next group.
2434 */
2435 map_index += data_disks_per_row;
2436 current_group++;
2437 } else {
2438 /*
2439 * Select raid index from first
2440 * group.
2441 */
2442 map_index %= data_disks_per_row;
2443 current_group = 0;
2444 }
2445 }
2446 } while (offload_to_mirror != current_group);
2447 }
2448
2449 /* Set mirror group to use next time. */
2450 offload_to_mirror =
2451 (offload_to_mirror >= layout_map_count - 1) ?
2452 0 : offload_to_mirror + 1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002453 device->offload_to_mirror = offload_to_mirror;
2454 /*
2455 * Avoid direct use of device->offload_to_mirror within this
2456 * function since multiple threads might simultaneously
2457 * increment it beyond the range of device->layout_map_count -1.
2458 */
2459 } else if ((device->raid_level == SA_RAID_5 ||
2460 device->raid_level == SA_RAID_6) && layout_map_count > 1) {
2461 /* RAID 50/60 */
2462 /* Verify first and last block are in same RAID group */
2463 r5or6_blocks_per_row = strip_size * data_disks_per_row;
2464 stripesize = r5or6_blocks_per_row * layout_map_count;
2465#if BITS_PER_LONG == 32
2466 tmpdiv = first_block;
2467 first_group = do_div(tmpdiv, stripesize);
2468 tmpdiv = first_group;
2469 do_div(tmpdiv, r5or6_blocks_per_row);
2470 first_group = tmpdiv;
2471 tmpdiv = last_block;
2472 last_group = do_div(tmpdiv, stripesize);
2473 tmpdiv = last_group;
2474 do_div(tmpdiv, r5or6_blocks_per_row);
2475 last_group = tmpdiv;
2476#else
2477 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
2478 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
2479#endif
2480 if (first_group != last_group)
2481 return PQI_RAID_BYPASS_INELIGIBLE;
2482
2483 /* Verify request is in a single row of RAID 5/6 */
2484#if BITS_PER_LONG == 32
2485 tmpdiv = first_block;
2486 do_div(tmpdiv, stripesize);
2487 first_row = r5or6_first_row = r0_first_row = tmpdiv;
2488 tmpdiv = last_block;
2489 do_div(tmpdiv, stripesize);
2490 r5or6_last_row = r0_last_row = tmpdiv;
2491#else
2492 first_row = r5or6_first_row = r0_first_row =
2493 first_block / stripesize;
2494 r5or6_last_row = r0_last_row = last_block / stripesize;
2495#endif
2496 if (r5or6_first_row != r5or6_last_row)
2497 return PQI_RAID_BYPASS_INELIGIBLE;
2498
2499 /* Verify request is in a single column */
2500#if BITS_PER_LONG == 32
2501 tmpdiv = first_block;
2502 first_row_offset = do_div(tmpdiv, stripesize);
2503 tmpdiv = first_row_offset;
2504 first_row_offset = (u32)do_div(tmpdiv, r5or6_blocks_per_row);
2505 r5or6_first_row_offset = first_row_offset;
2506 tmpdiv = last_block;
2507 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
2508 tmpdiv = r5or6_last_row_offset;
2509 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
2510 tmpdiv = r5or6_first_row_offset;
2511 do_div(tmpdiv, strip_size);
2512 first_column = r5or6_first_column = tmpdiv;
2513 tmpdiv = r5or6_last_row_offset;
2514 do_div(tmpdiv, strip_size);
2515 r5or6_last_column = tmpdiv;
2516#else
2517 first_row_offset = r5or6_first_row_offset =
2518 (u32)((first_block % stripesize) %
2519 r5or6_blocks_per_row);
2520
2521 r5or6_last_row_offset =
2522 (u32)((last_block % stripesize) %
2523 r5or6_blocks_per_row);
2524
2525 first_column = r5or6_first_row_offset / strip_size;
2526 r5or6_first_column = first_column;
2527 r5or6_last_column = r5or6_last_row_offset / strip_size;
2528#endif
2529 if (r5or6_first_column != r5or6_last_column)
2530 return PQI_RAID_BYPASS_INELIGIBLE;
2531
2532 /* Request is eligible */
2533 map_row =
2534 ((u32)(first_row >> raid_map->parity_rotation_shift)) %
2535 get_unaligned_le16(&raid_map->row_cnt);
2536
2537 map_index = (first_group *
2538 (get_unaligned_le16(&raid_map->row_cnt) *
2539 total_disks_per_row)) +
2540 (map_row * total_disks_per_row) + first_column;
2541 }
2542
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002543 aio_handle = raid_map->disk_data[map_index].aio_handle;
2544 disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) +
2545 first_row * strip_size +
2546 (first_row_offset - first_column * strip_size);
2547 disk_block_cnt = block_cnt;
2548
2549 /* Handle differing logical/physical block sizes. */
2550 if (raid_map->phys_blk_shift) {
2551 disk_block <<= raid_map->phys_blk_shift;
2552 disk_block_cnt <<= raid_map->phys_blk_shift;
2553 }
2554
2555 if (unlikely(disk_block_cnt > 0xffff))
2556 return PQI_RAID_BYPASS_INELIGIBLE;
2557
2558 /* Build the new CDB for the physical disk I/O. */
2559 if (disk_block > 0xffffffff) {
2560 cdb[0] = is_write ? WRITE_16 : READ_16;
2561 cdb[1] = 0;
2562 put_unaligned_be64(disk_block, &cdb[2]);
2563 put_unaligned_be32(disk_block_cnt, &cdb[10]);
2564 cdb[14] = 0;
2565 cdb[15] = 0;
2566 cdb_length = 16;
2567 } else {
2568 cdb[0] = is_write ? WRITE_10 : READ_10;
2569 cdb[1] = 0;
2570 put_unaligned_be32((u32)disk_block, &cdb[2]);
2571 cdb[6] = 0;
2572 put_unaligned_be16((u16)disk_block_cnt, &cdb[7]);
2573 cdb[9] = 0;
2574 cdb_length = 10;
2575 }
2576
2577 if (get_unaligned_le16(&raid_map->flags) &
2578 RAID_MAP_ENCRYPTION_ENABLED) {
2579 pqi_set_encryption_info(&encryption_info, raid_map,
2580 first_block);
2581 encryption_info_ptr = &encryption_info;
2582 } else {
2583 encryption_info_ptr = NULL;
2584 }
2585
2586 return pqi_aio_submit_io(ctrl_info, scmd, aio_handle,
2587 cdb, cdb_length, queue_group, encryption_info_ptr, true);
2588}
2589
2590#define PQI_STATUS_IDLE 0x0
2591
2592#define PQI_CREATE_ADMIN_QUEUE_PAIR 1
2593#define PQI_DELETE_ADMIN_QUEUE_PAIR 2
2594
2595#define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0
2596#define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1
2597#define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2
2598#define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3
2599#define PQI_DEVICE_STATE_ERROR 0x4
2600
2601#define PQI_MODE_READY_TIMEOUT_SECS 30
2602#define PQI_MODE_READY_POLL_INTERVAL_MSECS 1
2603
2604static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info)
2605{
2606 struct pqi_device_registers __iomem *pqi_registers;
2607 unsigned long timeout;
2608 u64 signature;
2609 u8 status;
2610
2611 pqi_registers = ctrl_info->pqi_registers;
David Brazdil0f672f62019-12-10 10:32:29 +00002612 timeout = (PQI_MODE_READY_TIMEOUT_SECS * PQI_HZ) + jiffies;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002613
2614 while (1) {
2615 signature = readq(&pqi_registers->signature);
2616 if (memcmp(&signature, PQI_DEVICE_SIGNATURE,
2617 sizeof(signature)) == 0)
2618 break;
2619 if (time_after(jiffies, timeout)) {
2620 dev_err(&ctrl_info->pci_dev->dev,
2621 "timed out waiting for PQI signature\n");
2622 return -ETIMEDOUT;
2623 }
2624 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2625 }
2626
2627 while (1) {
2628 status = readb(&pqi_registers->function_and_status_code);
2629 if (status == PQI_STATUS_IDLE)
2630 break;
2631 if (time_after(jiffies, timeout)) {
2632 dev_err(&ctrl_info->pci_dev->dev,
2633 "timed out waiting for PQI IDLE\n");
2634 return -ETIMEDOUT;
2635 }
2636 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2637 }
2638
2639 while (1) {
2640 if (readl(&pqi_registers->device_status) ==
2641 PQI_DEVICE_STATE_ALL_REGISTERS_READY)
2642 break;
2643 if (time_after(jiffies, timeout)) {
2644 dev_err(&ctrl_info->pci_dev->dev,
2645 "timed out waiting for PQI all registers ready\n");
2646 return -ETIMEDOUT;
2647 }
2648 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2649 }
2650
2651 return 0;
2652}
2653
2654static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request)
2655{
2656 struct pqi_scsi_dev *device;
2657
2658 device = io_request->scmd->device->hostdata;
2659 device->raid_bypass_enabled = false;
2660 device->aio_enabled = false;
2661}
2662
2663static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path)
2664{
2665 struct pqi_ctrl_info *ctrl_info;
2666 struct pqi_scsi_dev *device;
2667
2668 device = sdev->hostdata;
2669 if (device->device_offline)
2670 return;
2671
2672 device->device_offline = true;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002673 ctrl_info = shost_to_hba(sdev->host);
2674 pqi_schedule_rescan_worker(ctrl_info);
David Brazdil0f672f62019-12-10 10:32:29 +00002675 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n",
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002676 path, ctrl_info->scsi_host->host_no, device->bus,
2677 device->target, device->lun);
2678}
2679
2680static void pqi_process_raid_io_error(struct pqi_io_request *io_request)
2681{
2682 u8 scsi_status;
2683 u8 host_byte;
2684 struct scsi_cmnd *scmd;
2685 struct pqi_raid_error_info *error_info;
2686 size_t sense_data_length;
2687 int residual_count;
2688 int xfer_count;
2689 struct scsi_sense_hdr sshdr;
2690
2691 scmd = io_request->scmd;
2692 if (!scmd)
2693 return;
2694
2695 error_info = io_request->error_info;
2696 scsi_status = error_info->status;
2697 host_byte = DID_OK;
2698
2699 switch (error_info->data_out_result) {
2700 case PQI_DATA_IN_OUT_GOOD:
2701 break;
2702 case PQI_DATA_IN_OUT_UNDERFLOW:
2703 xfer_count =
2704 get_unaligned_le32(&error_info->data_out_transferred);
2705 residual_count = scsi_bufflen(scmd) - xfer_count;
2706 scsi_set_resid(scmd, residual_count);
2707 if (xfer_count < scmd->underflow)
2708 host_byte = DID_SOFT_ERROR;
2709 break;
2710 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
2711 case PQI_DATA_IN_OUT_ABORTED:
2712 host_byte = DID_ABORT;
2713 break;
2714 case PQI_DATA_IN_OUT_TIMEOUT:
2715 host_byte = DID_TIME_OUT;
2716 break;
2717 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
2718 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
2719 case PQI_DATA_IN_OUT_BUFFER_ERROR:
2720 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
2721 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
2722 case PQI_DATA_IN_OUT_ERROR:
2723 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
2724 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
2725 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
2726 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
2727 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
2728 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
2729 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
2730 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
2731 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
2732 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
2733 default:
2734 host_byte = DID_ERROR;
2735 break;
2736 }
2737
2738 sense_data_length = get_unaligned_le16(&error_info->sense_data_length);
2739 if (sense_data_length == 0)
2740 sense_data_length =
2741 get_unaligned_le16(&error_info->response_data_length);
2742 if (sense_data_length) {
2743 if (sense_data_length > sizeof(error_info->data))
2744 sense_data_length = sizeof(error_info->data);
2745
2746 if (scsi_status == SAM_STAT_CHECK_CONDITION &&
2747 scsi_normalize_sense(error_info->data,
2748 sense_data_length, &sshdr) &&
2749 sshdr.sense_key == HARDWARE_ERROR &&
David Brazdil0f672f62019-12-10 10:32:29 +00002750 sshdr.asc == 0x3e) {
2751 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host);
2752 struct pqi_scsi_dev *device = scmd->device->hostdata;
2753
2754 switch (sshdr.ascq) {
2755 case 0x1: /* LOGICAL UNIT FAILURE */
2756 if (printk_ratelimit())
2757 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n",
2758 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
2759 pqi_take_device_offline(scmd->device, "RAID");
2760 host_byte = DID_NO_CONNECT;
2761 break;
2762
2763 default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */
2764 if (printk_ratelimit())
2765 scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n",
2766 sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
2767 break;
2768 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002769 }
2770
2771 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
2772 sense_data_length = SCSI_SENSE_BUFFERSIZE;
2773 memcpy(scmd->sense_buffer, error_info->data,
2774 sense_data_length);
2775 }
2776
2777 scmd->result = scsi_status;
2778 set_host_byte(scmd, host_byte);
2779}
2780
2781static void pqi_process_aio_io_error(struct pqi_io_request *io_request)
2782{
2783 u8 scsi_status;
2784 u8 host_byte;
2785 struct scsi_cmnd *scmd;
2786 struct pqi_aio_error_info *error_info;
2787 size_t sense_data_length;
2788 int residual_count;
2789 int xfer_count;
2790 bool device_offline;
2791
2792 scmd = io_request->scmd;
2793 error_info = io_request->error_info;
2794 host_byte = DID_OK;
2795 sense_data_length = 0;
2796 device_offline = false;
2797
2798 switch (error_info->service_response) {
2799 case PQI_AIO_SERV_RESPONSE_COMPLETE:
2800 scsi_status = error_info->status;
2801 break;
2802 case PQI_AIO_SERV_RESPONSE_FAILURE:
2803 switch (error_info->status) {
2804 case PQI_AIO_STATUS_IO_ABORTED:
2805 scsi_status = SAM_STAT_TASK_ABORTED;
2806 break;
2807 case PQI_AIO_STATUS_UNDERRUN:
2808 scsi_status = SAM_STAT_GOOD;
2809 residual_count = get_unaligned_le32(
2810 &error_info->residual_count);
2811 scsi_set_resid(scmd, residual_count);
2812 xfer_count = scsi_bufflen(scmd) - residual_count;
2813 if (xfer_count < scmd->underflow)
2814 host_byte = DID_SOFT_ERROR;
2815 break;
2816 case PQI_AIO_STATUS_OVERRUN:
2817 scsi_status = SAM_STAT_GOOD;
2818 break;
2819 case PQI_AIO_STATUS_AIO_PATH_DISABLED:
2820 pqi_aio_path_disabled(io_request);
2821 scsi_status = SAM_STAT_GOOD;
2822 io_request->status = -EAGAIN;
2823 break;
2824 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE:
2825 case PQI_AIO_STATUS_INVALID_DEVICE:
2826 if (!io_request->raid_bypass) {
2827 device_offline = true;
2828 pqi_take_device_offline(scmd->device, "AIO");
2829 host_byte = DID_NO_CONNECT;
2830 }
2831 scsi_status = SAM_STAT_CHECK_CONDITION;
2832 break;
2833 case PQI_AIO_STATUS_IO_ERROR:
2834 default:
2835 scsi_status = SAM_STAT_CHECK_CONDITION;
2836 break;
2837 }
2838 break;
2839 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE:
2840 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED:
2841 scsi_status = SAM_STAT_GOOD;
2842 break;
2843 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED:
2844 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN:
2845 default:
2846 scsi_status = SAM_STAT_CHECK_CONDITION;
2847 break;
2848 }
2849
2850 if (error_info->data_present) {
2851 sense_data_length =
2852 get_unaligned_le16(&error_info->data_length);
2853 if (sense_data_length) {
2854 if (sense_data_length > sizeof(error_info->data))
2855 sense_data_length = sizeof(error_info->data);
2856 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
2857 sense_data_length = SCSI_SENSE_BUFFERSIZE;
2858 memcpy(scmd->sense_buffer, error_info->data,
2859 sense_data_length);
2860 }
2861 }
2862
2863 if (device_offline && sense_data_length == 0)
2864 scsi_build_sense_buffer(0, scmd->sense_buffer, HARDWARE_ERROR,
2865 0x3e, 0x1);
2866
2867 scmd->result = scsi_status;
2868 set_host_byte(scmd, host_byte);
2869}
2870
2871static void pqi_process_io_error(unsigned int iu_type,
2872 struct pqi_io_request *io_request)
2873{
2874 switch (iu_type) {
2875 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
2876 pqi_process_raid_io_error(io_request);
2877 break;
2878 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
2879 pqi_process_aio_io_error(io_request);
2880 break;
2881 }
2882}
2883
2884static int pqi_interpret_task_management_response(
2885 struct pqi_task_management_response *response)
2886{
2887 int rc;
2888
2889 switch (response->response_code) {
2890 case SOP_TMF_COMPLETE:
2891 case SOP_TMF_FUNCTION_SUCCEEDED:
2892 rc = 0;
2893 break;
David Brazdil0f672f62019-12-10 10:32:29 +00002894 case SOP_TMF_REJECTED:
2895 rc = -EAGAIN;
2896 break;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002897 default:
2898 rc = -EIO;
2899 break;
2900 }
2901
2902 return rc;
2903}
2904
Olivier Deprez0e641232021-09-23 10:07:05 +02002905static inline void pqi_invalid_response(struct pqi_ctrl_info *ctrl_info)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002906{
Olivier Deprez0e641232021-09-23 10:07:05 +02002907 pqi_take_ctrl_offline(ctrl_info);
2908}
2909
2910static int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, struct pqi_queue_group *queue_group)
2911{
2912 int num_responses;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002913 pqi_index_t oq_pi;
2914 pqi_index_t oq_ci;
2915 struct pqi_io_request *io_request;
2916 struct pqi_io_response *response;
2917 u16 request_id;
2918
2919 num_responses = 0;
2920 oq_ci = queue_group->oq_ci_copy;
2921
2922 while (1) {
2923 oq_pi = readl(queue_group->oq_pi);
Olivier Deprez0e641232021-09-23 10:07:05 +02002924 if (oq_pi >= ctrl_info->num_elements_per_oq) {
2925 pqi_invalid_response(ctrl_info);
2926 dev_err(&ctrl_info->pci_dev->dev,
2927 "I/O interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n",
2928 oq_pi, ctrl_info->num_elements_per_oq - 1, oq_ci);
2929 return -1;
2930 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002931 if (oq_pi == oq_ci)
2932 break;
2933
2934 num_responses++;
2935 response = queue_group->oq_element_array +
2936 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
2937
2938 request_id = get_unaligned_le16(&response->request_id);
Olivier Deprez0e641232021-09-23 10:07:05 +02002939 if (request_id >= ctrl_info->max_io_slots) {
2940 pqi_invalid_response(ctrl_info);
2941 dev_err(&ctrl_info->pci_dev->dev,
2942 "request ID in response (%u) out of range (0-%u): producer index: %u consumer index: %u\n",
2943 request_id, ctrl_info->max_io_slots - 1, oq_pi, oq_ci);
2944 return -1;
2945 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002946
2947 io_request = &ctrl_info->io_request_pool[request_id];
Olivier Deprez0e641232021-09-23 10:07:05 +02002948 if (atomic_read(&io_request->refcount) == 0) {
2949 pqi_invalid_response(ctrl_info);
2950 dev_err(&ctrl_info->pci_dev->dev,
2951 "request ID in response (%u) does not match an outstanding I/O request: producer index: %u consumer index: %u\n",
2952 request_id, oq_pi, oq_ci);
2953 return -1;
2954 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002955
2956 switch (response->header.iu_type) {
2957 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS:
2958 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS:
David Brazdil0f672f62019-12-10 10:32:29 +00002959 if (io_request->scmd)
2960 io_request->scmd->result = 0;
2961 /* fall through */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002962 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT:
2963 break;
David Brazdil0f672f62019-12-10 10:32:29 +00002964 case PQI_RESPONSE_IU_VENDOR_GENERAL:
2965 io_request->status =
2966 get_unaligned_le16(
2967 &((struct pqi_vendor_general_response *)
2968 response)->status);
2969 break;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002970 case PQI_RESPONSE_IU_TASK_MANAGEMENT:
2971 io_request->status =
2972 pqi_interpret_task_management_response(
2973 (void *)response);
2974 break;
2975 case PQI_RESPONSE_IU_AIO_PATH_DISABLED:
2976 pqi_aio_path_disabled(io_request);
2977 io_request->status = -EAGAIN;
2978 break;
2979 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
2980 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
2981 io_request->error_info = ctrl_info->error_buffer +
2982 (get_unaligned_le16(&response->error_index) *
2983 PQI_ERROR_BUFFER_ELEMENT_LENGTH);
Olivier Deprez0e641232021-09-23 10:07:05 +02002984 pqi_process_io_error(response->header.iu_type, io_request);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002985 break;
2986 default:
Olivier Deprez0e641232021-09-23 10:07:05 +02002987 pqi_invalid_response(ctrl_info);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002988 dev_err(&ctrl_info->pci_dev->dev,
Olivier Deprez0e641232021-09-23 10:07:05 +02002989 "unexpected IU type: 0x%x: producer index: %u consumer index: %u\n",
2990 response->header.iu_type, oq_pi, oq_ci);
2991 return -1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002992 }
2993
Olivier Deprez0e641232021-09-23 10:07:05 +02002994 io_request->io_complete_callback(io_request, io_request->context);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002995
2996 /*
2997 * Note that the I/O request structure CANNOT BE TOUCHED after
2998 * returning from the I/O completion callback!
2999 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003000 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq;
3001 }
3002
3003 if (num_responses) {
3004 queue_group->oq_ci_copy = oq_ci;
3005 writel(oq_ci, queue_group->oq_ci);
3006 }
3007
3008 return num_responses;
3009}
3010
3011static inline unsigned int pqi_num_elements_free(unsigned int pi,
3012 unsigned int ci, unsigned int elements_in_queue)
3013{
3014 unsigned int num_elements_used;
3015
3016 if (pi >= ci)
3017 num_elements_used = pi - ci;
3018 else
3019 num_elements_used = elements_in_queue - ci + pi;
3020
3021 return elements_in_queue - num_elements_used - 1;
3022}
3023
3024static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info,
3025 struct pqi_event_acknowledge_request *iu, size_t iu_length)
3026{
3027 pqi_index_t iq_pi;
3028 pqi_index_t iq_ci;
3029 unsigned long flags;
3030 void *next_element;
3031 struct pqi_queue_group *queue_group;
3032
3033 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP];
3034 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id);
3035
3036 while (1) {
3037 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags);
3038
3039 iq_pi = queue_group->iq_pi_copy[RAID_PATH];
3040 iq_ci = readl(queue_group->iq_ci[RAID_PATH]);
3041
3042 if (pqi_num_elements_free(iq_pi, iq_ci,
3043 ctrl_info->num_elements_per_iq))
3044 break;
3045
3046 spin_unlock_irqrestore(
3047 &queue_group->submit_lock[RAID_PATH], flags);
3048
3049 if (pqi_ctrl_offline(ctrl_info))
3050 return;
3051 }
3052
3053 next_element = queue_group->iq_element_array[RAID_PATH] +
3054 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3055
3056 memcpy(next_element, iu, iu_length);
3057
3058 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq;
3059 queue_group->iq_pi_copy[RAID_PATH] = iq_pi;
3060
3061 /*
3062 * This write notifies the controller that an IU is available to be
3063 * processed.
3064 */
3065 writel(iq_pi, queue_group->iq_pi[RAID_PATH]);
3066
3067 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags);
3068}
3069
3070static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info,
3071 struct pqi_event *event)
3072{
3073 struct pqi_event_acknowledge_request request;
3074
3075 memset(&request, 0, sizeof(request));
3076
3077 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT;
3078 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
3079 &request.header.iu_length);
3080 request.event_type = event->event_type;
3081 request.event_id = event->event_id;
3082 request.additional_event_id = event->additional_event_id;
3083
3084 pqi_send_event_ack(ctrl_info, &request, sizeof(request));
3085}
3086
David Brazdil0f672f62019-12-10 10:32:29 +00003087#define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30
3088#define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1
3089
3090static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status(
3091 struct pqi_ctrl_info *ctrl_info)
3092{
3093 unsigned long timeout;
3094 u8 status;
3095
3096 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * PQI_HZ) + jiffies;
3097
3098 while (1) {
3099 status = pqi_read_soft_reset_status(ctrl_info);
3100 if (status & PQI_SOFT_RESET_INITIATE)
3101 return RESET_INITIATE_DRIVER;
3102
3103 if (status & PQI_SOFT_RESET_ABORT)
3104 return RESET_ABORT;
3105
3106 if (time_after(jiffies, timeout)) {
3107 dev_err(&ctrl_info->pci_dev->dev,
3108 "timed out waiting for soft reset status\n");
3109 return RESET_TIMEDOUT;
3110 }
3111
3112 if (!sis_is_firmware_running(ctrl_info))
3113 return RESET_NORESPONSE;
3114
3115 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS);
3116 }
3117}
3118
3119static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info,
3120 enum pqi_soft_reset_status reset_status)
3121{
3122 int rc;
3123
3124 switch (reset_status) {
3125 case RESET_INITIATE_DRIVER:
3126 /* fall through */
3127 case RESET_TIMEDOUT:
3128 dev_info(&ctrl_info->pci_dev->dev,
3129 "resetting controller %u\n", ctrl_info->ctrl_id);
3130 sis_soft_reset(ctrl_info);
3131 /* fall through */
3132 case RESET_INITIATE_FIRMWARE:
3133 rc = pqi_ofa_ctrl_restart(ctrl_info);
3134 pqi_ofa_free_host_buffer(ctrl_info);
3135 dev_info(&ctrl_info->pci_dev->dev,
3136 "Online Firmware Activation for controller %u: %s\n",
3137 ctrl_info->ctrl_id, rc == 0 ? "SUCCESS" : "FAILED");
3138 break;
3139 case RESET_ABORT:
3140 pqi_ofa_ctrl_unquiesce(ctrl_info);
3141 dev_info(&ctrl_info->pci_dev->dev,
3142 "Online Firmware Activation for controller %u: %s\n",
3143 ctrl_info->ctrl_id, "ABORTED");
3144 break;
3145 case RESET_NORESPONSE:
3146 pqi_ofa_free_host_buffer(ctrl_info);
3147 pqi_take_ctrl_offline(ctrl_info);
3148 break;
3149 }
3150}
3151
3152static void pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info,
3153 struct pqi_event *event)
3154{
3155 u16 event_id;
3156 enum pqi_soft_reset_status status;
3157
3158 event_id = get_unaligned_le16(&event->event_id);
3159
3160 mutex_lock(&ctrl_info->ofa_mutex);
3161
3162 if (event_id == PQI_EVENT_OFA_QUIESCE) {
3163 dev_info(&ctrl_info->pci_dev->dev,
3164 "Received Online Firmware Activation quiesce event for controller %u\n",
3165 ctrl_info->ctrl_id);
3166 pqi_ofa_ctrl_quiesce(ctrl_info);
3167 pqi_acknowledge_event(ctrl_info, event);
3168 if (ctrl_info->soft_reset_handshake_supported) {
3169 status = pqi_poll_for_soft_reset_status(ctrl_info);
3170 pqi_process_soft_reset(ctrl_info, status);
3171 } else {
3172 pqi_process_soft_reset(ctrl_info,
3173 RESET_INITIATE_FIRMWARE);
3174 }
3175
3176 } else if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) {
3177 pqi_acknowledge_event(ctrl_info, event);
3178 pqi_ofa_setup_host_buffer(ctrl_info,
3179 le32_to_cpu(event->ofa_bytes_requested));
3180 pqi_ofa_host_memory_update(ctrl_info);
3181 } else if (event_id == PQI_EVENT_OFA_CANCELLED) {
3182 pqi_ofa_free_host_buffer(ctrl_info);
3183 pqi_acknowledge_event(ctrl_info, event);
3184 dev_info(&ctrl_info->pci_dev->dev,
3185 "Online Firmware Activation(%u) cancel reason : %u\n",
3186 ctrl_info->ctrl_id, event->ofa_cancel_reason);
3187 }
3188
3189 mutex_unlock(&ctrl_info->ofa_mutex);
3190}
3191
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003192static void pqi_event_worker(struct work_struct *work)
3193{
3194 unsigned int i;
3195 struct pqi_ctrl_info *ctrl_info;
3196 struct pqi_event *event;
3197
3198 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work);
3199
3200 pqi_ctrl_busy(ctrl_info);
3201 pqi_wait_if_ctrl_blocked(ctrl_info, NO_TIMEOUT);
3202 if (pqi_ctrl_offline(ctrl_info))
3203 goto out;
3204
3205 pqi_schedule_rescan_worker_delayed(ctrl_info);
3206
3207 event = ctrl_info->events;
3208 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) {
3209 if (event->pending) {
3210 event->pending = false;
David Brazdil0f672f62019-12-10 10:32:29 +00003211 if (event->event_type == PQI_EVENT_TYPE_OFA) {
3212 pqi_ctrl_unbusy(ctrl_info);
3213 pqi_ofa_process_event(ctrl_info, event);
3214 return;
3215 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003216 pqi_acknowledge_event(ctrl_info, event);
3217 }
3218 event++;
3219 }
3220
3221out:
3222 pqi_ctrl_unbusy(ctrl_info);
3223}
3224
David Brazdil0f672f62019-12-10 10:32:29 +00003225#define PQI_HEARTBEAT_TIMER_INTERVAL (10 * PQI_HZ)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003226
3227static void pqi_heartbeat_timer_handler(struct timer_list *t)
3228{
3229 int num_interrupts;
3230 u32 heartbeat_count;
3231 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t,
3232 heartbeat_timer);
3233
3234 pqi_check_ctrl_health(ctrl_info);
3235 if (pqi_ctrl_offline(ctrl_info))
3236 return;
3237
3238 num_interrupts = atomic_read(&ctrl_info->num_interrupts);
3239 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info);
3240
3241 if (num_interrupts == ctrl_info->previous_num_interrupts) {
3242 if (heartbeat_count == ctrl_info->previous_heartbeat_count) {
3243 dev_err(&ctrl_info->pci_dev->dev,
3244 "no heartbeat detected - last heartbeat count: %u\n",
3245 heartbeat_count);
3246 pqi_take_ctrl_offline(ctrl_info);
3247 return;
3248 }
3249 } else {
3250 ctrl_info->previous_num_interrupts = num_interrupts;
3251 }
3252
3253 ctrl_info->previous_heartbeat_count = heartbeat_count;
3254 mod_timer(&ctrl_info->heartbeat_timer,
3255 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL);
3256}
3257
3258static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3259{
3260 if (!ctrl_info->heartbeat_counter)
3261 return;
3262
3263 ctrl_info->previous_num_interrupts =
3264 atomic_read(&ctrl_info->num_interrupts);
3265 ctrl_info->previous_heartbeat_count =
3266 pqi_read_heartbeat_counter(ctrl_info);
3267
3268 ctrl_info->heartbeat_timer.expires =
3269 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL;
3270 add_timer(&ctrl_info->heartbeat_timer);
3271}
3272
3273static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3274{
3275 del_timer_sync(&ctrl_info->heartbeat_timer);
3276}
3277
3278static inline int pqi_event_type_to_event_index(unsigned int event_type)
3279{
3280 int index;
3281
3282 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++)
3283 if (event_type == pqi_supported_event_types[index])
3284 return index;
3285
3286 return -1;
3287}
3288
3289static inline bool pqi_is_supported_event(unsigned int event_type)
3290{
3291 return pqi_event_type_to_event_index(event_type) != -1;
3292}
3293
David Brazdil0f672f62019-12-10 10:32:29 +00003294static void pqi_ofa_capture_event_payload(struct pqi_event *event,
3295 struct pqi_event_response *response)
3296{
3297 u16 event_id;
3298
3299 event_id = get_unaligned_le16(&event->event_id);
3300
3301 if (event->event_type == PQI_EVENT_TYPE_OFA) {
3302 if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) {
3303 event->ofa_bytes_requested =
3304 response->data.ofa_memory_allocation.bytes_requested;
3305 } else if (event_id == PQI_EVENT_OFA_CANCELLED) {
3306 event->ofa_cancel_reason =
3307 response->data.ofa_cancelled.reason;
3308 }
3309 }
3310}
3311
Olivier Deprez0e641232021-09-23 10:07:05 +02003312static int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003313{
Olivier Deprez0e641232021-09-23 10:07:05 +02003314 int num_events;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003315 pqi_index_t oq_pi;
3316 pqi_index_t oq_ci;
3317 struct pqi_event_queue *event_queue;
3318 struct pqi_event_response *response;
3319 struct pqi_event *event;
3320 int event_index;
3321
3322 event_queue = &ctrl_info->event_queue;
3323 num_events = 0;
3324 oq_ci = event_queue->oq_ci_copy;
3325
3326 while (1) {
3327 oq_pi = readl(event_queue->oq_pi);
Olivier Deprez0e641232021-09-23 10:07:05 +02003328 if (oq_pi >= PQI_NUM_EVENT_QUEUE_ELEMENTS) {
3329 pqi_invalid_response(ctrl_info);
3330 dev_err(&ctrl_info->pci_dev->dev,
3331 "event interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n",
3332 oq_pi, PQI_NUM_EVENT_QUEUE_ELEMENTS - 1, oq_ci);
3333 return -1;
3334 }
3335
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003336 if (oq_pi == oq_ci)
3337 break;
3338
3339 num_events++;
Olivier Deprez0e641232021-09-23 10:07:05 +02003340 response = event_queue->oq_element_array + (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003341
3342 event_index =
3343 pqi_event_type_to_event_index(response->event_type);
3344
Olivier Deprez0e641232021-09-23 10:07:05 +02003345 if (event_index >= 0 && response->request_acknowledge) {
3346 event = &ctrl_info->events[event_index];
3347 event->pending = true;
3348 event->event_type = response->event_type;
3349 event->event_id = response->event_id;
3350 event->additional_event_id = response->additional_event_id;
3351 if (event->event_type == PQI_EVENT_TYPE_OFA)
David Brazdil0f672f62019-12-10 10:32:29 +00003352 pqi_ofa_capture_event_payload(event, response);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003353 }
3354
3355 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS;
3356 }
3357
3358 if (num_events) {
3359 event_queue->oq_ci_copy = oq_ci;
3360 writel(oq_ci, event_queue->oq_ci);
3361 schedule_work(&ctrl_info->event_work);
3362 }
3363
3364 return num_events;
3365}
3366
3367#define PQI_LEGACY_INTX_MASK 0x1
3368
3369static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info,
3370 bool enable_intx)
3371{
3372 u32 intx_mask;
3373 struct pqi_device_registers __iomem *pqi_registers;
3374 volatile void __iomem *register_addr;
3375
3376 pqi_registers = ctrl_info->pqi_registers;
3377
3378 if (enable_intx)
3379 register_addr = &pqi_registers->legacy_intx_mask_clear;
3380 else
3381 register_addr = &pqi_registers->legacy_intx_mask_set;
3382
3383 intx_mask = readl(register_addr);
3384 intx_mask |= PQI_LEGACY_INTX_MASK;
3385 writel(intx_mask, register_addr);
3386}
3387
3388static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info,
3389 enum pqi_irq_mode new_mode)
3390{
3391 switch (ctrl_info->irq_mode) {
3392 case IRQ_MODE_MSIX:
3393 switch (new_mode) {
3394 case IRQ_MODE_MSIX:
3395 break;
3396 case IRQ_MODE_INTX:
3397 pqi_configure_legacy_intx(ctrl_info, true);
3398 sis_enable_intx(ctrl_info);
3399 break;
3400 case IRQ_MODE_NONE:
3401 break;
3402 }
3403 break;
3404 case IRQ_MODE_INTX:
3405 switch (new_mode) {
3406 case IRQ_MODE_MSIX:
3407 pqi_configure_legacy_intx(ctrl_info, false);
3408 sis_enable_msix(ctrl_info);
3409 break;
3410 case IRQ_MODE_INTX:
3411 break;
3412 case IRQ_MODE_NONE:
3413 pqi_configure_legacy_intx(ctrl_info, false);
3414 break;
3415 }
3416 break;
3417 case IRQ_MODE_NONE:
3418 switch (new_mode) {
3419 case IRQ_MODE_MSIX:
3420 sis_enable_msix(ctrl_info);
3421 break;
3422 case IRQ_MODE_INTX:
3423 pqi_configure_legacy_intx(ctrl_info, true);
3424 sis_enable_intx(ctrl_info);
3425 break;
3426 case IRQ_MODE_NONE:
3427 break;
3428 }
3429 break;
3430 }
3431
3432 ctrl_info->irq_mode = new_mode;
3433}
3434
3435#define PQI_LEGACY_INTX_PENDING 0x1
3436
3437static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info)
3438{
3439 bool valid_irq;
3440 u32 intx_status;
3441
3442 switch (ctrl_info->irq_mode) {
3443 case IRQ_MODE_MSIX:
3444 valid_irq = true;
3445 break;
3446 case IRQ_MODE_INTX:
3447 intx_status =
3448 readl(&ctrl_info->pqi_registers->legacy_intx_status);
3449 if (intx_status & PQI_LEGACY_INTX_PENDING)
3450 valid_irq = true;
3451 else
3452 valid_irq = false;
3453 break;
3454 case IRQ_MODE_NONE:
3455 default:
3456 valid_irq = false;
3457 break;
3458 }
3459
3460 return valid_irq;
3461}
3462
3463static irqreturn_t pqi_irq_handler(int irq, void *data)
3464{
3465 struct pqi_ctrl_info *ctrl_info;
3466 struct pqi_queue_group *queue_group;
Olivier Deprez0e641232021-09-23 10:07:05 +02003467 int num_io_responses_handled;
3468 int num_events_handled;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003469
3470 queue_group = data;
3471 ctrl_info = queue_group->ctrl_info;
3472
3473 if (!pqi_is_valid_irq(ctrl_info))
3474 return IRQ_NONE;
3475
Olivier Deprez0e641232021-09-23 10:07:05 +02003476 num_io_responses_handled = pqi_process_io_intr(ctrl_info, queue_group);
3477 if (num_io_responses_handled < 0)
3478 goto out;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003479
Olivier Deprez0e641232021-09-23 10:07:05 +02003480 if (irq == ctrl_info->event_irq) {
3481 num_events_handled = pqi_process_event_intr(ctrl_info);
3482 if (num_events_handled < 0)
3483 goto out;
3484 } else {
3485 num_events_handled = 0;
3486 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003487
Olivier Deprez0e641232021-09-23 10:07:05 +02003488 if (num_io_responses_handled + num_events_handled > 0)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003489 atomic_inc(&ctrl_info->num_interrupts);
3490
3491 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL);
3492 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL);
3493
Olivier Deprez0e641232021-09-23 10:07:05 +02003494out:
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003495 return IRQ_HANDLED;
3496}
3497
3498static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info)
3499{
3500 struct pci_dev *pci_dev = ctrl_info->pci_dev;
3501 int i;
3502 int rc;
3503
3504 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0);
3505
3506 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) {
3507 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0,
3508 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]);
3509 if (rc) {
3510 dev_err(&pci_dev->dev,
3511 "irq %u init failed with error %d\n",
3512 pci_irq_vector(pci_dev, i), rc);
3513 return rc;
3514 }
3515 ctrl_info->num_msix_vectors_initialized++;
3516 }
3517
3518 return 0;
3519}
3520
3521static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info)
3522{
3523 int i;
3524
3525 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++)
3526 free_irq(pci_irq_vector(ctrl_info->pci_dev, i),
3527 &ctrl_info->queue_groups[i]);
3528
3529 ctrl_info->num_msix_vectors_initialized = 0;
3530}
3531
3532static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3533{
3534 int num_vectors_enabled;
3535
3536 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev,
3537 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups,
3538 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
3539 if (num_vectors_enabled < 0) {
3540 dev_err(&ctrl_info->pci_dev->dev,
3541 "MSI-X init failed with error %d\n",
3542 num_vectors_enabled);
3543 return num_vectors_enabled;
3544 }
3545
3546 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled;
3547 ctrl_info->irq_mode = IRQ_MODE_MSIX;
3548 return 0;
3549}
3550
3551static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3552{
3553 if (ctrl_info->num_msix_vectors_enabled) {
3554 pci_free_irq_vectors(ctrl_info->pci_dev);
3555 ctrl_info->num_msix_vectors_enabled = 0;
3556 }
3557}
3558
3559static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info)
3560{
3561 unsigned int i;
3562 size_t alloc_length;
3563 size_t element_array_length_per_iq;
3564 size_t element_array_length_per_oq;
3565 void *element_array;
3566 void __iomem *next_queue_index;
3567 void *aligned_pointer;
3568 unsigned int num_inbound_queues;
3569 unsigned int num_outbound_queues;
3570 unsigned int num_queue_indexes;
3571 struct pqi_queue_group *queue_group;
3572
3573 element_array_length_per_iq =
3574 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH *
3575 ctrl_info->num_elements_per_iq;
3576 element_array_length_per_oq =
3577 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH *
3578 ctrl_info->num_elements_per_oq;
3579 num_inbound_queues = ctrl_info->num_queue_groups * 2;
3580 num_outbound_queues = ctrl_info->num_queue_groups;
3581 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1;
3582
3583 aligned_pointer = NULL;
3584
3585 for (i = 0; i < num_inbound_queues; i++) {
3586 aligned_pointer = PTR_ALIGN(aligned_pointer,
3587 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3588 aligned_pointer += element_array_length_per_iq;
3589 }
3590
3591 for (i = 0; i < num_outbound_queues; i++) {
3592 aligned_pointer = PTR_ALIGN(aligned_pointer,
3593 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3594 aligned_pointer += element_array_length_per_oq;
3595 }
3596
3597 aligned_pointer = PTR_ALIGN(aligned_pointer,
3598 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3599 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3600 PQI_EVENT_OQ_ELEMENT_LENGTH;
3601
3602 for (i = 0; i < num_queue_indexes; i++) {
3603 aligned_pointer = PTR_ALIGN(aligned_pointer,
3604 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3605 aligned_pointer += sizeof(pqi_index_t);
3606 }
3607
3608 alloc_length = (size_t)aligned_pointer +
3609 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3610
3611 alloc_length += PQI_EXTRA_SGL_MEMORY;
3612
3613 ctrl_info->queue_memory_base =
David Brazdil0f672f62019-12-10 10:32:29 +00003614 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3615 &ctrl_info->queue_memory_base_dma_handle,
3616 GFP_KERNEL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003617
3618 if (!ctrl_info->queue_memory_base)
3619 return -ENOMEM;
3620
3621 ctrl_info->queue_memory_length = alloc_length;
3622
3623 element_array = PTR_ALIGN(ctrl_info->queue_memory_base,
3624 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3625
3626 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3627 queue_group = &ctrl_info->queue_groups[i];
3628 queue_group->iq_element_array[RAID_PATH] = element_array;
3629 queue_group->iq_element_array_bus_addr[RAID_PATH] =
3630 ctrl_info->queue_memory_base_dma_handle +
3631 (element_array - ctrl_info->queue_memory_base);
3632 element_array += element_array_length_per_iq;
3633 element_array = PTR_ALIGN(element_array,
3634 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3635 queue_group->iq_element_array[AIO_PATH] = element_array;
3636 queue_group->iq_element_array_bus_addr[AIO_PATH] =
3637 ctrl_info->queue_memory_base_dma_handle +
3638 (element_array - ctrl_info->queue_memory_base);
3639 element_array += element_array_length_per_iq;
3640 element_array = PTR_ALIGN(element_array,
3641 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3642 }
3643
3644 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3645 queue_group = &ctrl_info->queue_groups[i];
3646 queue_group->oq_element_array = element_array;
3647 queue_group->oq_element_array_bus_addr =
3648 ctrl_info->queue_memory_base_dma_handle +
3649 (element_array - ctrl_info->queue_memory_base);
3650 element_array += element_array_length_per_oq;
3651 element_array = PTR_ALIGN(element_array,
3652 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3653 }
3654
3655 ctrl_info->event_queue.oq_element_array = element_array;
3656 ctrl_info->event_queue.oq_element_array_bus_addr =
3657 ctrl_info->queue_memory_base_dma_handle +
3658 (element_array - ctrl_info->queue_memory_base);
3659 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3660 PQI_EVENT_OQ_ELEMENT_LENGTH;
3661
3662 next_queue_index = (void __iomem *)PTR_ALIGN(element_array,
3663 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3664
3665 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3666 queue_group = &ctrl_info->queue_groups[i];
3667 queue_group->iq_ci[RAID_PATH] = next_queue_index;
3668 queue_group->iq_ci_bus_addr[RAID_PATH] =
3669 ctrl_info->queue_memory_base_dma_handle +
3670 (next_queue_index -
3671 (void __iomem *)ctrl_info->queue_memory_base);
3672 next_queue_index += sizeof(pqi_index_t);
3673 next_queue_index = PTR_ALIGN(next_queue_index,
3674 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3675 queue_group->iq_ci[AIO_PATH] = next_queue_index;
3676 queue_group->iq_ci_bus_addr[AIO_PATH] =
3677 ctrl_info->queue_memory_base_dma_handle +
3678 (next_queue_index -
3679 (void __iomem *)ctrl_info->queue_memory_base);
3680 next_queue_index += sizeof(pqi_index_t);
3681 next_queue_index = PTR_ALIGN(next_queue_index,
3682 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3683 queue_group->oq_pi = next_queue_index;
3684 queue_group->oq_pi_bus_addr =
3685 ctrl_info->queue_memory_base_dma_handle +
3686 (next_queue_index -
3687 (void __iomem *)ctrl_info->queue_memory_base);
3688 next_queue_index += sizeof(pqi_index_t);
3689 next_queue_index = PTR_ALIGN(next_queue_index,
3690 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3691 }
3692
3693 ctrl_info->event_queue.oq_pi = next_queue_index;
3694 ctrl_info->event_queue.oq_pi_bus_addr =
3695 ctrl_info->queue_memory_base_dma_handle +
3696 (next_queue_index -
3697 (void __iomem *)ctrl_info->queue_memory_base);
3698
3699 return 0;
3700}
3701
3702static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info)
3703{
3704 unsigned int i;
3705 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3706 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3707
3708 /*
3709 * Initialize the backpointers to the controller structure in
3710 * each operational queue group structure.
3711 */
3712 for (i = 0; i < ctrl_info->num_queue_groups; i++)
3713 ctrl_info->queue_groups[i].ctrl_info = ctrl_info;
3714
3715 /*
3716 * Assign IDs to all operational queues. Note that the IDs
3717 * assigned to operational IQs are independent of the IDs
3718 * assigned to operational OQs.
3719 */
3720 ctrl_info->event_queue.oq_id = next_oq_id++;
3721 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3722 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++;
3723 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++;
3724 ctrl_info->queue_groups[i].oq_id = next_oq_id++;
3725 }
3726
3727 /*
3728 * Assign MSI-X table entry indexes to all queues. Note that the
3729 * interrupt for the event queue is shared with the first queue group.
3730 */
3731 ctrl_info->event_queue.int_msg_num = 0;
3732 for (i = 0; i < ctrl_info->num_queue_groups; i++)
3733 ctrl_info->queue_groups[i].int_msg_num = i;
3734
3735 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3736 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]);
3737 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]);
3738 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]);
3739 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]);
3740 }
3741}
3742
3743static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info)
3744{
3745 size_t alloc_length;
3746 struct pqi_admin_queues_aligned *admin_queues_aligned;
3747 struct pqi_admin_queues *admin_queues;
3748
3749 alloc_length = sizeof(struct pqi_admin_queues_aligned) +
3750 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3751
3752 ctrl_info->admin_queue_memory_base =
David Brazdil0f672f62019-12-10 10:32:29 +00003753 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3754 &ctrl_info->admin_queue_memory_base_dma_handle,
3755 GFP_KERNEL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003756
3757 if (!ctrl_info->admin_queue_memory_base)
3758 return -ENOMEM;
3759
3760 ctrl_info->admin_queue_memory_length = alloc_length;
3761
3762 admin_queues = &ctrl_info->admin_queues;
3763 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base,
3764 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3765 admin_queues->iq_element_array =
3766 &admin_queues_aligned->iq_element_array;
3767 admin_queues->oq_element_array =
3768 &admin_queues_aligned->oq_element_array;
3769 admin_queues->iq_ci = &admin_queues_aligned->iq_ci;
3770 admin_queues->oq_pi =
3771 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi;
3772
3773 admin_queues->iq_element_array_bus_addr =
3774 ctrl_info->admin_queue_memory_base_dma_handle +
3775 (admin_queues->iq_element_array -
3776 ctrl_info->admin_queue_memory_base);
3777 admin_queues->oq_element_array_bus_addr =
3778 ctrl_info->admin_queue_memory_base_dma_handle +
3779 (admin_queues->oq_element_array -
3780 ctrl_info->admin_queue_memory_base);
3781 admin_queues->iq_ci_bus_addr =
3782 ctrl_info->admin_queue_memory_base_dma_handle +
3783 ((void *)admin_queues->iq_ci -
3784 ctrl_info->admin_queue_memory_base);
3785 admin_queues->oq_pi_bus_addr =
3786 ctrl_info->admin_queue_memory_base_dma_handle +
3787 ((void __iomem *)admin_queues->oq_pi -
3788 (void __iomem *)ctrl_info->admin_queue_memory_base);
3789
3790 return 0;
3791}
3792
David Brazdil0f672f62019-12-10 10:32:29 +00003793#define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES PQI_HZ
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003794#define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1
3795
3796static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info)
3797{
3798 struct pqi_device_registers __iomem *pqi_registers;
3799 struct pqi_admin_queues *admin_queues;
3800 unsigned long timeout;
3801 u8 status;
3802 u32 reg;
3803
3804 pqi_registers = ctrl_info->pqi_registers;
3805 admin_queues = &ctrl_info->admin_queues;
3806
3807 writeq((u64)admin_queues->iq_element_array_bus_addr,
3808 &pqi_registers->admin_iq_element_array_addr);
3809 writeq((u64)admin_queues->oq_element_array_bus_addr,
3810 &pqi_registers->admin_oq_element_array_addr);
3811 writeq((u64)admin_queues->iq_ci_bus_addr,
3812 &pqi_registers->admin_iq_ci_addr);
3813 writeq((u64)admin_queues->oq_pi_bus_addr,
3814 &pqi_registers->admin_oq_pi_addr);
3815
3816 reg = PQI_ADMIN_IQ_NUM_ELEMENTS |
3817 (PQI_ADMIN_OQ_NUM_ELEMENTS) << 8 |
3818 (admin_queues->int_msg_num << 16);
3819 writel(reg, &pqi_registers->admin_iq_num_elements);
3820 writel(PQI_CREATE_ADMIN_QUEUE_PAIR,
3821 &pqi_registers->function_and_status_code);
3822
3823 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies;
3824 while (1) {
3825 status = readb(&pqi_registers->function_and_status_code);
3826 if (status == PQI_STATUS_IDLE)
3827 break;
3828 if (time_after(jiffies, timeout))
3829 return -ETIMEDOUT;
3830 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS);
3831 }
3832
3833 /*
3834 * The offset registers are not initialized to the correct
3835 * offsets until *after* the create admin queue pair command
3836 * completes successfully.
3837 */
3838 admin_queues->iq_pi = ctrl_info->iomem_base +
3839 PQI_DEVICE_REGISTERS_OFFSET +
3840 readq(&pqi_registers->admin_iq_pi_offset);
3841 admin_queues->oq_ci = ctrl_info->iomem_base +
3842 PQI_DEVICE_REGISTERS_OFFSET +
3843 readq(&pqi_registers->admin_oq_ci_offset);
3844
3845 return 0;
3846}
3847
3848static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info,
3849 struct pqi_general_admin_request *request)
3850{
3851 struct pqi_admin_queues *admin_queues;
3852 void *next_element;
3853 pqi_index_t iq_pi;
3854
3855 admin_queues = &ctrl_info->admin_queues;
3856 iq_pi = admin_queues->iq_pi_copy;
3857
3858 next_element = admin_queues->iq_element_array +
3859 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH);
3860
3861 memcpy(next_element, request, sizeof(*request));
3862
3863 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS;
3864 admin_queues->iq_pi_copy = iq_pi;
3865
3866 /*
3867 * This write notifies the controller that an IU is available to be
3868 * processed.
3869 */
3870 writel(iq_pi, admin_queues->iq_pi);
3871}
3872
3873#define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60
3874
3875static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info,
3876 struct pqi_general_admin_response *response)
3877{
3878 struct pqi_admin_queues *admin_queues;
3879 pqi_index_t oq_pi;
3880 pqi_index_t oq_ci;
3881 unsigned long timeout;
3882
3883 admin_queues = &ctrl_info->admin_queues;
3884 oq_ci = admin_queues->oq_ci_copy;
3885
David Brazdil0f672f62019-12-10 10:32:29 +00003886 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * PQI_HZ) + jiffies;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003887
3888 while (1) {
3889 oq_pi = readl(admin_queues->oq_pi);
3890 if (oq_pi != oq_ci)
3891 break;
3892 if (time_after(jiffies, timeout)) {
3893 dev_err(&ctrl_info->pci_dev->dev,
3894 "timed out waiting for admin response\n");
3895 return -ETIMEDOUT;
3896 }
3897 if (!sis_is_firmware_running(ctrl_info))
3898 return -ENXIO;
3899 usleep_range(1000, 2000);
3900 }
3901
3902 memcpy(response, admin_queues->oq_element_array +
3903 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response));
3904
3905 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS;
3906 admin_queues->oq_ci_copy = oq_ci;
3907 writel(oq_ci, admin_queues->oq_ci);
3908
3909 return 0;
3910}
3911
3912static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
3913 struct pqi_queue_group *queue_group, enum pqi_io_path path,
3914 struct pqi_io_request *io_request)
3915{
3916 struct pqi_io_request *next;
3917 void *next_element;
3918 pqi_index_t iq_pi;
3919 pqi_index_t iq_ci;
3920 size_t iu_length;
3921 unsigned long flags;
3922 unsigned int num_elements_needed;
3923 unsigned int num_elements_to_end_of_queue;
3924 size_t copy_count;
3925 struct pqi_iu_header *request;
3926
3927 spin_lock_irqsave(&queue_group->submit_lock[path], flags);
3928
3929 if (io_request) {
3930 io_request->queue_group = queue_group;
3931 list_add_tail(&io_request->request_list_entry,
3932 &queue_group->request_list[path]);
3933 }
3934
3935 iq_pi = queue_group->iq_pi_copy[path];
3936
3937 list_for_each_entry_safe(io_request, next,
3938 &queue_group->request_list[path], request_list_entry) {
3939
3940 request = io_request->iu;
3941
3942 iu_length = get_unaligned_le16(&request->iu_length) +
3943 PQI_REQUEST_HEADER_LENGTH;
3944 num_elements_needed =
3945 DIV_ROUND_UP(iu_length,
3946 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3947
3948 iq_ci = readl(queue_group->iq_ci[path]);
3949
3950 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci,
3951 ctrl_info->num_elements_per_iq))
3952 break;
3953
3954 put_unaligned_le16(queue_group->oq_id,
3955 &request->response_queue_id);
3956
3957 next_element = queue_group->iq_element_array[path] +
3958 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3959
3960 num_elements_to_end_of_queue =
3961 ctrl_info->num_elements_per_iq - iq_pi;
3962
3963 if (num_elements_needed <= num_elements_to_end_of_queue) {
3964 memcpy(next_element, request, iu_length);
3965 } else {
3966 copy_count = num_elements_to_end_of_queue *
3967 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
3968 memcpy(next_element, request, copy_count);
3969 memcpy(queue_group->iq_element_array[path],
3970 (u8 *)request + copy_count,
3971 iu_length - copy_count);
3972 }
3973
3974 iq_pi = (iq_pi + num_elements_needed) %
3975 ctrl_info->num_elements_per_iq;
3976
3977 list_del(&io_request->request_list_entry);
3978 }
3979
3980 if (iq_pi != queue_group->iq_pi_copy[path]) {
3981 queue_group->iq_pi_copy[path] = iq_pi;
3982 /*
3983 * This write notifies the controller that one or more IUs are
3984 * available to be processed.
3985 */
3986 writel(iq_pi, queue_group->iq_pi[path]);
3987 }
3988
3989 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags);
3990}
3991
3992#define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10
3993
3994static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info,
3995 struct completion *wait)
3996{
3997 int rc;
3998
3999 while (1) {
4000 if (wait_for_completion_io_timeout(wait,
David Brazdil0f672f62019-12-10 10:32:29 +00004001 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * PQI_HZ)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004002 rc = 0;
4003 break;
4004 }
4005
4006 pqi_check_ctrl_health(ctrl_info);
4007 if (pqi_ctrl_offline(ctrl_info)) {
4008 rc = -ENXIO;
4009 break;
4010 }
4011 }
4012
4013 return rc;
4014}
4015
4016static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request,
4017 void *context)
4018{
4019 struct completion *waiting = context;
4020
4021 complete(waiting);
4022}
4023
4024static int pqi_process_raid_io_error_synchronous(struct pqi_raid_error_info
4025 *error_info)
4026{
4027 int rc = -EIO;
4028
4029 switch (error_info->data_out_result) {
4030 case PQI_DATA_IN_OUT_GOOD:
4031 if (error_info->status == SAM_STAT_GOOD)
4032 rc = 0;
4033 break;
4034 case PQI_DATA_IN_OUT_UNDERFLOW:
4035 if (error_info->status == SAM_STAT_GOOD ||
4036 error_info->status == SAM_STAT_CHECK_CONDITION)
4037 rc = 0;
4038 break;
4039 case PQI_DATA_IN_OUT_ABORTED:
4040 rc = PQI_CMD_STATUS_ABORTED;
4041 break;
4042 }
4043
4044 return rc;
4045}
4046
4047static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
4048 struct pqi_iu_header *request, unsigned int flags,
4049 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs)
4050{
4051 int rc = 0;
4052 struct pqi_io_request *io_request;
4053 unsigned long start_jiffies;
4054 unsigned long msecs_blocked;
4055 size_t iu_length;
4056 DECLARE_COMPLETION_ONSTACK(wait);
4057
4058 /*
4059 * Note that specifying PQI_SYNC_FLAGS_INTERRUPTABLE and a timeout value
4060 * are mutually exclusive.
4061 */
4062
4063 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) {
4064 if (down_interruptible(&ctrl_info->sync_request_sem))
4065 return -ERESTARTSYS;
4066 } else {
4067 if (timeout_msecs == NO_TIMEOUT) {
4068 down(&ctrl_info->sync_request_sem);
4069 } else {
4070 start_jiffies = jiffies;
4071 if (down_timeout(&ctrl_info->sync_request_sem,
4072 msecs_to_jiffies(timeout_msecs)))
4073 return -ETIMEDOUT;
4074 msecs_blocked =
4075 jiffies_to_msecs(jiffies - start_jiffies);
David Brazdil0f672f62019-12-10 10:32:29 +00004076 if (msecs_blocked >= timeout_msecs) {
4077 rc = -ETIMEDOUT;
4078 goto out;
4079 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004080 timeout_msecs -= msecs_blocked;
4081 }
4082 }
4083
4084 pqi_ctrl_busy(ctrl_info);
4085 timeout_msecs = pqi_wait_if_ctrl_blocked(ctrl_info, timeout_msecs);
4086 if (timeout_msecs == 0) {
4087 pqi_ctrl_unbusy(ctrl_info);
4088 rc = -ETIMEDOUT;
4089 goto out;
4090 }
4091
4092 if (pqi_ctrl_offline(ctrl_info)) {
4093 pqi_ctrl_unbusy(ctrl_info);
4094 rc = -ENXIO;
4095 goto out;
4096 }
4097
Olivier Deprez0e641232021-09-23 10:07:05 +02004098 atomic_inc(&ctrl_info->sync_cmds_outstanding);
4099
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004100 io_request = pqi_alloc_io_request(ctrl_info);
4101
4102 put_unaligned_le16(io_request->index,
4103 &(((struct pqi_raid_path_request *)request)->request_id));
4104
4105 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO)
4106 ((struct pqi_raid_path_request *)request)->error_index =
4107 ((struct pqi_raid_path_request *)request)->request_id;
4108
4109 iu_length = get_unaligned_le16(&request->iu_length) +
4110 PQI_REQUEST_HEADER_LENGTH;
4111 memcpy(io_request->iu, request, iu_length);
4112
4113 io_request->io_complete_callback = pqi_raid_synchronous_complete;
4114 io_request->context = &wait;
4115
4116 pqi_start_io(ctrl_info,
4117 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
4118 io_request);
4119
4120 pqi_ctrl_unbusy(ctrl_info);
4121
4122 if (timeout_msecs == NO_TIMEOUT) {
4123 pqi_wait_for_completion_io(ctrl_info, &wait);
4124 } else {
4125 if (!wait_for_completion_io_timeout(&wait,
4126 msecs_to_jiffies(timeout_msecs))) {
4127 dev_warn(&ctrl_info->pci_dev->dev,
4128 "command timed out\n");
4129 rc = -ETIMEDOUT;
4130 }
4131 }
4132
4133 if (error_info) {
4134 if (io_request->error_info)
4135 memcpy(error_info, io_request->error_info,
4136 sizeof(*error_info));
4137 else
4138 memset(error_info, 0, sizeof(*error_info));
4139 } else if (rc == 0 && io_request->error_info) {
4140 rc = pqi_process_raid_io_error_synchronous(
4141 io_request->error_info);
4142 }
4143
4144 pqi_free_io_request(io_request);
4145
Olivier Deprez0e641232021-09-23 10:07:05 +02004146 atomic_dec(&ctrl_info->sync_cmds_outstanding);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004147out:
4148 up(&ctrl_info->sync_request_sem);
4149
4150 return rc;
4151}
4152
4153static int pqi_validate_admin_response(
4154 struct pqi_general_admin_response *response, u8 expected_function_code)
4155{
4156 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN)
4157 return -EINVAL;
4158
4159 if (get_unaligned_le16(&response->header.iu_length) !=
4160 PQI_GENERAL_ADMIN_IU_LENGTH)
4161 return -EINVAL;
4162
4163 if (response->function_code != expected_function_code)
4164 return -EINVAL;
4165
4166 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS)
4167 return -EINVAL;
4168
4169 return 0;
4170}
4171
4172static int pqi_submit_admin_request_synchronous(
4173 struct pqi_ctrl_info *ctrl_info,
4174 struct pqi_general_admin_request *request,
4175 struct pqi_general_admin_response *response)
4176{
4177 int rc;
4178
4179 pqi_submit_admin_request(ctrl_info, request);
4180
4181 rc = pqi_poll_for_admin_response(ctrl_info, response);
4182
4183 if (rc == 0)
4184 rc = pqi_validate_admin_response(response,
4185 request->function_code);
4186
4187 return rc;
4188}
4189
4190static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info)
4191{
4192 int rc;
4193 struct pqi_general_admin_request request;
4194 struct pqi_general_admin_response response;
4195 struct pqi_device_capability *capability;
4196 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor;
4197
4198 capability = kmalloc(sizeof(*capability), GFP_KERNEL);
4199 if (!capability)
4200 return -ENOMEM;
4201
4202 memset(&request, 0, sizeof(request));
4203
4204 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4205 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4206 &request.header.iu_length);
4207 request.function_code =
4208 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY;
4209 put_unaligned_le32(sizeof(*capability),
4210 &request.data.report_device_capability.buffer_length);
4211
4212 rc = pqi_map_single(ctrl_info->pci_dev,
4213 &request.data.report_device_capability.sg_descriptor,
4214 capability, sizeof(*capability),
David Brazdil0f672f62019-12-10 10:32:29 +00004215 DMA_FROM_DEVICE);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004216 if (rc)
4217 goto out;
4218
4219 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4220 &response);
4221
4222 pqi_pci_unmap(ctrl_info->pci_dev,
4223 &request.data.report_device_capability.sg_descriptor, 1,
David Brazdil0f672f62019-12-10 10:32:29 +00004224 DMA_FROM_DEVICE);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004225
4226 if (rc)
4227 goto out;
4228
4229 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) {
4230 rc = -EIO;
4231 goto out;
4232 }
4233
4234 ctrl_info->max_inbound_queues =
4235 get_unaligned_le16(&capability->max_inbound_queues);
4236 ctrl_info->max_elements_per_iq =
4237 get_unaligned_le16(&capability->max_elements_per_iq);
4238 ctrl_info->max_iq_element_length =
4239 get_unaligned_le16(&capability->max_iq_element_length)
4240 * 16;
4241 ctrl_info->max_outbound_queues =
4242 get_unaligned_le16(&capability->max_outbound_queues);
4243 ctrl_info->max_elements_per_oq =
4244 get_unaligned_le16(&capability->max_elements_per_oq);
4245 ctrl_info->max_oq_element_length =
4246 get_unaligned_le16(&capability->max_oq_element_length)
4247 * 16;
4248
4249 sop_iu_layer_descriptor =
4250 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP];
4251
4252 ctrl_info->max_inbound_iu_length_per_firmware =
4253 get_unaligned_le16(
4254 &sop_iu_layer_descriptor->max_inbound_iu_length);
4255 ctrl_info->inbound_spanning_supported =
4256 sop_iu_layer_descriptor->inbound_spanning_supported;
4257 ctrl_info->outbound_spanning_supported =
4258 sop_iu_layer_descriptor->outbound_spanning_supported;
4259
4260out:
4261 kfree(capability);
4262
4263 return rc;
4264}
4265
4266static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info)
4267{
4268 if (ctrl_info->max_iq_element_length <
4269 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4270 dev_err(&ctrl_info->pci_dev->dev,
4271 "max. inbound queue element length of %d is less than the required length of %d\n",
4272 ctrl_info->max_iq_element_length,
4273 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4274 return -EINVAL;
4275 }
4276
4277 if (ctrl_info->max_oq_element_length <
4278 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) {
4279 dev_err(&ctrl_info->pci_dev->dev,
4280 "max. outbound queue element length of %d is less than the required length of %d\n",
4281 ctrl_info->max_oq_element_length,
4282 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
4283 return -EINVAL;
4284 }
4285
4286 if (ctrl_info->max_inbound_iu_length_per_firmware <
4287 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4288 dev_err(&ctrl_info->pci_dev->dev,
4289 "max. inbound IU length of %u is less than the min. required length of %d\n",
4290 ctrl_info->max_inbound_iu_length_per_firmware,
4291 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4292 return -EINVAL;
4293 }
4294
4295 if (!ctrl_info->inbound_spanning_supported) {
4296 dev_err(&ctrl_info->pci_dev->dev,
4297 "the controller does not support inbound spanning\n");
4298 return -EINVAL;
4299 }
4300
4301 if (ctrl_info->outbound_spanning_supported) {
4302 dev_err(&ctrl_info->pci_dev->dev,
4303 "the controller supports outbound spanning but this driver does not\n");
4304 return -EINVAL;
4305 }
4306
4307 return 0;
4308}
4309
4310static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info)
4311{
4312 int rc;
4313 struct pqi_event_queue *event_queue;
4314 struct pqi_general_admin_request request;
4315 struct pqi_general_admin_response response;
4316
4317 event_queue = &ctrl_info->event_queue;
4318
4319 /*
4320 * Create OQ (Outbound Queue - device to host queue) to dedicate
4321 * to events.
4322 */
4323 memset(&request, 0, sizeof(request));
4324 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4325 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4326 &request.header.iu_length);
4327 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4328 put_unaligned_le16(event_queue->oq_id,
4329 &request.data.create_operational_oq.queue_id);
4330 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr,
4331 &request.data.create_operational_oq.element_array_addr);
4332 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr,
4333 &request.data.create_operational_oq.pi_addr);
4334 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS,
4335 &request.data.create_operational_oq.num_elements);
4336 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16,
4337 &request.data.create_operational_oq.element_length);
4338 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4339 put_unaligned_le16(event_queue->int_msg_num,
4340 &request.data.create_operational_oq.int_msg_num);
4341
4342 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4343 &response);
4344 if (rc)
4345 return rc;
4346
4347 event_queue->oq_ci = ctrl_info->iomem_base +
4348 PQI_DEVICE_REGISTERS_OFFSET +
4349 get_unaligned_le64(
4350 &response.data.create_operational_oq.oq_ci_offset);
4351
4352 return 0;
4353}
4354
4355static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info,
4356 unsigned int group_number)
4357{
4358 int rc;
4359 struct pqi_queue_group *queue_group;
4360 struct pqi_general_admin_request request;
4361 struct pqi_general_admin_response response;
4362
4363 queue_group = &ctrl_info->queue_groups[group_number];
4364
4365 /*
4366 * Create IQ (Inbound Queue - host to device queue) for
4367 * RAID path.
4368 */
4369 memset(&request, 0, sizeof(request));
4370 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4371 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4372 &request.header.iu_length);
4373 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4374 put_unaligned_le16(queue_group->iq_id[RAID_PATH],
4375 &request.data.create_operational_iq.queue_id);
4376 put_unaligned_le64(
4377 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH],
4378 &request.data.create_operational_iq.element_array_addr);
4379 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH],
4380 &request.data.create_operational_iq.ci_addr);
4381 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4382 &request.data.create_operational_iq.num_elements);
4383 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4384 &request.data.create_operational_iq.element_length);
4385 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4386
4387 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4388 &response);
4389 if (rc) {
4390 dev_err(&ctrl_info->pci_dev->dev,
4391 "error creating inbound RAID queue\n");
4392 return rc;
4393 }
4394
4395 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base +
4396 PQI_DEVICE_REGISTERS_OFFSET +
4397 get_unaligned_le64(
4398 &response.data.create_operational_iq.iq_pi_offset);
4399
4400 /*
4401 * Create IQ (Inbound Queue - host to device queue) for
4402 * Advanced I/O (AIO) path.
4403 */
4404 memset(&request, 0, sizeof(request));
4405 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4406 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4407 &request.header.iu_length);
4408 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4409 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4410 &request.data.create_operational_iq.queue_id);
4411 put_unaligned_le64((u64)queue_group->
4412 iq_element_array_bus_addr[AIO_PATH],
4413 &request.data.create_operational_iq.element_array_addr);
4414 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH],
4415 &request.data.create_operational_iq.ci_addr);
4416 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4417 &request.data.create_operational_iq.num_elements);
4418 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4419 &request.data.create_operational_iq.element_length);
4420 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4421
4422 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4423 &response);
4424 if (rc) {
4425 dev_err(&ctrl_info->pci_dev->dev,
4426 "error creating inbound AIO queue\n");
4427 return rc;
4428 }
4429
4430 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base +
4431 PQI_DEVICE_REGISTERS_OFFSET +
4432 get_unaligned_le64(
4433 &response.data.create_operational_iq.iq_pi_offset);
4434
4435 /*
4436 * Designate the 2nd IQ as the AIO path. By default, all IQs are
4437 * assumed to be for RAID path I/O unless we change the queue's
4438 * property.
4439 */
4440 memset(&request, 0, sizeof(request));
4441 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4442 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4443 &request.header.iu_length);
4444 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY;
4445 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4446 &request.data.change_operational_iq_properties.queue_id);
4447 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE,
4448 &request.data.change_operational_iq_properties.vendor_specific);
4449
4450 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4451 &response);
4452 if (rc) {
4453 dev_err(&ctrl_info->pci_dev->dev,
4454 "error changing queue property\n");
4455 return rc;
4456 }
4457
4458 /*
4459 * Create OQ (Outbound Queue - device to host queue).
4460 */
4461 memset(&request, 0, sizeof(request));
4462 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4463 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4464 &request.header.iu_length);
4465 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4466 put_unaligned_le16(queue_group->oq_id,
4467 &request.data.create_operational_oq.queue_id);
4468 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr,
4469 &request.data.create_operational_oq.element_array_addr);
4470 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr,
4471 &request.data.create_operational_oq.pi_addr);
4472 put_unaligned_le16(ctrl_info->num_elements_per_oq,
4473 &request.data.create_operational_oq.num_elements);
4474 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16,
4475 &request.data.create_operational_oq.element_length);
4476 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4477 put_unaligned_le16(queue_group->int_msg_num,
4478 &request.data.create_operational_oq.int_msg_num);
4479
4480 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4481 &response);
4482 if (rc) {
4483 dev_err(&ctrl_info->pci_dev->dev,
4484 "error creating outbound queue\n");
4485 return rc;
4486 }
4487
4488 queue_group->oq_ci = ctrl_info->iomem_base +
4489 PQI_DEVICE_REGISTERS_OFFSET +
4490 get_unaligned_le64(
4491 &response.data.create_operational_oq.oq_ci_offset);
4492
4493 return 0;
4494}
4495
4496static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info)
4497{
4498 int rc;
4499 unsigned int i;
4500
4501 rc = pqi_create_event_queue(ctrl_info);
4502 if (rc) {
4503 dev_err(&ctrl_info->pci_dev->dev,
4504 "error creating event queue\n");
4505 return rc;
4506 }
4507
4508 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4509 rc = pqi_create_queue_group(ctrl_info, i);
4510 if (rc) {
4511 dev_err(&ctrl_info->pci_dev->dev,
4512 "error creating queue group number %u/%u\n",
4513 i, ctrl_info->num_queue_groups);
4514 return rc;
4515 }
4516 }
4517
4518 return 0;
4519}
4520
4521#define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \
4522 (offsetof(struct pqi_event_config, descriptors) + \
4523 (PQI_MAX_EVENT_DESCRIPTORS * sizeof(struct pqi_event_descriptor)))
4524
4525static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info,
4526 bool enable_events)
4527{
4528 int rc;
4529 unsigned int i;
4530 struct pqi_event_config *event_config;
4531 struct pqi_event_descriptor *event_descriptor;
4532 struct pqi_general_management_request request;
4533
4534 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4535 GFP_KERNEL);
4536 if (!event_config)
4537 return -ENOMEM;
4538
4539 memset(&request, 0, sizeof(request));
4540
4541 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG;
4542 put_unaligned_le16(offsetof(struct pqi_general_management_request,
4543 data.report_event_configuration.sg_descriptors[1]) -
4544 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4545 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4546 &request.data.report_event_configuration.buffer_length);
4547
4548 rc = pqi_map_single(ctrl_info->pci_dev,
4549 request.data.report_event_configuration.sg_descriptors,
4550 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
David Brazdil0f672f62019-12-10 10:32:29 +00004551 DMA_FROM_DEVICE);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004552 if (rc)
4553 goto out;
4554
4555 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
4556 0, NULL, NO_TIMEOUT);
4557
4558 pqi_pci_unmap(ctrl_info->pci_dev,
4559 request.data.report_event_configuration.sg_descriptors, 1,
David Brazdil0f672f62019-12-10 10:32:29 +00004560 DMA_FROM_DEVICE);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004561
4562 if (rc)
4563 goto out;
4564
4565 for (i = 0; i < event_config->num_event_descriptors; i++) {
4566 event_descriptor = &event_config->descriptors[i];
4567 if (enable_events &&
4568 pqi_is_supported_event(event_descriptor->event_type))
4569 put_unaligned_le16(ctrl_info->event_queue.oq_id,
4570 &event_descriptor->oq_id);
4571 else
4572 put_unaligned_le16(0, &event_descriptor->oq_id);
4573 }
4574
4575 memset(&request, 0, sizeof(request));
4576
4577 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG;
4578 put_unaligned_le16(offsetof(struct pqi_general_management_request,
4579 data.report_event_configuration.sg_descriptors[1]) -
4580 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4581 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4582 &request.data.report_event_configuration.buffer_length);
4583
4584 rc = pqi_map_single(ctrl_info->pci_dev,
4585 request.data.report_event_configuration.sg_descriptors,
4586 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
David Brazdil0f672f62019-12-10 10:32:29 +00004587 DMA_TO_DEVICE);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004588 if (rc)
4589 goto out;
4590
4591 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0,
4592 NULL, NO_TIMEOUT);
4593
4594 pqi_pci_unmap(ctrl_info->pci_dev,
4595 request.data.report_event_configuration.sg_descriptors, 1,
David Brazdil0f672f62019-12-10 10:32:29 +00004596 DMA_TO_DEVICE);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004597
4598out:
4599 kfree(event_config);
4600
4601 return rc;
4602}
4603
4604static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info)
4605{
4606 return pqi_configure_events(ctrl_info, true);
4607}
4608
4609static inline int pqi_disable_events(struct pqi_ctrl_info *ctrl_info)
4610{
4611 return pqi_configure_events(ctrl_info, false);
4612}
4613
4614static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info)
4615{
4616 unsigned int i;
4617 struct device *dev;
4618 size_t sg_chain_buffer_length;
4619 struct pqi_io_request *io_request;
4620
4621 if (!ctrl_info->io_request_pool)
4622 return;
4623
4624 dev = &ctrl_info->pci_dev->dev;
4625 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4626 io_request = ctrl_info->io_request_pool;
4627
4628 for (i = 0; i < ctrl_info->max_io_slots; i++) {
4629 kfree(io_request->iu);
4630 if (!io_request->sg_chain_buffer)
4631 break;
4632 dma_free_coherent(dev, sg_chain_buffer_length,
4633 io_request->sg_chain_buffer,
4634 io_request->sg_chain_buffer_dma_handle);
4635 io_request++;
4636 }
4637
4638 kfree(ctrl_info->io_request_pool);
4639 ctrl_info->io_request_pool = NULL;
4640}
4641
4642static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info)
4643{
David Brazdil0f672f62019-12-10 10:32:29 +00004644 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev,
4645 ctrl_info->error_buffer_length,
4646 &ctrl_info->error_buffer_dma_handle,
4647 GFP_KERNEL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004648
4649 if (!ctrl_info->error_buffer)
4650 return -ENOMEM;
4651
4652 return 0;
4653}
4654
4655static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info)
4656{
4657 unsigned int i;
4658 void *sg_chain_buffer;
4659 size_t sg_chain_buffer_length;
4660 dma_addr_t sg_chain_buffer_dma_handle;
4661 struct device *dev;
4662 struct pqi_io_request *io_request;
4663
4664 ctrl_info->io_request_pool =
4665 kcalloc(ctrl_info->max_io_slots,
4666 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL);
4667
4668 if (!ctrl_info->io_request_pool) {
4669 dev_err(&ctrl_info->pci_dev->dev,
4670 "failed to allocate I/O request pool\n");
4671 goto error;
4672 }
4673
4674 dev = &ctrl_info->pci_dev->dev;
4675 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4676 io_request = ctrl_info->io_request_pool;
4677
4678 for (i = 0; i < ctrl_info->max_io_slots; i++) {
4679 io_request->iu =
4680 kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL);
4681
4682 if (!io_request->iu) {
4683 dev_err(&ctrl_info->pci_dev->dev,
4684 "failed to allocate IU buffers\n");
4685 goto error;
4686 }
4687
4688 sg_chain_buffer = dma_alloc_coherent(dev,
4689 sg_chain_buffer_length, &sg_chain_buffer_dma_handle,
4690 GFP_KERNEL);
4691
4692 if (!sg_chain_buffer) {
4693 dev_err(&ctrl_info->pci_dev->dev,
4694 "failed to allocate PQI scatter-gather chain buffers\n");
4695 goto error;
4696 }
4697
4698 io_request->index = i;
4699 io_request->sg_chain_buffer = sg_chain_buffer;
4700 io_request->sg_chain_buffer_dma_handle =
4701 sg_chain_buffer_dma_handle;
4702 io_request++;
4703 }
4704
4705 return 0;
4706
4707error:
4708 pqi_free_all_io_requests(ctrl_info);
4709
4710 return -ENOMEM;
4711}
4712
4713/*
4714 * Calculate required resources that are sized based on max. outstanding
4715 * requests and max. transfer size.
4716 */
4717
4718static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info)
4719{
4720 u32 max_transfer_size;
4721 u32 max_sg_entries;
4722
4723 ctrl_info->scsi_ml_can_queue =
4724 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS;
4725 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests;
4726
4727 ctrl_info->error_buffer_length =
4728 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH;
4729
4730 if (reset_devices)
4731 max_transfer_size = min(ctrl_info->max_transfer_size,
4732 PQI_MAX_TRANSFER_SIZE_KDUMP);
4733 else
4734 max_transfer_size = min(ctrl_info->max_transfer_size,
4735 PQI_MAX_TRANSFER_SIZE);
4736
4737 max_sg_entries = max_transfer_size / PAGE_SIZE;
4738
4739 /* +1 to cover when the buffer is not page-aligned. */
4740 max_sg_entries++;
4741
4742 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries);
4743
4744 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE;
4745
4746 ctrl_info->sg_chain_buffer_length =
4747 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) +
4748 PQI_EXTRA_SGL_MEMORY;
4749 ctrl_info->sg_tablesize = max_sg_entries;
4750 ctrl_info->max_sectors = max_transfer_size / 512;
4751}
4752
4753static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info)
4754{
4755 int num_queue_groups;
4756 u16 num_elements_per_iq;
4757 u16 num_elements_per_oq;
4758
4759 if (reset_devices) {
4760 num_queue_groups = 1;
4761 } else {
4762 int num_cpus;
4763 int max_queue_groups;
4764
4765 max_queue_groups = min(ctrl_info->max_inbound_queues / 2,
4766 ctrl_info->max_outbound_queues - 1);
4767 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS);
4768
4769 num_cpus = num_online_cpus();
4770 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors);
4771 num_queue_groups = min(num_queue_groups, max_queue_groups);
4772 }
4773
4774 ctrl_info->num_queue_groups = num_queue_groups;
4775 ctrl_info->max_hw_queue_index = num_queue_groups - 1;
4776
4777 /*
4778 * Make sure that the max. inbound IU length is an even multiple
4779 * of our inbound element length.
4780 */
4781 ctrl_info->max_inbound_iu_length =
4782 (ctrl_info->max_inbound_iu_length_per_firmware /
4783 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) *
4784 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
4785
4786 num_elements_per_iq =
4787 (ctrl_info->max_inbound_iu_length /
4788 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4789
4790 /* Add one because one element in each queue is unusable. */
4791 num_elements_per_iq++;
4792
4793 num_elements_per_iq = min(num_elements_per_iq,
4794 ctrl_info->max_elements_per_iq);
4795
4796 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1;
4797 num_elements_per_oq = min(num_elements_per_oq,
4798 ctrl_info->max_elements_per_oq);
4799
4800 ctrl_info->num_elements_per_iq = num_elements_per_iq;
4801 ctrl_info->num_elements_per_oq = num_elements_per_oq;
4802
4803 ctrl_info->max_sg_per_iu =
4804 ((ctrl_info->max_inbound_iu_length -
4805 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
4806 sizeof(struct pqi_sg_descriptor)) +
4807 PQI_MAX_EMBEDDED_SG_DESCRIPTORS;
4808}
4809
4810static inline void pqi_set_sg_descriptor(
4811 struct pqi_sg_descriptor *sg_descriptor, struct scatterlist *sg)
4812{
4813 u64 address = (u64)sg_dma_address(sg);
4814 unsigned int length = sg_dma_len(sg);
4815
4816 put_unaligned_le64(address, &sg_descriptor->address);
4817 put_unaligned_le32(length, &sg_descriptor->length);
4818 put_unaligned_le32(0, &sg_descriptor->flags);
4819}
4820
4821static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info,
4822 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd,
4823 struct pqi_io_request *io_request)
4824{
4825 int i;
4826 u16 iu_length;
4827 int sg_count;
4828 bool chained;
4829 unsigned int num_sg_in_iu;
4830 unsigned int max_sg_per_iu;
4831 struct scatterlist *sg;
4832 struct pqi_sg_descriptor *sg_descriptor;
4833
4834 sg_count = scsi_dma_map(scmd);
4835 if (sg_count < 0)
4836 return sg_count;
4837
4838 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
4839 PQI_REQUEST_HEADER_LENGTH;
4840
4841 if (sg_count == 0)
4842 goto out;
4843
4844 sg = scsi_sglist(scmd);
4845 sg_descriptor = request->sg_descriptors;
4846 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1;
4847 chained = false;
4848 num_sg_in_iu = 0;
4849 i = 0;
4850
4851 while (1) {
4852 pqi_set_sg_descriptor(sg_descriptor, sg);
4853 if (!chained)
4854 num_sg_in_iu++;
4855 i++;
4856 if (i == sg_count)
4857 break;
4858 sg_descriptor++;
4859 if (i == max_sg_per_iu) {
4860 put_unaligned_le64(
4861 (u64)io_request->sg_chain_buffer_dma_handle,
4862 &sg_descriptor->address);
4863 put_unaligned_le32((sg_count - num_sg_in_iu)
4864 * sizeof(*sg_descriptor),
4865 &sg_descriptor->length);
4866 put_unaligned_le32(CISS_SG_CHAIN,
4867 &sg_descriptor->flags);
4868 chained = true;
4869 num_sg_in_iu++;
4870 sg_descriptor = io_request->sg_chain_buffer;
4871 }
4872 sg = sg_next(sg);
4873 }
4874
4875 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
4876 request->partial = chained;
4877 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
4878
4879out:
4880 put_unaligned_le16(iu_length, &request->header.iu_length);
4881
4882 return 0;
4883}
4884
4885static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info,
4886 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd,
4887 struct pqi_io_request *io_request)
4888{
4889 int i;
4890 u16 iu_length;
4891 int sg_count;
4892 bool chained;
4893 unsigned int num_sg_in_iu;
4894 unsigned int max_sg_per_iu;
4895 struct scatterlist *sg;
4896 struct pqi_sg_descriptor *sg_descriptor;
4897
4898 sg_count = scsi_dma_map(scmd);
4899 if (sg_count < 0)
4900 return sg_count;
4901
4902 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) -
4903 PQI_REQUEST_HEADER_LENGTH;
4904 num_sg_in_iu = 0;
4905
4906 if (sg_count == 0)
4907 goto out;
4908
4909 sg = scsi_sglist(scmd);
4910 sg_descriptor = request->sg_descriptors;
4911 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1;
4912 chained = false;
4913 i = 0;
4914
4915 while (1) {
4916 pqi_set_sg_descriptor(sg_descriptor, sg);
4917 if (!chained)
4918 num_sg_in_iu++;
4919 i++;
4920 if (i == sg_count)
4921 break;
4922 sg_descriptor++;
4923 if (i == max_sg_per_iu) {
4924 put_unaligned_le64(
4925 (u64)io_request->sg_chain_buffer_dma_handle,
4926 &sg_descriptor->address);
4927 put_unaligned_le32((sg_count - num_sg_in_iu)
4928 * sizeof(*sg_descriptor),
4929 &sg_descriptor->length);
4930 put_unaligned_le32(CISS_SG_CHAIN,
4931 &sg_descriptor->flags);
4932 chained = true;
4933 num_sg_in_iu++;
4934 sg_descriptor = io_request->sg_chain_buffer;
4935 }
4936 sg = sg_next(sg);
4937 }
4938
4939 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
4940 request->partial = chained;
4941 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
4942
4943out:
4944 put_unaligned_le16(iu_length, &request->header.iu_length);
4945 request->num_sg_descriptors = num_sg_in_iu;
4946
4947 return 0;
4948}
4949
4950static void pqi_raid_io_complete(struct pqi_io_request *io_request,
4951 void *context)
4952{
4953 struct scsi_cmnd *scmd;
4954
4955 scmd = io_request->scmd;
4956 pqi_free_io_request(io_request);
4957 scsi_dma_unmap(scmd);
4958 pqi_scsi_done(scmd);
4959}
4960
4961static int pqi_raid_submit_scsi_cmd_with_io_request(
4962 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request,
4963 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
4964 struct pqi_queue_group *queue_group)
4965{
4966 int rc;
4967 size_t cdb_length;
4968 struct pqi_raid_path_request *request;
4969
4970 io_request->io_complete_callback = pqi_raid_io_complete;
4971 io_request->scmd = scmd;
4972
4973 request = io_request->iu;
4974 memset(request, 0,
4975 offsetof(struct pqi_raid_path_request, sg_descriptors));
4976
4977 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
4978 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
4979 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
4980 put_unaligned_le16(io_request->index, &request->request_id);
4981 request->error_index = request->request_id;
4982 memcpy(request->lun_number, device->scsi3addr,
4983 sizeof(request->lun_number));
4984
4985 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb));
4986 memcpy(request->cdb, scmd->cmnd, cdb_length);
4987
4988 switch (cdb_length) {
4989 case 6:
4990 case 10:
4991 case 12:
4992 case 16:
4993 /* No bytes in the Additional CDB bytes field */
4994 request->additional_cdb_bytes_usage =
4995 SOP_ADDITIONAL_CDB_BYTES_0;
4996 break;
4997 case 20:
4998 /* 4 bytes in the Additional cdb field */
4999 request->additional_cdb_bytes_usage =
5000 SOP_ADDITIONAL_CDB_BYTES_4;
5001 break;
5002 case 24:
5003 /* 8 bytes in the Additional cdb field */
5004 request->additional_cdb_bytes_usage =
5005 SOP_ADDITIONAL_CDB_BYTES_8;
5006 break;
5007 case 28:
5008 /* 12 bytes in the Additional cdb field */
5009 request->additional_cdb_bytes_usage =
5010 SOP_ADDITIONAL_CDB_BYTES_12;
5011 break;
5012 case 32:
5013 default:
5014 /* 16 bytes in the Additional cdb field */
5015 request->additional_cdb_bytes_usage =
5016 SOP_ADDITIONAL_CDB_BYTES_16;
5017 break;
5018 }
5019
5020 switch (scmd->sc_data_direction) {
5021 case DMA_TO_DEVICE:
5022 request->data_direction = SOP_READ_FLAG;
5023 break;
5024 case DMA_FROM_DEVICE:
5025 request->data_direction = SOP_WRITE_FLAG;
5026 break;
5027 case DMA_NONE:
5028 request->data_direction = SOP_NO_DIRECTION_FLAG;
5029 break;
5030 case DMA_BIDIRECTIONAL:
5031 request->data_direction = SOP_BIDIRECTIONAL;
5032 break;
5033 default:
5034 dev_err(&ctrl_info->pci_dev->dev,
5035 "unknown data direction: %d\n",
5036 scmd->sc_data_direction);
5037 break;
5038 }
5039
5040 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request);
5041 if (rc) {
5042 pqi_free_io_request(io_request);
5043 return SCSI_MLQUEUE_HOST_BUSY;
5044 }
5045
5046 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request);
5047
5048 return 0;
5049}
5050
5051static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5052 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5053 struct pqi_queue_group *queue_group)
5054{
5055 struct pqi_io_request *io_request;
5056
5057 io_request = pqi_alloc_io_request(ctrl_info);
5058
5059 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5060 device, scmd, queue_group);
5061}
5062
5063static inline void pqi_schedule_bypass_retry(struct pqi_ctrl_info *ctrl_info)
5064{
5065 if (!pqi_ctrl_blocked(ctrl_info))
5066 schedule_work(&ctrl_info->raid_bypass_retry_work);
5067}
5068
5069static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request)
5070{
5071 struct scsi_cmnd *scmd;
5072 struct pqi_scsi_dev *device;
5073 struct pqi_ctrl_info *ctrl_info;
5074
5075 if (!io_request->raid_bypass)
5076 return false;
5077
5078 scmd = io_request->scmd;
5079 if ((scmd->result & 0xff) == SAM_STAT_GOOD)
5080 return false;
5081 if (host_byte(scmd->result) == DID_NO_CONNECT)
5082 return false;
5083
5084 device = scmd->device->hostdata;
5085 if (pqi_device_offline(device))
5086 return false;
5087
5088 ctrl_info = shost_to_hba(scmd->device->host);
5089 if (pqi_ctrl_offline(ctrl_info))
5090 return false;
5091
5092 return true;
5093}
5094
5095static inline void pqi_add_to_raid_bypass_retry_list(
5096 struct pqi_ctrl_info *ctrl_info,
5097 struct pqi_io_request *io_request, bool at_head)
5098{
5099 unsigned long flags;
5100
5101 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5102 if (at_head)
5103 list_add(&io_request->request_list_entry,
5104 &ctrl_info->raid_bypass_retry_list);
5105 else
5106 list_add_tail(&io_request->request_list_entry,
5107 &ctrl_info->raid_bypass_retry_list);
5108 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5109}
5110
5111static void pqi_queued_raid_bypass_complete(struct pqi_io_request *io_request,
5112 void *context)
5113{
5114 struct scsi_cmnd *scmd;
5115
5116 scmd = io_request->scmd;
5117 pqi_free_io_request(io_request);
5118 pqi_scsi_done(scmd);
5119}
5120
5121static void pqi_queue_raid_bypass_retry(struct pqi_io_request *io_request)
5122{
5123 struct scsi_cmnd *scmd;
5124 struct pqi_ctrl_info *ctrl_info;
5125
5126 io_request->io_complete_callback = pqi_queued_raid_bypass_complete;
5127 scmd = io_request->scmd;
5128 scmd->result = 0;
5129 ctrl_info = shost_to_hba(scmd->device->host);
5130
5131 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request, false);
5132 pqi_schedule_bypass_retry(ctrl_info);
5133}
5134
5135static int pqi_retry_raid_bypass(struct pqi_io_request *io_request)
5136{
5137 struct scsi_cmnd *scmd;
5138 struct pqi_scsi_dev *device;
5139 struct pqi_ctrl_info *ctrl_info;
5140 struct pqi_queue_group *queue_group;
5141
5142 scmd = io_request->scmd;
5143 device = scmd->device->hostdata;
5144 if (pqi_device_in_reset(device)) {
5145 pqi_free_io_request(io_request);
5146 set_host_byte(scmd, DID_RESET);
5147 pqi_scsi_done(scmd);
5148 return 0;
5149 }
5150
5151 ctrl_info = shost_to_hba(scmd->device->host);
5152 queue_group = io_request->queue_group;
5153
5154 pqi_reinit_io_request(io_request);
5155
5156 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5157 device, scmd, queue_group);
5158}
5159
5160static inline struct pqi_io_request *pqi_next_queued_raid_bypass_request(
5161 struct pqi_ctrl_info *ctrl_info)
5162{
5163 unsigned long flags;
5164 struct pqi_io_request *io_request;
5165
5166 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5167 io_request = list_first_entry_or_null(
5168 &ctrl_info->raid_bypass_retry_list,
5169 struct pqi_io_request, request_list_entry);
5170 if (io_request)
5171 list_del(&io_request->request_list_entry);
5172 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5173
5174 return io_request;
5175}
5176
5177static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info)
5178{
5179 int rc;
5180 struct pqi_io_request *io_request;
5181
5182 pqi_ctrl_busy(ctrl_info);
5183
5184 while (1) {
5185 if (pqi_ctrl_blocked(ctrl_info))
5186 break;
5187 io_request = pqi_next_queued_raid_bypass_request(ctrl_info);
5188 if (!io_request)
5189 break;
5190 rc = pqi_retry_raid_bypass(io_request);
5191 if (rc) {
5192 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request,
5193 true);
5194 pqi_schedule_bypass_retry(ctrl_info);
5195 break;
5196 }
5197 }
5198
5199 pqi_ctrl_unbusy(ctrl_info);
5200}
5201
5202static void pqi_raid_bypass_retry_worker(struct work_struct *work)
5203{
5204 struct pqi_ctrl_info *ctrl_info;
5205
5206 ctrl_info = container_of(work, struct pqi_ctrl_info,
5207 raid_bypass_retry_work);
5208 pqi_retry_raid_bypass_requests(ctrl_info);
5209}
5210
5211static void pqi_clear_all_queued_raid_bypass_retries(
5212 struct pqi_ctrl_info *ctrl_info)
5213{
5214 unsigned long flags;
5215
5216 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags);
5217 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list);
5218 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags);
5219}
5220
5221static void pqi_aio_io_complete(struct pqi_io_request *io_request,
5222 void *context)
5223{
5224 struct scsi_cmnd *scmd;
5225
5226 scmd = io_request->scmd;
5227 scsi_dma_unmap(scmd);
5228 if (io_request->status == -EAGAIN)
5229 set_host_byte(scmd, DID_IMM_RETRY);
5230 else if (pqi_raid_bypass_retry_needed(io_request)) {
5231 pqi_queue_raid_bypass_retry(io_request);
5232 return;
5233 }
5234 pqi_free_io_request(io_request);
5235 pqi_scsi_done(scmd);
5236}
5237
5238static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5239 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5240 struct pqi_queue_group *queue_group)
5241{
5242 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle,
5243 scmd->cmnd, scmd->cmd_len, queue_group, NULL, false);
5244}
5245
5246static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
5247 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
5248 unsigned int cdb_length, struct pqi_queue_group *queue_group,
5249 struct pqi_encryption_info *encryption_info, bool raid_bypass)
5250{
5251 int rc;
5252 struct pqi_io_request *io_request;
5253 struct pqi_aio_path_request *request;
5254
5255 io_request = pqi_alloc_io_request(ctrl_info);
5256 io_request->io_complete_callback = pqi_aio_io_complete;
5257 io_request->scmd = scmd;
5258 io_request->raid_bypass = raid_bypass;
5259
5260 request = io_request->iu;
5261 memset(request, 0,
5262 offsetof(struct pqi_raid_path_request, sg_descriptors));
5263
5264 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO;
5265 put_unaligned_le32(aio_handle, &request->nexus_id);
5266 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
5267 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5268 put_unaligned_le16(io_request->index, &request->request_id);
5269 request->error_index = request->request_id;
5270 if (cdb_length > sizeof(request->cdb))
5271 cdb_length = sizeof(request->cdb);
5272 request->cdb_length = cdb_length;
5273 memcpy(request->cdb, cdb, cdb_length);
5274
5275 switch (scmd->sc_data_direction) {
5276 case DMA_TO_DEVICE:
5277 request->data_direction = SOP_READ_FLAG;
5278 break;
5279 case DMA_FROM_DEVICE:
5280 request->data_direction = SOP_WRITE_FLAG;
5281 break;
5282 case DMA_NONE:
5283 request->data_direction = SOP_NO_DIRECTION_FLAG;
5284 break;
5285 case DMA_BIDIRECTIONAL:
5286 request->data_direction = SOP_BIDIRECTIONAL;
5287 break;
5288 default:
5289 dev_err(&ctrl_info->pci_dev->dev,
5290 "unknown data direction: %d\n",
5291 scmd->sc_data_direction);
5292 break;
5293 }
5294
5295 if (encryption_info) {
5296 request->encryption_enable = true;
5297 put_unaligned_le16(encryption_info->data_encryption_key_index,
5298 &request->data_encryption_key_index);
5299 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5300 &request->encrypt_tweak_lower);
5301 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5302 &request->encrypt_tweak_upper);
5303 }
5304
5305 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request);
5306 if (rc) {
5307 pqi_free_io_request(io_request);
5308 return SCSI_MLQUEUE_HOST_BUSY;
5309 }
5310
5311 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5312
5313 return 0;
5314}
5315
5316static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info,
5317 struct scsi_cmnd *scmd)
5318{
5319 u16 hw_queue;
5320
5321 hw_queue = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scmd->request));
5322 if (hw_queue > ctrl_info->max_hw_queue_index)
5323 hw_queue = 0;
5324
5325 return hw_queue;
5326}
5327
5328/*
5329 * This function gets called just before we hand the completed SCSI request
5330 * back to the SML.
5331 */
5332
5333void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd)
5334{
5335 struct pqi_scsi_dev *device;
5336
David Brazdil0f672f62019-12-10 10:32:29 +00005337 if (!scmd->device) {
5338 set_host_byte(scmd, DID_NO_CONNECT);
5339 return;
5340 }
5341
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005342 device = scmd->device->hostdata;
David Brazdil0f672f62019-12-10 10:32:29 +00005343 if (!device) {
5344 set_host_byte(scmd, DID_NO_CONNECT);
5345 return;
5346 }
5347
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005348 atomic_dec(&device->scsi_cmds_outstanding);
5349}
5350
5351static int pqi_scsi_queue_command(struct Scsi_Host *shost,
5352 struct scsi_cmnd *scmd)
5353{
5354 int rc;
5355 struct pqi_ctrl_info *ctrl_info;
5356 struct pqi_scsi_dev *device;
5357 u16 hw_queue;
5358 struct pqi_queue_group *queue_group;
5359 bool raid_bypassed;
5360
5361 device = scmd->device->hostdata;
5362 ctrl_info = shost_to_hba(shost);
5363
David Brazdil0f672f62019-12-10 10:32:29 +00005364 if (!device) {
5365 set_host_byte(scmd, DID_NO_CONNECT);
5366 pqi_scsi_done(scmd);
5367 return 0;
5368 }
5369
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005370 atomic_inc(&device->scsi_cmds_outstanding);
5371
David Brazdil0f672f62019-12-10 10:32:29 +00005372 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(ctrl_info,
5373 device)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005374 set_host_byte(scmd, DID_NO_CONNECT);
5375 pqi_scsi_done(scmd);
5376 return 0;
5377 }
5378
5379 pqi_ctrl_busy(ctrl_info);
David Brazdil0f672f62019-12-10 10:32:29 +00005380 if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device) ||
Olivier Deprez0e641232021-09-23 10:07:05 +02005381 pqi_ctrl_in_ofa(ctrl_info) || pqi_ctrl_in_shutdown(ctrl_info)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005382 rc = SCSI_MLQUEUE_HOST_BUSY;
5383 goto out;
5384 }
5385
5386 /*
5387 * This is necessary because the SML doesn't zero out this field during
5388 * error recovery.
5389 */
5390 scmd->result = 0;
5391
5392 hw_queue = pqi_get_hw_queue(ctrl_info, scmd);
5393 queue_group = &ctrl_info->queue_groups[hw_queue];
5394
5395 if (pqi_is_logical_device(device)) {
5396 raid_bypassed = false;
5397 if (device->raid_bypass_enabled &&
5398 !blk_rq_is_passthrough(scmd->request)) {
5399 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device,
5400 scmd, queue_group);
5401 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY)
5402 raid_bypassed = true;
5403 }
5404 if (!raid_bypassed)
5405 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd,
5406 queue_group);
5407 } else {
5408 if (device->aio_enabled)
5409 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd,
5410 queue_group);
5411 else
5412 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd,
5413 queue_group);
5414 }
5415
5416out:
5417 pqi_ctrl_unbusy(ctrl_info);
5418 if (rc)
5419 atomic_dec(&device->scsi_cmds_outstanding);
5420
5421 return rc;
5422}
5423
5424static int pqi_wait_until_queued_io_drained(struct pqi_ctrl_info *ctrl_info,
5425 struct pqi_queue_group *queue_group)
5426{
5427 unsigned int path;
5428 unsigned long flags;
5429 bool list_is_empty;
5430
5431 for (path = 0; path < 2; path++) {
5432 while (1) {
5433 spin_lock_irqsave(
5434 &queue_group->submit_lock[path], flags);
5435 list_is_empty =
5436 list_empty(&queue_group->request_list[path]);
5437 spin_unlock_irqrestore(
5438 &queue_group->submit_lock[path], flags);
5439 if (list_is_empty)
5440 break;
5441 pqi_check_ctrl_health(ctrl_info);
5442 if (pqi_ctrl_offline(ctrl_info))
5443 return -ENXIO;
5444 usleep_range(1000, 2000);
5445 }
5446 }
5447
5448 return 0;
5449}
5450
5451static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info)
5452{
5453 int rc;
5454 unsigned int i;
5455 unsigned int path;
5456 struct pqi_queue_group *queue_group;
5457 pqi_index_t iq_pi;
5458 pqi_index_t iq_ci;
5459
5460 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5461 queue_group = &ctrl_info->queue_groups[i];
5462
5463 rc = pqi_wait_until_queued_io_drained(ctrl_info, queue_group);
5464 if (rc)
5465 return rc;
5466
5467 for (path = 0; path < 2; path++) {
5468 iq_pi = queue_group->iq_pi_copy[path];
5469
5470 while (1) {
5471 iq_ci = readl(queue_group->iq_ci[path]);
5472 if (iq_ci == iq_pi)
5473 break;
5474 pqi_check_ctrl_health(ctrl_info);
5475 if (pqi_ctrl_offline(ctrl_info))
5476 return -ENXIO;
5477 usleep_range(1000, 2000);
5478 }
5479 }
5480 }
5481
5482 return 0;
5483}
5484
5485static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info,
5486 struct pqi_scsi_dev *device)
5487{
5488 unsigned int i;
5489 unsigned int path;
5490 struct pqi_queue_group *queue_group;
5491 unsigned long flags;
5492 struct pqi_io_request *io_request;
5493 struct pqi_io_request *next;
5494 struct scsi_cmnd *scmd;
5495 struct pqi_scsi_dev *scsi_device;
5496
5497 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5498 queue_group = &ctrl_info->queue_groups[i];
5499
5500 for (path = 0; path < 2; path++) {
5501 spin_lock_irqsave(
5502 &queue_group->submit_lock[path], flags);
5503
5504 list_for_each_entry_safe(io_request, next,
5505 &queue_group->request_list[path],
5506 request_list_entry) {
5507 scmd = io_request->scmd;
5508 if (!scmd)
5509 continue;
5510
5511 scsi_device = scmd->device->hostdata;
5512 if (scsi_device != device)
5513 continue;
5514
5515 list_del(&io_request->request_list_entry);
5516 set_host_byte(scmd, DID_RESET);
Olivier Deprez0e641232021-09-23 10:07:05 +02005517 pqi_free_io_request(io_request);
5518 scsi_dma_unmap(scmd);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005519 pqi_scsi_done(scmd);
5520 }
5521
5522 spin_unlock_irqrestore(
5523 &queue_group->submit_lock[path], flags);
5524 }
5525 }
5526}
5527
David Brazdil0f672f62019-12-10 10:32:29 +00005528static void pqi_fail_io_queued_for_all_devices(struct pqi_ctrl_info *ctrl_info)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005529{
David Brazdil0f672f62019-12-10 10:32:29 +00005530 unsigned int i;
5531 unsigned int path;
5532 struct pqi_queue_group *queue_group;
5533 unsigned long flags;
5534 struct pqi_io_request *io_request;
5535 struct pqi_io_request *next;
5536 struct scsi_cmnd *scmd;
5537
5538 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5539 queue_group = &ctrl_info->queue_groups[i];
5540
5541 for (path = 0; path < 2; path++) {
5542 spin_lock_irqsave(&queue_group->submit_lock[path],
5543 flags);
5544
5545 list_for_each_entry_safe(io_request, next,
5546 &queue_group->request_list[path],
5547 request_list_entry) {
5548
5549 scmd = io_request->scmd;
5550 if (!scmd)
5551 continue;
5552
5553 list_del(&io_request->request_list_entry);
5554 set_host_byte(scmd, DID_RESET);
Olivier Deprez0e641232021-09-23 10:07:05 +02005555 pqi_free_io_request(io_request);
5556 scsi_dma_unmap(scmd);
David Brazdil0f672f62019-12-10 10:32:29 +00005557 pqi_scsi_done(scmd);
5558 }
5559
5560 spin_unlock_irqrestore(
5561 &queue_group->submit_lock[path], flags);
5562 }
5563 }
5564}
5565
5566static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5567 struct pqi_scsi_dev *device, unsigned long timeout_secs)
5568{
5569 unsigned long timeout;
5570
5571 timeout = (timeout_secs * PQI_HZ) + jiffies;
5572
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005573 while (atomic_read(&device->scsi_cmds_outstanding)) {
5574 pqi_check_ctrl_health(ctrl_info);
5575 if (pqi_ctrl_offline(ctrl_info))
5576 return -ENXIO;
David Brazdil0f672f62019-12-10 10:32:29 +00005577 if (timeout_secs != NO_TIMEOUT) {
5578 if (time_after(jiffies, timeout)) {
5579 dev_err(&ctrl_info->pci_dev->dev,
5580 "timed out waiting for pending IO\n");
5581 return -ETIMEDOUT;
5582 }
5583 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005584 usleep_range(1000, 2000);
5585 }
5586
5587 return 0;
5588}
5589
David Brazdil0f672f62019-12-10 10:32:29 +00005590static int pqi_ctrl_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5591 unsigned long timeout_secs)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005592{
5593 bool io_pending;
5594 unsigned long flags;
David Brazdil0f672f62019-12-10 10:32:29 +00005595 unsigned long timeout;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005596 struct pqi_scsi_dev *device;
5597
David Brazdil0f672f62019-12-10 10:32:29 +00005598 timeout = (timeout_secs * PQI_HZ) + jiffies;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005599 while (1) {
5600 io_pending = false;
5601
5602 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5603 list_for_each_entry(device, &ctrl_info->scsi_device_list,
5604 scsi_device_list_entry) {
5605 if (atomic_read(&device->scsi_cmds_outstanding)) {
5606 io_pending = true;
5607 break;
5608 }
5609 }
5610 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
5611 flags);
5612
5613 if (!io_pending)
5614 break;
5615
5616 pqi_check_ctrl_health(ctrl_info);
5617 if (pqi_ctrl_offline(ctrl_info))
5618 return -ENXIO;
5619
David Brazdil0f672f62019-12-10 10:32:29 +00005620 if (timeout_secs != NO_TIMEOUT) {
5621 if (time_after(jiffies, timeout)) {
5622 dev_err(&ctrl_info->pci_dev->dev,
5623 "timed out waiting for pending IO\n");
5624 return -ETIMEDOUT;
5625 }
5626 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005627 usleep_range(1000, 2000);
5628 }
5629
5630 return 0;
5631}
5632
Olivier Deprez0e641232021-09-23 10:07:05 +02005633static int pqi_ctrl_wait_for_pending_sync_cmds(struct pqi_ctrl_info *ctrl_info)
5634{
5635 while (atomic_read(&ctrl_info->sync_cmds_outstanding)) {
5636 pqi_check_ctrl_health(ctrl_info);
5637 if (pqi_ctrl_offline(ctrl_info))
5638 return -ENXIO;
5639 usleep_range(1000, 2000);
5640 }
5641
5642 return 0;
5643}
5644
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005645static void pqi_lun_reset_complete(struct pqi_io_request *io_request,
5646 void *context)
5647{
5648 struct completion *waiting = context;
5649
5650 complete(waiting);
5651}
5652
5653#define PQI_LUN_RESET_TIMEOUT_SECS 10
5654
5655static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info,
5656 struct pqi_scsi_dev *device, struct completion *wait)
5657{
5658 int rc;
5659
5660 while (1) {
5661 if (wait_for_completion_io_timeout(wait,
David Brazdil0f672f62019-12-10 10:32:29 +00005662 PQI_LUN_RESET_TIMEOUT_SECS * PQI_HZ)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005663 rc = 0;
5664 break;
5665 }
5666
5667 pqi_check_ctrl_health(ctrl_info);
5668 if (pqi_ctrl_offline(ctrl_info)) {
5669 rc = -ENXIO;
5670 break;
5671 }
5672 }
5673
5674 return rc;
5675}
5676
5677static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info,
5678 struct pqi_scsi_dev *device)
5679{
5680 int rc;
5681 struct pqi_io_request *io_request;
5682 DECLARE_COMPLETION_ONSTACK(wait);
5683 struct pqi_task_management_request *request;
5684
5685 io_request = pqi_alloc_io_request(ctrl_info);
5686 io_request->io_complete_callback = pqi_lun_reset_complete;
5687 io_request->context = &wait;
5688
5689 request = io_request->iu;
5690 memset(request, 0, sizeof(*request));
5691
5692 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT;
5693 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH,
5694 &request->header.iu_length);
5695 put_unaligned_le16(io_request->index, &request->request_id);
5696 memcpy(request->lun_number, device->scsi3addr,
5697 sizeof(request->lun_number));
5698 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET;
5699
5700 pqi_start_io(ctrl_info,
5701 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
5702 io_request);
5703
5704 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait);
5705 if (rc == 0)
5706 rc = io_request->status;
5707
5708 pqi_free_io_request(io_request);
5709
5710 return rc;
5711}
5712
5713/* Performs a reset at the LUN level. */
5714
David Brazdil0f672f62019-12-10 10:32:29 +00005715#define PQI_LUN_RESET_RETRIES 3
5716#define PQI_LUN_RESET_RETRY_INTERVAL_MSECS 10000
5717#define PQI_LUN_RESET_PENDING_IO_TIMEOUT_SECS 120
5718
5719static int _pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
5720 struct pqi_scsi_dev *device)
5721{
5722 int rc;
5723 unsigned int retries;
5724 unsigned long timeout_secs;
5725
5726 for (retries = 0;;) {
5727 rc = pqi_lun_reset(ctrl_info, device);
5728 if (rc != -EAGAIN || ++retries > PQI_LUN_RESET_RETRIES)
5729 break;
5730 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS);
5731 }
5732
5733 timeout_secs = rc ? PQI_LUN_RESET_PENDING_IO_TIMEOUT_SECS : NO_TIMEOUT;
5734
5735 rc |= pqi_device_wait_for_pending_io(ctrl_info, device, timeout_secs);
5736
5737 return rc == 0 ? SUCCESS : FAILED;
5738}
5739
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005740static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
5741 struct pqi_scsi_dev *device)
5742{
5743 int rc;
5744
David Brazdil0f672f62019-12-10 10:32:29 +00005745 mutex_lock(&ctrl_info->lun_reset_mutex);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005746
David Brazdil0f672f62019-12-10 10:32:29 +00005747 pqi_ctrl_block_requests(ctrl_info);
5748 pqi_ctrl_wait_until_quiesced(ctrl_info);
5749 pqi_fail_io_queued_for_device(ctrl_info, device);
5750 rc = pqi_wait_until_inbound_queues_empty(ctrl_info);
5751 pqi_device_reset_start(device);
5752 pqi_ctrl_unblock_requests(ctrl_info);
5753
5754 if (rc)
5755 rc = FAILED;
5756 else
5757 rc = _pqi_device_reset(ctrl_info, device);
5758
5759 pqi_device_reset_done(device);
5760
5761 mutex_unlock(&ctrl_info->lun_reset_mutex);
5762
5763 return rc;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005764}
5765
5766static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd)
5767{
5768 int rc;
5769 struct Scsi_Host *shost;
5770 struct pqi_ctrl_info *ctrl_info;
5771 struct pqi_scsi_dev *device;
5772
5773 shost = scmd->device->host;
5774 ctrl_info = shost_to_hba(shost);
5775 device = scmd->device->hostdata;
5776
5777 dev_err(&ctrl_info->pci_dev->dev,
5778 "resetting scsi %d:%d:%d:%d\n",
5779 shost->host_no, device->bus, device->target, device->lun);
5780
5781 pqi_check_ctrl_health(ctrl_info);
Olivier Deprez0e641232021-09-23 10:07:05 +02005782 if (pqi_ctrl_offline(ctrl_info) ||
5783 pqi_device_reset_blocked(ctrl_info)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005784 rc = FAILED;
5785 goto out;
5786 }
5787
David Brazdil0f672f62019-12-10 10:32:29 +00005788 pqi_wait_until_ofa_finished(ctrl_info);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005789
Olivier Deprez0e641232021-09-23 10:07:05 +02005790 atomic_inc(&ctrl_info->sync_cmds_outstanding);
David Brazdil0f672f62019-12-10 10:32:29 +00005791 rc = pqi_device_reset(ctrl_info, device);
Olivier Deprez0e641232021-09-23 10:07:05 +02005792 atomic_dec(&ctrl_info->sync_cmds_outstanding);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005793
5794out:
5795 dev_err(&ctrl_info->pci_dev->dev,
5796 "reset of scsi %d:%d:%d:%d: %s\n",
5797 shost->host_no, device->bus, device->target, device->lun,
5798 rc == SUCCESS ? "SUCCESS" : "FAILED");
5799
5800 return rc;
5801}
5802
5803static int pqi_slave_alloc(struct scsi_device *sdev)
5804{
5805 struct pqi_scsi_dev *device;
5806 unsigned long flags;
5807 struct pqi_ctrl_info *ctrl_info;
5808 struct scsi_target *starget;
5809 struct sas_rphy *rphy;
5810
5811 ctrl_info = shost_to_hba(sdev->host);
5812
5813 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
5814
5815 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) {
5816 starget = scsi_target(sdev);
5817 rphy = target_to_rphy(starget);
5818 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy);
5819 if (device) {
5820 device->target = sdev_id(sdev);
5821 device->lun = sdev->lun;
5822 device->target_lun_valid = true;
5823 }
5824 } else {
5825 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev),
5826 sdev_id(sdev), sdev->lun);
5827 }
5828
5829 if (device) {
5830 sdev->hostdata = device;
5831 device->sdev = sdev;
5832 if (device->queue_depth) {
5833 device->advertised_queue_depth = device->queue_depth;
5834 scsi_change_queue_depth(sdev,
5835 device->advertised_queue_depth);
5836 }
David Brazdil0f672f62019-12-10 10:32:29 +00005837 if (pqi_is_logical_device(device))
5838 pqi_disable_write_same(sdev);
5839 else
5840 sdev->allow_restart = 1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005841 }
5842
5843 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
5844
5845 return 0;
5846}
5847
5848static int pqi_map_queues(struct Scsi_Host *shost)
5849{
5850 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
5851
David Brazdil0f672f62019-12-10 10:32:29 +00005852 return blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT],
5853 ctrl_info->pci_dev, 0);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005854}
5855
5856static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info,
5857 void __user *arg)
5858{
5859 struct pci_dev *pci_dev;
5860 u32 subsystem_vendor;
5861 u32 subsystem_device;
5862 cciss_pci_info_struct pciinfo;
5863
5864 if (!arg)
5865 return -EINVAL;
5866
5867 pci_dev = ctrl_info->pci_dev;
5868
5869 pciinfo.domain = pci_domain_nr(pci_dev->bus);
5870 pciinfo.bus = pci_dev->bus->number;
5871 pciinfo.dev_fn = pci_dev->devfn;
5872 subsystem_vendor = pci_dev->subsystem_vendor;
5873 subsystem_device = pci_dev->subsystem_device;
5874 pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) |
5875 subsystem_vendor;
5876
5877 if (copy_to_user(arg, &pciinfo, sizeof(pciinfo)))
5878 return -EFAULT;
5879
5880 return 0;
5881}
5882
5883static int pqi_getdrivver_ioctl(void __user *arg)
5884{
5885 u32 version;
5886
5887 if (!arg)
5888 return -EINVAL;
5889
5890 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) |
5891 (DRIVER_RELEASE << 16) | DRIVER_REVISION;
5892
5893 if (copy_to_user(arg, &version, sizeof(version)))
5894 return -EFAULT;
5895
5896 return 0;
5897}
5898
5899struct ciss_error_info {
5900 u8 scsi_status;
5901 int command_status;
5902 size_t sense_data_length;
5903};
5904
5905static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info,
5906 struct ciss_error_info *ciss_error_info)
5907{
5908 int ciss_cmd_status;
5909 size_t sense_data_length;
5910
5911 switch (pqi_error_info->data_out_result) {
5912 case PQI_DATA_IN_OUT_GOOD:
5913 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS;
5914 break;
5915 case PQI_DATA_IN_OUT_UNDERFLOW:
5916 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN;
5917 break;
5918 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
5919 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN;
5920 break;
5921 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
5922 case PQI_DATA_IN_OUT_BUFFER_ERROR:
5923 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
5924 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
5925 case PQI_DATA_IN_OUT_ERROR:
5926 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR;
5927 break;
5928 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
5929 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
5930 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
5931 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
5932 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
5933 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
5934 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
5935 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
5936 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
5937 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
5938 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR;
5939 break;
5940 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
5941 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT;
5942 break;
5943 case PQI_DATA_IN_OUT_ABORTED:
5944 ciss_cmd_status = CISS_CMD_STATUS_ABORTED;
5945 break;
5946 case PQI_DATA_IN_OUT_TIMEOUT:
5947 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT;
5948 break;
5949 default:
5950 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS;
5951 break;
5952 }
5953
5954 sense_data_length =
5955 get_unaligned_le16(&pqi_error_info->sense_data_length);
5956 if (sense_data_length == 0)
5957 sense_data_length =
5958 get_unaligned_le16(&pqi_error_info->response_data_length);
5959 if (sense_data_length)
5960 if (sense_data_length > sizeof(pqi_error_info->data))
5961 sense_data_length = sizeof(pqi_error_info->data);
5962
5963 ciss_error_info->scsi_status = pqi_error_info->status;
5964 ciss_error_info->command_status = ciss_cmd_status;
5965 ciss_error_info->sense_data_length = sense_data_length;
5966}
5967
5968static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
5969{
5970 int rc;
5971 char *kernel_buffer = NULL;
5972 u16 iu_length;
5973 size_t sense_data_length;
5974 IOCTL_Command_struct iocommand;
5975 struct pqi_raid_path_request request;
5976 struct pqi_raid_error_info pqi_error_info;
5977 struct ciss_error_info ciss_error_info;
5978
5979 if (pqi_ctrl_offline(ctrl_info))
5980 return -ENXIO;
5981 if (!arg)
5982 return -EINVAL;
5983 if (!capable(CAP_SYS_RAWIO))
5984 return -EPERM;
5985 if (copy_from_user(&iocommand, arg, sizeof(iocommand)))
5986 return -EFAULT;
5987 if (iocommand.buf_size < 1 &&
5988 iocommand.Request.Type.Direction != XFER_NONE)
5989 return -EINVAL;
5990 if (iocommand.Request.CDBLen > sizeof(request.cdb))
5991 return -EINVAL;
5992 if (iocommand.Request.Type.Type != TYPE_CMD)
5993 return -EINVAL;
5994
5995 switch (iocommand.Request.Type.Direction) {
5996 case XFER_NONE:
5997 case XFER_WRITE:
5998 case XFER_READ:
5999 case XFER_READ | XFER_WRITE:
6000 break;
6001 default:
6002 return -EINVAL;
6003 }
6004
6005 if (iocommand.buf_size > 0) {
6006 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL);
6007 if (!kernel_buffer)
6008 return -ENOMEM;
6009 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6010 if (copy_from_user(kernel_buffer, iocommand.buf,
6011 iocommand.buf_size)) {
6012 rc = -EFAULT;
6013 goto out;
6014 }
6015 } else {
6016 memset(kernel_buffer, 0, iocommand.buf_size);
6017 }
6018 }
6019
6020 memset(&request, 0, sizeof(request));
6021
6022 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
6023 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
6024 PQI_REQUEST_HEADER_LENGTH;
6025 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes,
6026 sizeof(request.lun_number));
6027 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen);
6028 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
6029
6030 switch (iocommand.Request.Type.Direction) {
6031 case XFER_NONE:
6032 request.data_direction = SOP_NO_DIRECTION_FLAG;
6033 break;
6034 case XFER_WRITE:
6035 request.data_direction = SOP_WRITE_FLAG;
6036 break;
6037 case XFER_READ:
6038 request.data_direction = SOP_READ_FLAG;
6039 break;
6040 case XFER_READ | XFER_WRITE:
6041 request.data_direction = SOP_BIDIRECTIONAL;
6042 break;
6043 }
6044
6045 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
6046
6047 if (iocommand.buf_size > 0) {
6048 put_unaligned_le32(iocommand.buf_size, &request.buffer_length);
6049
6050 rc = pqi_map_single(ctrl_info->pci_dev,
6051 &request.sg_descriptors[0], kernel_buffer,
David Brazdil0f672f62019-12-10 10:32:29 +00006052 iocommand.buf_size, DMA_BIDIRECTIONAL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006053 if (rc)
6054 goto out;
6055
6056 iu_length += sizeof(request.sg_descriptors[0]);
6057 }
6058
6059 put_unaligned_le16(iu_length, &request.header.iu_length);
6060
6061 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6062 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info, NO_TIMEOUT);
6063
6064 if (iocommand.buf_size > 0)
6065 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1,
David Brazdil0f672f62019-12-10 10:32:29 +00006066 DMA_BIDIRECTIONAL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006067
6068 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info));
6069
6070 if (rc == 0) {
6071 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info);
6072 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status;
6073 iocommand.error_info.CommandStatus =
6074 ciss_error_info.command_status;
6075 sense_data_length = ciss_error_info.sense_data_length;
6076 if (sense_data_length) {
6077 if (sense_data_length >
6078 sizeof(iocommand.error_info.SenseInfo))
6079 sense_data_length =
6080 sizeof(iocommand.error_info.SenseInfo);
6081 memcpy(iocommand.error_info.SenseInfo,
6082 pqi_error_info.data, sense_data_length);
6083 iocommand.error_info.SenseLen = sense_data_length;
6084 }
6085 }
6086
6087 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) {
6088 rc = -EFAULT;
6089 goto out;
6090 }
6091
6092 if (rc == 0 && iocommand.buf_size > 0 &&
6093 (iocommand.Request.Type.Direction & XFER_READ)) {
6094 if (copy_to_user(iocommand.buf, kernel_buffer,
6095 iocommand.buf_size)) {
6096 rc = -EFAULT;
6097 }
6098 }
6099
6100out:
6101 kfree(kernel_buffer);
6102
6103 return rc;
6104}
6105
David Brazdil0f672f62019-12-10 10:32:29 +00006106static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd,
6107 void __user *arg)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006108{
6109 int rc;
6110 struct pqi_ctrl_info *ctrl_info;
6111
6112 ctrl_info = shost_to_hba(sdev->host);
6113
Olivier Deprez0e641232021-09-23 10:07:05 +02006114 if (pqi_ctrl_in_ofa(ctrl_info) ||
6115 pqi_ctrl_in_shutdown(ctrl_info))
David Brazdil0f672f62019-12-10 10:32:29 +00006116 return -EBUSY;
6117
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006118 switch (cmd) {
6119 case CCISS_DEREGDISK:
6120 case CCISS_REGNEWDISK:
6121 case CCISS_REGNEWD:
6122 rc = pqi_scan_scsi_devices(ctrl_info);
6123 break;
6124 case CCISS_GETPCIINFO:
6125 rc = pqi_getpciinfo_ioctl(ctrl_info, arg);
6126 break;
6127 case CCISS_GETDRIVVER:
6128 rc = pqi_getdrivver_ioctl(arg);
6129 break;
6130 case CCISS_PASSTHRU:
6131 rc = pqi_passthru_ioctl(ctrl_info, arg);
6132 break;
6133 default:
6134 rc = -EINVAL;
6135 break;
6136 }
6137
6138 return rc;
6139}
6140
David Brazdil0f672f62019-12-10 10:32:29 +00006141static ssize_t pqi_firmware_version_show(struct device *dev,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006142 struct device_attribute *attr, char *buffer)
6143{
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006144 struct Scsi_Host *shost;
6145 struct pqi_ctrl_info *ctrl_info;
6146
6147 shost = class_to_shost(dev);
6148 ctrl_info = shost_to_hba(shost);
6149
David Brazdil0f672f62019-12-10 10:32:29 +00006150 return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version);
6151}
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006152
David Brazdil0f672f62019-12-10 10:32:29 +00006153static ssize_t pqi_driver_version_show(struct device *dev,
6154 struct device_attribute *attr, char *buffer)
6155{
6156 struct Scsi_Host *shost;
6157 struct pqi_ctrl_info *ctrl_info;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006158
David Brazdil0f672f62019-12-10 10:32:29 +00006159 shost = class_to_shost(dev);
6160 ctrl_info = shost_to_hba(shost);
6161
6162 return snprintf(buffer, PAGE_SIZE,
6163 "%s\n", DRIVER_VERSION BUILD_TIMESTAMP);
6164}
6165
6166static ssize_t pqi_serial_number_show(struct device *dev,
6167 struct device_attribute *attr, char *buffer)
6168{
6169 struct Scsi_Host *shost;
6170 struct pqi_ctrl_info *ctrl_info;
6171
6172 shost = class_to_shost(dev);
6173 ctrl_info = shost_to_hba(shost);
6174
6175 return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number);
6176}
6177
6178static ssize_t pqi_model_show(struct device *dev,
6179 struct device_attribute *attr, char *buffer)
6180{
6181 struct Scsi_Host *shost;
6182 struct pqi_ctrl_info *ctrl_info;
6183
6184 shost = class_to_shost(dev);
6185 ctrl_info = shost_to_hba(shost);
6186
6187 return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model);
6188}
6189
6190static ssize_t pqi_vendor_show(struct device *dev,
6191 struct device_attribute *attr, char *buffer)
6192{
6193 struct Scsi_Host *shost;
6194 struct pqi_ctrl_info *ctrl_info;
6195
6196 shost = class_to_shost(dev);
6197 ctrl_info = shost_to_hba(shost);
6198
6199 return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006200}
6201
6202static ssize_t pqi_host_rescan_store(struct device *dev,
6203 struct device_attribute *attr, const char *buffer, size_t count)
6204{
6205 struct Scsi_Host *shost = class_to_shost(dev);
6206
6207 pqi_scan_start(shost);
6208
6209 return count;
6210}
6211
6212static ssize_t pqi_lockup_action_show(struct device *dev,
6213 struct device_attribute *attr, char *buffer)
6214{
6215 int count = 0;
6216 unsigned int i;
6217
6218 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6219 if (pqi_lockup_actions[i].action == pqi_lockup_action)
6220 count += snprintf(buffer + count, PAGE_SIZE - count,
6221 "[%s] ", pqi_lockup_actions[i].name);
6222 else
6223 count += snprintf(buffer + count, PAGE_SIZE - count,
6224 "%s ", pqi_lockup_actions[i].name);
6225 }
6226
6227 count += snprintf(buffer + count, PAGE_SIZE - count, "\n");
6228
6229 return count;
6230}
6231
6232static ssize_t pqi_lockup_action_store(struct device *dev,
6233 struct device_attribute *attr, const char *buffer, size_t count)
6234{
6235 unsigned int i;
6236 char *action_name;
6237 char action_name_buffer[32];
6238
6239 strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer));
6240 action_name = strstrip(action_name_buffer);
6241
6242 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6243 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) {
6244 pqi_lockup_action = pqi_lockup_actions[i].action;
6245 return count;
6246 }
6247 }
6248
6249 return -EINVAL;
6250}
6251
David Brazdil0f672f62019-12-10 10:32:29 +00006252static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL);
6253static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL);
6254static DEVICE_ATTR(model, 0444, pqi_model_show, NULL);
6255static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL);
6256static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006257static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store);
6258static DEVICE_ATTR(lockup_action, 0644,
6259 pqi_lockup_action_show, pqi_lockup_action_store);
6260
6261static struct device_attribute *pqi_shost_attrs[] = {
David Brazdil0f672f62019-12-10 10:32:29 +00006262 &dev_attr_driver_version,
6263 &dev_attr_firmware_version,
6264 &dev_attr_model,
6265 &dev_attr_serial_number,
6266 &dev_attr_vendor,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006267 &dev_attr_rescan,
6268 &dev_attr_lockup_action,
6269 NULL
6270};
6271
David Brazdil0f672f62019-12-10 10:32:29 +00006272static ssize_t pqi_unique_id_show(struct device *dev,
6273 struct device_attribute *attr, char *buffer)
6274{
6275 struct pqi_ctrl_info *ctrl_info;
6276 struct scsi_device *sdev;
6277 struct pqi_scsi_dev *device;
6278 unsigned long flags;
Olivier Deprez0e641232021-09-23 10:07:05 +02006279 u8 unique_id[16];
David Brazdil0f672f62019-12-10 10:32:29 +00006280
6281 sdev = to_scsi_device(dev);
6282 ctrl_info = shost_to_hba(sdev->host);
6283
6284 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6285
6286 device = sdev->hostdata;
6287 if (!device) {
6288 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6289 flags);
6290 return -ENODEV;
6291 }
Olivier Deprez0e641232021-09-23 10:07:05 +02006292
6293 if (device->is_physical_device) {
6294 memset(unique_id, 0, 8);
6295 memcpy(unique_id + 8, &device->wwid, sizeof(device->wwid));
6296 } else {
6297 memcpy(unique_id, device->volume_id, sizeof(device->volume_id));
6298 }
David Brazdil0f672f62019-12-10 10:32:29 +00006299
6300 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6301
6302 return snprintf(buffer, PAGE_SIZE,
6303 "%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\n",
Olivier Deprez0e641232021-09-23 10:07:05 +02006304 unique_id[0], unique_id[1], unique_id[2], unique_id[3],
6305 unique_id[4], unique_id[5], unique_id[6], unique_id[7],
6306 unique_id[8], unique_id[9], unique_id[10], unique_id[11],
6307 unique_id[12], unique_id[13], unique_id[14], unique_id[15]);
David Brazdil0f672f62019-12-10 10:32:29 +00006308}
6309
6310static ssize_t pqi_lunid_show(struct device *dev,
6311 struct device_attribute *attr, char *buffer)
6312{
6313 struct pqi_ctrl_info *ctrl_info;
6314 struct scsi_device *sdev;
6315 struct pqi_scsi_dev *device;
6316 unsigned long flags;
6317 u8 lunid[8];
6318
6319 sdev = to_scsi_device(dev);
6320 ctrl_info = shost_to_hba(sdev->host);
6321
6322 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6323
6324 device = sdev->hostdata;
6325 if (!device) {
6326 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6327 flags);
6328 return -ENODEV;
6329 }
6330 memcpy(lunid, device->scsi3addr, sizeof(lunid));
6331
6332 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6333
6334 return snprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid);
6335}
6336
6337#define MAX_PATHS 8
6338static ssize_t pqi_path_info_show(struct device *dev,
6339 struct device_attribute *attr, char *buf)
6340{
6341 struct pqi_ctrl_info *ctrl_info;
6342 struct scsi_device *sdev;
6343 struct pqi_scsi_dev *device;
6344 unsigned long flags;
6345 int i;
6346 int output_len = 0;
6347 u8 box;
6348 u8 bay;
6349 u8 path_map_index = 0;
6350 char *active;
6351 unsigned char phys_connector[2];
6352
6353 sdev = to_scsi_device(dev);
6354 ctrl_info = shost_to_hba(sdev->host);
6355
6356 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6357
6358 device = sdev->hostdata;
6359 if (!device) {
6360 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6361 flags);
6362 return -ENODEV;
6363 }
6364
6365 bay = device->bay;
6366 for (i = 0; i < MAX_PATHS; i++) {
6367 path_map_index = 1<<i;
6368 if (i == device->active_path_index)
6369 active = "Active";
6370 else if (device->path_map & path_map_index)
6371 active = "Inactive";
6372 else
6373 continue;
6374
6375 output_len += scnprintf(buf + output_len,
6376 PAGE_SIZE - output_len,
6377 "[%d:%d:%d:%d] %20.20s ",
6378 ctrl_info->scsi_host->host_no,
6379 device->bus, device->target,
6380 device->lun,
6381 scsi_device_type(device->devtype));
6382
6383 if (device->devtype == TYPE_RAID ||
6384 pqi_is_logical_device(device))
6385 goto end_buffer;
6386
6387 memcpy(&phys_connector, &device->phys_connector[i],
6388 sizeof(phys_connector));
6389 if (phys_connector[0] < '0')
6390 phys_connector[0] = '0';
6391 if (phys_connector[1] < '0')
6392 phys_connector[1] = '0';
6393
6394 output_len += scnprintf(buf + output_len,
6395 PAGE_SIZE - output_len,
6396 "PORT: %.2s ", phys_connector);
6397
6398 box = device->box[i];
6399 if (box != 0 && box != 0xFF)
6400 output_len += scnprintf(buf + output_len,
6401 PAGE_SIZE - output_len,
6402 "BOX: %hhu ", box);
6403
6404 if ((device->devtype == TYPE_DISK ||
6405 device->devtype == TYPE_ZBC) &&
6406 pqi_expose_device(device))
6407 output_len += scnprintf(buf + output_len,
6408 PAGE_SIZE - output_len,
6409 "BAY: %hhu ", bay);
6410
6411end_buffer:
6412 output_len += scnprintf(buf + output_len,
6413 PAGE_SIZE - output_len,
6414 "%s\n", active);
6415 }
6416
6417 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6418 return output_len;
6419}
6420
6421
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006422static ssize_t pqi_sas_address_show(struct device *dev,
6423 struct device_attribute *attr, char *buffer)
6424{
6425 struct pqi_ctrl_info *ctrl_info;
6426 struct scsi_device *sdev;
6427 struct pqi_scsi_dev *device;
6428 unsigned long flags;
6429 u64 sas_address;
6430
6431 sdev = to_scsi_device(dev);
6432 ctrl_info = shost_to_hba(sdev->host);
6433
6434 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6435
6436 device = sdev->hostdata;
6437 if (pqi_is_logical_device(device)) {
6438 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock,
6439 flags);
6440 return -ENODEV;
6441 }
6442 sas_address = device->sas_address;
6443
6444 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6445
6446 return snprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address);
6447}
6448
6449static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev,
6450 struct device_attribute *attr, char *buffer)
6451{
6452 struct pqi_ctrl_info *ctrl_info;
6453 struct scsi_device *sdev;
6454 struct pqi_scsi_dev *device;
6455 unsigned long flags;
6456
6457 sdev = to_scsi_device(dev);
6458 ctrl_info = shost_to_hba(sdev->host);
6459
6460 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6461
6462 device = sdev->hostdata;
6463 buffer[0] = device->raid_bypass_enabled ? '1' : '0';
6464 buffer[1] = '\n';
6465 buffer[2] = '\0';
6466
6467 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6468
6469 return 2;
6470}
6471
6472static ssize_t pqi_raid_level_show(struct device *dev,
6473 struct device_attribute *attr, char *buffer)
6474{
6475 struct pqi_ctrl_info *ctrl_info;
6476 struct scsi_device *sdev;
6477 struct pqi_scsi_dev *device;
6478 unsigned long flags;
6479 char *raid_level;
6480
6481 sdev = to_scsi_device(dev);
6482 ctrl_info = shost_to_hba(sdev->host);
6483
6484 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6485
6486 device = sdev->hostdata;
6487
6488 if (pqi_is_logical_device(device))
6489 raid_level = pqi_raid_level_to_string(device->raid_level);
6490 else
6491 raid_level = "N/A";
6492
6493 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6494
6495 return snprintf(buffer, PAGE_SIZE, "%s\n", raid_level);
6496}
6497
David Brazdil0f672f62019-12-10 10:32:29 +00006498static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL);
6499static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL);
6500static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006501static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL);
6502static DEVICE_ATTR(ssd_smart_path_enabled, 0444,
6503 pqi_ssd_smart_path_enabled_show, NULL);
6504static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL);
6505
6506static struct device_attribute *pqi_sdev_attrs[] = {
David Brazdil0f672f62019-12-10 10:32:29 +00006507 &dev_attr_lunid,
6508 &dev_attr_unique_id,
6509 &dev_attr_path_info,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006510 &dev_attr_sas_address,
6511 &dev_attr_ssd_smart_path_enabled,
6512 &dev_attr_raid_level,
6513 NULL
6514};
6515
6516static struct scsi_host_template pqi_driver_template = {
6517 .module = THIS_MODULE,
6518 .name = DRIVER_NAME_SHORT,
6519 .proc_name = DRIVER_NAME_SHORT,
6520 .queuecommand = pqi_scsi_queue_command,
6521 .scan_start = pqi_scan_start,
6522 .scan_finished = pqi_scan_finished,
6523 .this_id = -1,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006524 .eh_device_reset_handler = pqi_eh_device_reset_handler,
6525 .ioctl = pqi_ioctl,
6526 .slave_alloc = pqi_slave_alloc,
6527 .map_queues = pqi_map_queues,
6528 .sdev_attrs = pqi_sdev_attrs,
6529 .shost_attrs = pqi_shost_attrs,
6530};
6531
6532static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info)
6533{
6534 int rc;
6535 struct Scsi_Host *shost;
6536
6537 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info));
6538 if (!shost) {
6539 dev_err(&ctrl_info->pci_dev->dev,
6540 "scsi_host_alloc failed for controller %u\n",
6541 ctrl_info->ctrl_id);
6542 return -ENOMEM;
6543 }
6544
6545 shost->io_port = 0;
6546 shost->n_io_port = 0;
6547 shost->this_id = -1;
6548 shost->max_channel = PQI_MAX_BUS;
6549 shost->max_cmd_len = MAX_COMMAND_SIZE;
6550 shost->max_lun = ~0;
6551 shost->max_id = ~0;
6552 shost->max_sectors = ctrl_info->max_sectors;
6553 shost->can_queue = ctrl_info->scsi_ml_can_queue;
6554 shost->cmd_per_lun = shost->can_queue;
6555 shost->sg_tablesize = ctrl_info->sg_tablesize;
6556 shost->transportt = pqi_sas_transport_template;
6557 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0);
6558 shost->unique_id = shost->irq;
6559 shost->nr_hw_queues = ctrl_info->num_queue_groups;
6560 shost->hostdata[0] = (unsigned long)ctrl_info;
6561
6562 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev);
6563 if (rc) {
6564 dev_err(&ctrl_info->pci_dev->dev,
6565 "scsi_add_host failed for controller %u\n",
6566 ctrl_info->ctrl_id);
6567 goto free_host;
6568 }
6569
6570 rc = pqi_add_sas_host(shost, ctrl_info);
6571 if (rc) {
6572 dev_err(&ctrl_info->pci_dev->dev,
6573 "add SAS host failed for controller %u\n",
6574 ctrl_info->ctrl_id);
6575 goto remove_host;
6576 }
6577
6578 ctrl_info->scsi_host = shost;
6579
6580 return 0;
6581
6582remove_host:
6583 scsi_remove_host(shost);
6584free_host:
6585 scsi_host_put(shost);
6586
6587 return rc;
6588}
6589
6590static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info)
6591{
6592 struct Scsi_Host *shost;
6593
6594 pqi_delete_sas_host(ctrl_info);
6595
6596 shost = ctrl_info->scsi_host;
6597 if (!shost)
6598 return;
6599
6600 scsi_remove_host(shost);
6601 scsi_host_put(shost);
6602}
6603
6604static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info)
6605{
6606 int rc = 0;
6607 struct pqi_device_registers __iomem *pqi_registers;
6608 unsigned long timeout;
6609 unsigned int timeout_msecs;
6610 union pqi_reset_register reset_reg;
6611
6612 pqi_registers = ctrl_info->pqi_registers;
6613 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100;
6614 timeout = msecs_to_jiffies(timeout_msecs) + jiffies;
6615
6616 while (1) {
6617 msleep(PQI_RESET_POLL_INTERVAL_MSECS);
6618 reset_reg.all_bits = readl(&pqi_registers->device_reset);
6619 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED)
6620 break;
6621 pqi_check_ctrl_health(ctrl_info);
6622 if (pqi_ctrl_offline(ctrl_info)) {
6623 rc = -ENXIO;
6624 break;
6625 }
6626 if (time_after(jiffies, timeout)) {
6627 rc = -ETIMEDOUT;
6628 break;
6629 }
6630 }
6631
6632 return rc;
6633}
6634
6635static int pqi_reset(struct pqi_ctrl_info *ctrl_info)
6636{
6637 int rc;
6638 union pqi_reset_register reset_reg;
6639
6640 if (ctrl_info->pqi_reset_quiesce_supported) {
6641 rc = sis_pqi_reset_quiesce(ctrl_info);
6642 if (rc) {
6643 dev_err(&ctrl_info->pci_dev->dev,
6644 "PQI reset failed during quiesce with error %d\n",
6645 rc);
6646 return rc;
6647 }
6648 }
6649
6650 reset_reg.all_bits = 0;
6651 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET;
6652 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET;
6653
6654 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset);
6655
6656 rc = pqi_wait_for_pqi_reset_completion(ctrl_info);
6657 if (rc)
6658 dev_err(&ctrl_info->pci_dev->dev,
6659 "PQI reset failed with error %d\n", rc);
6660
6661 return rc;
6662}
6663
David Brazdil0f672f62019-12-10 10:32:29 +00006664static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info)
6665{
6666 int rc;
6667 struct bmic_sense_subsystem_info *sense_info;
6668
6669 sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL);
6670 if (!sense_info)
6671 return -ENOMEM;
6672
6673 rc = pqi_sense_subsystem_info(ctrl_info, sense_info);
6674 if (rc)
6675 goto out;
6676
6677 memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number,
6678 sizeof(sense_info->ctrl_serial_number));
6679 ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0';
6680
6681out:
6682 kfree(sense_info);
6683
6684 return rc;
6685}
6686
6687static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006688{
6689 int rc;
6690 struct bmic_identify_controller *identify;
6691
6692 identify = kmalloc(sizeof(*identify), GFP_KERNEL);
6693 if (!identify)
6694 return -ENOMEM;
6695
6696 rc = pqi_identify_controller(ctrl_info, identify);
6697 if (rc)
6698 goto out;
6699
6700 memcpy(ctrl_info->firmware_version, identify->firmware_version,
6701 sizeof(identify->firmware_version));
6702 ctrl_info->firmware_version[sizeof(identify->firmware_version)] = '\0';
6703 snprintf(ctrl_info->firmware_version +
6704 strlen(ctrl_info->firmware_version),
6705 sizeof(ctrl_info->firmware_version),
6706 "-%u", get_unaligned_le16(&identify->firmware_build_number));
6707
David Brazdil0f672f62019-12-10 10:32:29 +00006708 memcpy(ctrl_info->model, identify->product_id,
6709 sizeof(identify->product_id));
6710 ctrl_info->model[sizeof(identify->product_id)] = '\0';
6711
6712 memcpy(ctrl_info->vendor, identify->vendor_id,
6713 sizeof(identify->vendor_id));
6714 ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0';
6715
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006716out:
6717 kfree(identify);
6718
6719 return rc;
6720}
6721
David Brazdil0f672f62019-12-10 10:32:29 +00006722struct pqi_config_table_section_info {
6723 struct pqi_ctrl_info *ctrl_info;
6724 void *section;
6725 u32 section_offset;
6726 void __iomem *section_iomem_addr;
6727};
6728
6729static inline bool pqi_is_firmware_feature_supported(
6730 struct pqi_config_table_firmware_features *firmware_features,
6731 unsigned int bit_position)
6732{
6733 unsigned int byte_index;
6734
6735 byte_index = bit_position / BITS_PER_BYTE;
6736
6737 if (byte_index >= le16_to_cpu(firmware_features->num_elements))
6738 return false;
6739
6740 return firmware_features->features_supported[byte_index] &
6741 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
6742}
6743
6744static inline bool pqi_is_firmware_feature_enabled(
6745 struct pqi_config_table_firmware_features *firmware_features,
6746 void __iomem *firmware_features_iomem_addr,
6747 unsigned int bit_position)
6748{
6749 unsigned int byte_index;
6750 u8 __iomem *features_enabled_iomem_addr;
6751
6752 byte_index = (bit_position / BITS_PER_BYTE) +
6753 (le16_to_cpu(firmware_features->num_elements) * 2);
6754
6755 features_enabled_iomem_addr = firmware_features_iomem_addr +
6756 offsetof(struct pqi_config_table_firmware_features,
6757 features_supported) + byte_index;
6758
6759 return *((__force u8 *)features_enabled_iomem_addr) &
6760 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
6761}
6762
6763static inline void pqi_request_firmware_feature(
6764 struct pqi_config_table_firmware_features *firmware_features,
6765 unsigned int bit_position)
6766{
6767 unsigned int byte_index;
6768
6769 byte_index = (bit_position / BITS_PER_BYTE) +
6770 le16_to_cpu(firmware_features->num_elements);
6771
6772 firmware_features->features_supported[byte_index] |=
6773 (1 << (bit_position % BITS_PER_BYTE));
6774}
6775
6776static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info,
6777 u16 first_section, u16 last_section)
6778{
6779 struct pqi_vendor_general_request request;
6780
6781 memset(&request, 0, sizeof(request));
6782
6783 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
6784 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
6785 &request.header.iu_length);
6786 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE,
6787 &request.function_code);
6788 put_unaligned_le16(first_section,
6789 &request.data.config_table_update.first_section);
6790 put_unaligned_le16(last_section,
6791 &request.data.config_table_update.last_section);
6792
6793 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6794 0, NULL, NO_TIMEOUT);
6795}
6796
6797static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info,
6798 struct pqi_config_table_firmware_features *firmware_features,
6799 void __iomem *firmware_features_iomem_addr)
6800{
6801 void *features_requested;
6802 void __iomem *features_requested_iomem_addr;
6803
6804 features_requested = firmware_features->features_supported +
6805 le16_to_cpu(firmware_features->num_elements);
6806
6807 features_requested_iomem_addr = firmware_features_iomem_addr +
6808 (features_requested - (void *)firmware_features);
6809
6810 memcpy_toio(features_requested_iomem_addr, features_requested,
6811 le16_to_cpu(firmware_features->num_elements));
6812
6813 return pqi_config_table_update(ctrl_info,
6814 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES,
6815 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES);
6816}
6817
6818struct pqi_firmware_feature {
6819 char *feature_name;
6820 unsigned int feature_bit;
6821 bool supported;
6822 bool enabled;
6823 void (*feature_status)(struct pqi_ctrl_info *ctrl_info,
6824 struct pqi_firmware_feature *firmware_feature);
6825};
6826
6827static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info,
6828 struct pqi_firmware_feature *firmware_feature)
6829{
6830 if (!firmware_feature->supported) {
6831 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n",
6832 firmware_feature->feature_name);
6833 return;
6834 }
6835
6836 if (firmware_feature->enabled) {
6837 dev_info(&ctrl_info->pci_dev->dev,
6838 "%s enabled\n", firmware_feature->feature_name);
6839 return;
6840 }
6841
6842 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n",
6843 firmware_feature->feature_name);
6844}
6845
6846static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info,
6847 struct pqi_firmware_feature *firmware_feature)
6848{
6849 if (firmware_feature->feature_status)
6850 firmware_feature->feature_status(ctrl_info, firmware_feature);
6851}
6852
6853static DEFINE_MUTEX(pqi_firmware_features_mutex);
6854
6855static struct pqi_firmware_feature pqi_firmware_features[] = {
6856 {
6857 .feature_name = "Online Firmware Activation",
6858 .feature_bit = PQI_FIRMWARE_FEATURE_OFA,
6859 .feature_status = pqi_firmware_feature_status,
6860 },
6861 {
6862 .feature_name = "Serial Management Protocol",
6863 .feature_bit = PQI_FIRMWARE_FEATURE_SMP,
6864 .feature_status = pqi_firmware_feature_status,
6865 },
6866 {
6867 .feature_name = "New Soft Reset Handshake",
6868 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE,
6869 .feature_status = pqi_firmware_feature_status,
6870 },
6871};
6872
6873static void pqi_process_firmware_features(
6874 struct pqi_config_table_section_info *section_info)
6875{
6876 int rc;
6877 struct pqi_ctrl_info *ctrl_info;
6878 struct pqi_config_table_firmware_features *firmware_features;
6879 void __iomem *firmware_features_iomem_addr;
6880 unsigned int i;
6881 unsigned int num_features_supported;
6882
6883 ctrl_info = section_info->ctrl_info;
6884 firmware_features = section_info->section;
6885 firmware_features_iomem_addr = section_info->section_iomem_addr;
6886
6887 for (i = 0, num_features_supported = 0;
6888 i < ARRAY_SIZE(pqi_firmware_features); i++) {
6889 if (pqi_is_firmware_feature_supported(firmware_features,
6890 pqi_firmware_features[i].feature_bit)) {
6891 pqi_firmware_features[i].supported = true;
6892 num_features_supported++;
6893 } else {
6894 pqi_firmware_feature_update(ctrl_info,
6895 &pqi_firmware_features[i]);
6896 }
6897 }
6898
6899 if (num_features_supported == 0)
6900 return;
6901
6902 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6903 if (!pqi_firmware_features[i].supported)
6904 continue;
6905 pqi_request_firmware_feature(firmware_features,
6906 pqi_firmware_features[i].feature_bit);
6907 }
6908
6909 rc = pqi_enable_firmware_features(ctrl_info, firmware_features,
6910 firmware_features_iomem_addr);
6911 if (rc) {
6912 dev_err(&ctrl_info->pci_dev->dev,
6913 "failed to enable firmware features in PQI configuration table\n");
6914 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6915 if (!pqi_firmware_features[i].supported)
6916 continue;
6917 pqi_firmware_feature_update(ctrl_info,
6918 &pqi_firmware_features[i]);
6919 }
6920 return;
6921 }
6922
6923 ctrl_info->soft_reset_handshake_supported = false;
6924 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6925 if (!pqi_firmware_features[i].supported)
6926 continue;
6927 if (pqi_is_firmware_feature_enabled(firmware_features,
6928 firmware_features_iomem_addr,
6929 pqi_firmware_features[i].feature_bit)) {
6930 pqi_firmware_features[i].enabled = true;
6931 if (pqi_firmware_features[i].feature_bit ==
6932 PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE)
6933 ctrl_info->soft_reset_handshake_supported =
6934 true;
6935 }
6936 pqi_firmware_feature_update(ctrl_info,
6937 &pqi_firmware_features[i]);
6938 }
6939}
6940
6941static void pqi_init_firmware_features(void)
6942{
6943 unsigned int i;
6944
6945 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
6946 pqi_firmware_features[i].supported = false;
6947 pqi_firmware_features[i].enabled = false;
6948 }
6949}
6950
6951static void pqi_process_firmware_features_section(
6952 struct pqi_config_table_section_info *section_info)
6953{
6954 mutex_lock(&pqi_firmware_features_mutex);
6955 pqi_init_firmware_features();
6956 pqi_process_firmware_features(section_info);
6957 mutex_unlock(&pqi_firmware_features_mutex);
6958}
6959
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006960static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info)
6961{
6962 u32 table_length;
6963 u32 section_offset;
6964 void __iomem *table_iomem_addr;
6965 struct pqi_config_table *config_table;
6966 struct pqi_config_table_section_header *section;
David Brazdil0f672f62019-12-10 10:32:29 +00006967 struct pqi_config_table_section_info section_info;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006968
6969 table_length = ctrl_info->config_table_length;
David Brazdil0f672f62019-12-10 10:32:29 +00006970 if (table_length == 0)
6971 return 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006972
6973 config_table = kmalloc(table_length, GFP_KERNEL);
6974 if (!config_table) {
6975 dev_err(&ctrl_info->pci_dev->dev,
6976 "failed to allocate memory for PQI configuration table\n");
6977 return -ENOMEM;
6978 }
6979
6980 /*
6981 * Copy the config table contents from I/O memory space into the
6982 * temporary buffer.
6983 */
6984 table_iomem_addr = ctrl_info->iomem_base +
6985 ctrl_info->config_table_offset;
6986 memcpy_fromio(config_table, table_iomem_addr, table_length);
6987
David Brazdil0f672f62019-12-10 10:32:29 +00006988 section_info.ctrl_info = ctrl_info;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006989 section_offset =
6990 get_unaligned_le32(&config_table->first_section_offset);
6991
6992 while (section_offset) {
6993 section = (void *)config_table + section_offset;
6994
David Brazdil0f672f62019-12-10 10:32:29 +00006995 section_info.section = section;
6996 section_info.section_offset = section_offset;
6997 section_info.section_iomem_addr =
6998 table_iomem_addr + section_offset;
6999
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007000 switch (get_unaligned_le16(&section->section_id)) {
David Brazdil0f672f62019-12-10 10:32:29 +00007001 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES:
7002 pqi_process_firmware_features_section(&section_info);
7003 break;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007004 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT:
7005 if (pqi_disable_heartbeat)
7006 dev_warn(&ctrl_info->pci_dev->dev,
7007 "heartbeat disabled by module parameter\n");
7008 else
7009 ctrl_info->heartbeat_counter =
7010 table_iomem_addr +
7011 section_offset +
7012 offsetof(
7013 struct pqi_config_table_heartbeat,
7014 heartbeat_counter);
7015 break;
David Brazdil0f672f62019-12-10 10:32:29 +00007016 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET:
7017 ctrl_info->soft_reset_status =
7018 table_iomem_addr +
7019 section_offset +
7020 offsetof(struct pqi_config_table_soft_reset,
7021 soft_reset_status);
7022 break;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007023 }
7024
7025 section_offset =
7026 get_unaligned_le16(&section->next_section_offset);
7027 }
7028
7029 kfree(config_table);
7030
7031 return 0;
7032}
7033
7034/* Switches the controller from PQI mode back into SIS mode. */
7035
7036static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info)
7037{
7038 int rc;
7039
7040 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE);
7041 rc = pqi_reset(ctrl_info);
7042 if (rc)
7043 return rc;
7044 rc = sis_reenable_sis_mode(ctrl_info);
7045 if (rc) {
7046 dev_err(&ctrl_info->pci_dev->dev,
7047 "re-enabling SIS mode failed with error %d\n", rc);
7048 return rc;
7049 }
7050 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7051
7052 return 0;
7053}
7054
7055/*
7056 * If the controller isn't already in SIS mode, this function forces it into
7057 * SIS mode.
7058 */
7059
7060static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info)
7061{
7062 if (!sis_is_firmware_running(ctrl_info))
7063 return -ENXIO;
7064
7065 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE)
7066 return 0;
7067
7068 if (sis_is_kernel_up(ctrl_info)) {
7069 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7070 return 0;
7071 }
7072
7073 return pqi_revert_to_sis_mode(ctrl_info);
7074}
7075
Olivier Deprez0e641232021-09-23 10:07:05 +02007076#define PQI_POST_RESET_DELAY_B4_MSGU_READY 5000
7077
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007078static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
7079{
7080 int rc;
7081
Olivier Deprez0e641232021-09-23 10:07:05 +02007082 if (reset_devices) {
7083 sis_soft_reset(ctrl_info);
7084 msleep(PQI_POST_RESET_DELAY_B4_MSGU_READY);
7085 } else {
7086 rc = pqi_force_sis_mode(ctrl_info);
7087 if (rc)
7088 return rc;
7089 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007090
7091 /*
7092 * Wait until the controller is ready to start accepting SIS
7093 * commands.
7094 */
7095 rc = sis_wait_for_ctrl_ready(ctrl_info);
7096 if (rc)
7097 return rc;
7098
7099 /*
7100 * Get the controller properties. This allows us to determine
7101 * whether or not it supports PQI mode.
7102 */
7103 rc = sis_get_ctrl_properties(ctrl_info);
7104 if (rc) {
7105 dev_err(&ctrl_info->pci_dev->dev,
7106 "error obtaining controller properties\n");
7107 return rc;
7108 }
7109
7110 rc = sis_get_pqi_capabilities(ctrl_info);
7111 if (rc) {
7112 dev_err(&ctrl_info->pci_dev->dev,
7113 "error obtaining controller capabilities\n");
7114 return rc;
7115 }
7116
7117 if (reset_devices) {
7118 if (ctrl_info->max_outstanding_requests >
7119 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP)
7120 ctrl_info->max_outstanding_requests =
7121 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP;
7122 } else {
7123 if (ctrl_info->max_outstanding_requests >
7124 PQI_MAX_OUTSTANDING_REQUESTS)
7125 ctrl_info->max_outstanding_requests =
7126 PQI_MAX_OUTSTANDING_REQUESTS;
7127 }
7128
7129 pqi_calculate_io_resources(ctrl_info);
7130
7131 rc = pqi_alloc_error_buffer(ctrl_info);
7132 if (rc) {
7133 dev_err(&ctrl_info->pci_dev->dev,
7134 "failed to allocate PQI error buffer\n");
7135 return rc;
7136 }
7137
7138 /*
7139 * If the function we are about to call succeeds, the
7140 * controller will transition from legacy SIS mode
7141 * into PQI mode.
7142 */
7143 rc = sis_init_base_struct_addr(ctrl_info);
7144 if (rc) {
7145 dev_err(&ctrl_info->pci_dev->dev,
7146 "error initializing PQI mode\n");
7147 return rc;
7148 }
7149
7150 /* Wait for the controller to complete the SIS -> PQI transition. */
7151 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7152 if (rc) {
7153 dev_err(&ctrl_info->pci_dev->dev,
7154 "transition to PQI mode failed\n");
7155 return rc;
7156 }
7157
7158 /* From here on, we are running in PQI mode. */
7159 ctrl_info->pqi_mode_enabled = true;
7160 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7161
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007162 rc = pqi_alloc_admin_queues(ctrl_info);
7163 if (rc) {
7164 dev_err(&ctrl_info->pci_dev->dev,
7165 "failed to allocate admin queues\n");
7166 return rc;
7167 }
7168
7169 rc = pqi_create_admin_queues(ctrl_info);
7170 if (rc) {
7171 dev_err(&ctrl_info->pci_dev->dev,
7172 "error creating admin queues\n");
7173 return rc;
7174 }
7175
7176 rc = pqi_report_device_capability(ctrl_info);
7177 if (rc) {
7178 dev_err(&ctrl_info->pci_dev->dev,
7179 "obtaining device capability failed\n");
7180 return rc;
7181 }
7182
7183 rc = pqi_validate_device_capability(ctrl_info);
7184 if (rc)
7185 return rc;
7186
7187 pqi_calculate_queue_resources(ctrl_info);
7188
7189 rc = pqi_enable_msix_interrupts(ctrl_info);
7190 if (rc)
7191 return rc;
7192
7193 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) {
7194 ctrl_info->max_msix_vectors =
7195 ctrl_info->num_msix_vectors_enabled;
7196 pqi_calculate_queue_resources(ctrl_info);
7197 }
7198
7199 rc = pqi_alloc_io_resources(ctrl_info);
7200 if (rc)
7201 return rc;
7202
7203 rc = pqi_alloc_operational_queues(ctrl_info);
7204 if (rc) {
7205 dev_err(&ctrl_info->pci_dev->dev,
7206 "failed to allocate operational queues\n");
7207 return rc;
7208 }
7209
7210 pqi_init_operational_queues(ctrl_info);
7211
7212 rc = pqi_request_irqs(ctrl_info);
7213 if (rc)
7214 return rc;
7215
7216 rc = pqi_create_queues(ctrl_info);
7217 if (rc)
7218 return rc;
7219
7220 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7221
7222 ctrl_info->controller_online = true;
David Brazdil0f672f62019-12-10 10:32:29 +00007223
7224 rc = pqi_process_config_table(ctrl_info);
7225 if (rc)
7226 return rc;
7227
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007228 pqi_start_heartbeat_timer(ctrl_info);
7229
7230 rc = pqi_enable_events(ctrl_info);
7231 if (rc) {
7232 dev_err(&ctrl_info->pci_dev->dev,
7233 "error enabling events\n");
7234 return rc;
7235 }
7236
7237 /* Register with the SCSI subsystem. */
7238 rc = pqi_register_scsi(ctrl_info);
7239 if (rc)
7240 return rc;
7241
David Brazdil0f672f62019-12-10 10:32:29 +00007242 rc = pqi_get_ctrl_product_details(ctrl_info);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007243 if (rc) {
7244 dev_err(&ctrl_info->pci_dev->dev,
David Brazdil0f672f62019-12-10 10:32:29 +00007245 "error obtaining product details\n");
7246 return rc;
7247 }
7248
7249 rc = pqi_get_ctrl_serial_number(ctrl_info);
7250 if (rc) {
7251 dev_err(&ctrl_info->pci_dev->dev,
7252 "error obtaining ctrl serial number\n");
7253 return rc;
7254 }
7255
7256 rc = pqi_set_diag_rescan(ctrl_info);
7257 if (rc) {
7258 dev_err(&ctrl_info->pci_dev->dev,
7259 "error enabling multi-lun rescan\n");
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007260 return rc;
7261 }
7262
7263 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7264 if (rc) {
7265 dev_err(&ctrl_info->pci_dev->dev,
7266 "error updating host wellness\n");
7267 return rc;
7268 }
7269
7270 pqi_schedule_update_time_worker(ctrl_info);
7271
7272 pqi_scan_scsi_devices(ctrl_info);
7273
7274 return 0;
7275}
7276
7277static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info)
7278{
7279 unsigned int i;
7280 struct pqi_admin_queues *admin_queues;
7281 struct pqi_event_queue *event_queue;
7282
7283 admin_queues = &ctrl_info->admin_queues;
7284 admin_queues->iq_pi_copy = 0;
7285 admin_queues->oq_ci_copy = 0;
7286 writel(0, admin_queues->oq_pi);
7287
7288 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
7289 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0;
7290 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0;
7291 ctrl_info->queue_groups[i].oq_ci_copy = 0;
7292
7293 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]);
7294 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]);
7295 writel(0, ctrl_info->queue_groups[i].oq_pi);
7296 }
7297
7298 event_queue = &ctrl_info->event_queue;
7299 writel(0, event_queue->oq_pi);
7300 event_queue->oq_ci_copy = 0;
7301}
7302
7303static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info)
7304{
7305 int rc;
7306
7307 rc = pqi_force_sis_mode(ctrl_info);
7308 if (rc)
7309 return rc;
7310
7311 /*
7312 * Wait until the controller is ready to start accepting SIS
7313 * commands.
7314 */
7315 rc = sis_wait_for_ctrl_ready_resume(ctrl_info);
7316 if (rc)
7317 return rc;
7318
7319 /*
David Brazdil0f672f62019-12-10 10:32:29 +00007320 * Get the controller properties. This allows us to determine
7321 * whether or not it supports PQI mode.
7322 */
7323 rc = sis_get_ctrl_properties(ctrl_info);
7324 if (rc) {
7325 dev_err(&ctrl_info->pci_dev->dev,
7326 "error obtaining controller properties\n");
7327 return rc;
7328 }
7329
7330 rc = sis_get_pqi_capabilities(ctrl_info);
7331 if (rc) {
7332 dev_err(&ctrl_info->pci_dev->dev,
7333 "error obtaining controller capabilities\n");
7334 return rc;
7335 }
7336
7337 /*
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007338 * If the function we are about to call succeeds, the
7339 * controller will transition from legacy SIS mode
7340 * into PQI mode.
7341 */
7342 rc = sis_init_base_struct_addr(ctrl_info);
7343 if (rc) {
7344 dev_err(&ctrl_info->pci_dev->dev,
7345 "error initializing PQI mode\n");
7346 return rc;
7347 }
7348
7349 /* Wait for the controller to complete the SIS -> PQI transition. */
7350 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7351 if (rc) {
7352 dev_err(&ctrl_info->pci_dev->dev,
7353 "transition to PQI mode failed\n");
7354 return rc;
7355 }
7356
7357 /* From here on, we are running in PQI mode. */
7358 ctrl_info->pqi_mode_enabled = true;
7359 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7360
7361 pqi_reinit_queues(ctrl_info);
7362
7363 rc = pqi_create_admin_queues(ctrl_info);
7364 if (rc) {
7365 dev_err(&ctrl_info->pci_dev->dev,
7366 "error creating admin queues\n");
7367 return rc;
7368 }
7369
7370 rc = pqi_create_queues(ctrl_info);
7371 if (rc)
7372 return rc;
7373
7374 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7375
7376 ctrl_info->controller_online = true;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007377 pqi_ctrl_unblock_requests(ctrl_info);
7378
David Brazdil0f672f62019-12-10 10:32:29 +00007379 rc = pqi_process_config_table(ctrl_info);
7380 if (rc)
7381 return rc;
7382
7383 pqi_start_heartbeat_timer(ctrl_info);
7384
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007385 rc = pqi_enable_events(ctrl_info);
7386 if (rc) {
7387 dev_err(&ctrl_info->pci_dev->dev,
7388 "error enabling events\n");
7389 return rc;
7390 }
7391
David Brazdil0f672f62019-12-10 10:32:29 +00007392 rc = pqi_get_ctrl_product_details(ctrl_info);
7393 if (rc) {
7394 dev_err(&ctrl_info->pci_dev->dev,
7395 "error obtaining product detail\n");
7396 return rc;
7397 }
7398
7399 rc = pqi_set_diag_rescan(ctrl_info);
7400 if (rc) {
7401 dev_err(&ctrl_info->pci_dev->dev,
7402 "error enabling multi-lun rescan\n");
7403 return rc;
7404 }
7405
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007406 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7407 if (rc) {
7408 dev_err(&ctrl_info->pci_dev->dev,
7409 "error updating host wellness\n");
7410 return rc;
7411 }
7412
7413 pqi_schedule_update_time_worker(ctrl_info);
7414
7415 pqi_scan_scsi_devices(ctrl_info);
7416
7417 return 0;
7418}
7419
7420static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev,
7421 u16 timeout)
7422{
7423 return pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2,
7424 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout);
7425}
7426
7427static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info)
7428{
7429 int rc;
7430 u64 mask;
7431
7432 rc = pci_enable_device(ctrl_info->pci_dev);
7433 if (rc) {
7434 dev_err(&ctrl_info->pci_dev->dev,
7435 "failed to enable PCI device\n");
7436 return rc;
7437 }
7438
7439 if (sizeof(dma_addr_t) > 4)
7440 mask = DMA_BIT_MASK(64);
7441 else
7442 mask = DMA_BIT_MASK(32);
7443
David Brazdil0f672f62019-12-10 10:32:29 +00007444 rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007445 if (rc) {
7446 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n");
7447 goto disable_device;
7448 }
7449
7450 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT);
7451 if (rc) {
7452 dev_err(&ctrl_info->pci_dev->dev,
7453 "failed to obtain PCI resources\n");
7454 goto disable_device;
7455 }
7456
7457 ctrl_info->iomem_base = ioremap_nocache(pci_resource_start(
7458 ctrl_info->pci_dev, 0),
7459 sizeof(struct pqi_ctrl_registers));
7460 if (!ctrl_info->iomem_base) {
7461 dev_err(&ctrl_info->pci_dev->dev,
7462 "failed to map memory for controller registers\n");
7463 rc = -ENOMEM;
7464 goto release_regions;
7465 }
7466
7467#define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6
7468
7469 /* Increase the PCIe completion timeout. */
7470 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev,
7471 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS);
7472 if (rc) {
7473 dev_err(&ctrl_info->pci_dev->dev,
7474 "failed to set PCIe completion timeout\n");
7475 goto release_regions;
7476 }
7477
7478 /* Enable bus mastering. */
7479 pci_set_master(ctrl_info->pci_dev);
7480
7481 ctrl_info->registers = ctrl_info->iomem_base;
7482 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers;
7483
7484 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info);
7485
7486 return 0;
7487
7488release_regions:
7489 pci_release_regions(ctrl_info->pci_dev);
7490disable_device:
7491 pci_disable_device(ctrl_info->pci_dev);
7492
7493 return rc;
7494}
7495
7496static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info)
7497{
7498 iounmap(ctrl_info->iomem_base);
7499 pci_release_regions(ctrl_info->pci_dev);
7500 if (pci_is_enabled(ctrl_info->pci_dev))
7501 pci_disable_device(ctrl_info->pci_dev);
7502 pci_set_drvdata(ctrl_info->pci_dev, NULL);
7503}
7504
7505static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node)
7506{
7507 struct pqi_ctrl_info *ctrl_info;
7508
7509 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info),
7510 GFP_KERNEL, numa_node);
7511 if (!ctrl_info)
7512 return NULL;
7513
7514 mutex_init(&ctrl_info->scan_mutex);
7515 mutex_init(&ctrl_info->lun_reset_mutex);
David Brazdil0f672f62019-12-10 10:32:29 +00007516 mutex_init(&ctrl_info->ofa_mutex);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007517
7518 INIT_LIST_HEAD(&ctrl_info->scsi_device_list);
7519 spin_lock_init(&ctrl_info->scsi_device_list_lock);
7520
7521 INIT_WORK(&ctrl_info->event_work, pqi_event_worker);
7522 atomic_set(&ctrl_info->num_interrupts, 0);
Olivier Deprez0e641232021-09-23 10:07:05 +02007523 atomic_set(&ctrl_info->sync_cmds_outstanding, 0);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007524
7525 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker);
7526 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker);
7527
7528 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0);
7529 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker);
7530
7531 sema_init(&ctrl_info->sync_request_sem,
7532 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS);
7533 init_waitqueue_head(&ctrl_info->block_requests_wait);
7534
7535 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list);
7536 spin_lock_init(&ctrl_info->raid_bypass_retry_list_lock);
7537 INIT_WORK(&ctrl_info->raid_bypass_retry_work,
7538 pqi_raid_bypass_retry_worker);
7539
7540 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1;
7541 ctrl_info->irq_mode = IRQ_MODE_NONE;
7542 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS;
7543
7544 return ctrl_info;
7545}
7546
7547static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info)
7548{
7549 kfree(ctrl_info);
7550}
7551
7552static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info)
7553{
7554 pqi_free_irqs(ctrl_info);
7555 pqi_disable_msix_interrupts(ctrl_info);
7556}
7557
7558static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info)
7559{
7560 pqi_stop_heartbeat_timer(ctrl_info);
7561 pqi_free_interrupts(ctrl_info);
7562 if (ctrl_info->queue_memory_base)
7563 dma_free_coherent(&ctrl_info->pci_dev->dev,
7564 ctrl_info->queue_memory_length,
7565 ctrl_info->queue_memory_base,
7566 ctrl_info->queue_memory_base_dma_handle);
7567 if (ctrl_info->admin_queue_memory_base)
7568 dma_free_coherent(&ctrl_info->pci_dev->dev,
7569 ctrl_info->admin_queue_memory_length,
7570 ctrl_info->admin_queue_memory_base,
7571 ctrl_info->admin_queue_memory_base_dma_handle);
7572 pqi_free_all_io_requests(ctrl_info);
7573 if (ctrl_info->error_buffer)
7574 dma_free_coherent(&ctrl_info->pci_dev->dev,
7575 ctrl_info->error_buffer_length,
7576 ctrl_info->error_buffer,
7577 ctrl_info->error_buffer_dma_handle);
7578 if (ctrl_info->iomem_base)
7579 pqi_cleanup_pci_init(ctrl_info);
7580 pqi_free_ctrl_info(ctrl_info);
7581}
7582
7583static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info)
7584{
7585 pqi_cancel_rescan_worker(ctrl_info);
7586 pqi_cancel_update_time_worker(ctrl_info);
7587 pqi_remove_all_scsi_devices(ctrl_info);
7588 pqi_unregister_scsi(ctrl_info);
7589 if (ctrl_info->pqi_mode_enabled)
7590 pqi_revert_to_sis_mode(ctrl_info);
7591 pqi_free_ctrl_resources(ctrl_info);
7592}
7593
David Brazdil0f672f62019-12-10 10:32:29 +00007594static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info)
7595{
7596 pqi_cancel_update_time_worker(ctrl_info);
7597 pqi_cancel_rescan_worker(ctrl_info);
7598 pqi_wait_until_lun_reset_finished(ctrl_info);
7599 pqi_wait_until_scan_finished(ctrl_info);
7600 pqi_ctrl_ofa_start(ctrl_info);
7601 pqi_ctrl_block_requests(ctrl_info);
7602 pqi_ctrl_wait_until_quiesced(ctrl_info);
7603 pqi_ctrl_wait_for_pending_io(ctrl_info, PQI_PENDING_IO_TIMEOUT_SECS);
7604 pqi_fail_io_queued_for_all_devices(ctrl_info);
7605 pqi_wait_until_inbound_queues_empty(ctrl_info);
7606 pqi_stop_heartbeat_timer(ctrl_info);
7607 ctrl_info->pqi_mode_enabled = false;
7608 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7609}
7610
7611static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info)
7612{
7613 pqi_ofa_free_host_buffer(ctrl_info);
7614 ctrl_info->pqi_mode_enabled = true;
7615 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7616 ctrl_info->controller_online = true;
7617 pqi_ctrl_unblock_requests(ctrl_info);
7618 pqi_start_heartbeat_timer(ctrl_info);
7619 pqi_schedule_update_time_worker(ctrl_info);
7620 pqi_clear_soft_reset_status(ctrl_info,
7621 PQI_SOFT_RESET_ABORT);
7622 pqi_scan_scsi_devices(ctrl_info);
7623}
7624
7625static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info,
7626 u32 total_size, u32 chunk_size)
7627{
7628 u32 sg_count;
7629 u32 size;
7630 int i;
7631 struct pqi_sg_descriptor *mem_descriptor = NULL;
7632 struct device *dev;
7633 struct pqi_ofa_memory *ofap;
7634
7635 dev = &ctrl_info->pci_dev->dev;
7636
7637 sg_count = (total_size + chunk_size - 1);
7638 sg_count /= chunk_size;
7639
7640 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7641
7642 if (sg_count*chunk_size < total_size)
7643 goto out;
7644
7645 ctrl_info->pqi_ofa_chunk_virt_addr =
7646 kcalloc(sg_count, sizeof(void *), GFP_KERNEL);
7647 if (!ctrl_info->pqi_ofa_chunk_virt_addr)
7648 goto out;
7649
7650 for (size = 0, i = 0; size < total_size; size += chunk_size, i++) {
7651 dma_addr_t dma_handle;
7652
7653 ctrl_info->pqi_ofa_chunk_virt_addr[i] =
7654 dma_alloc_coherent(dev, chunk_size, &dma_handle,
7655 GFP_KERNEL);
7656
7657 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i])
7658 break;
7659
7660 mem_descriptor = &ofap->sg_descriptor[i];
7661 put_unaligned_le64 ((u64) dma_handle, &mem_descriptor->address);
7662 put_unaligned_le32 (chunk_size, &mem_descriptor->length);
7663 }
7664
7665 if (!size || size < total_size)
7666 goto out_free_chunks;
7667
7668 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags);
7669 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors);
7670 put_unaligned_le32(size, &ofap->bytes_allocated);
7671
7672 return 0;
7673
7674out_free_chunks:
7675 while (--i >= 0) {
7676 mem_descriptor = &ofap->sg_descriptor[i];
7677 dma_free_coherent(dev, chunk_size,
7678 ctrl_info->pqi_ofa_chunk_virt_addr[i],
7679 get_unaligned_le64(&mem_descriptor->address));
7680 }
7681 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
7682
7683out:
7684 put_unaligned_le32 (0, &ofap->bytes_allocated);
7685 return -ENOMEM;
7686}
7687
7688static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info)
7689{
7690 u32 total_size;
7691 u32 min_chunk_size;
7692 u32 chunk_sz;
7693
7694 total_size = le32_to_cpu(
7695 ctrl_info->pqi_ofa_mem_virt_addr->bytes_allocated);
7696 min_chunk_size = total_size / PQI_OFA_MAX_SG_DESCRIPTORS;
7697
7698 for (chunk_sz = total_size; chunk_sz >= min_chunk_size; chunk_sz /= 2)
7699 if (!pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_sz))
7700 return 0;
7701
7702 return -ENOMEM;
7703}
7704
7705static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info,
7706 u32 bytes_requested)
7707{
7708 struct pqi_ofa_memory *pqi_ofa_memory;
7709 struct device *dev;
7710
7711 dev = &ctrl_info->pci_dev->dev;
7712 pqi_ofa_memory = dma_alloc_coherent(dev,
7713 PQI_OFA_MEMORY_DESCRIPTOR_LENGTH,
7714 &ctrl_info->pqi_ofa_mem_dma_handle,
7715 GFP_KERNEL);
7716
7717 if (!pqi_ofa_memory)
7718 return;
7719
7720 put_unaligned_le16(PQI_OFA_VERSION, &pqi_ofa_memory->version);
7721 memcpy(&pqi_ofa_memory->signature, PQI_OFA_SIGNATURE,
7722 sizeof(pqi_ofa_memory->signature));
7723 pqi_ofa_memory->bytes_allocated = cpu_to_le32(bytes_requested);
7724
7725 ctrl_info->pqi_ofa_mem_virt_addr = pqi_ofa_memory;
7726
7727 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) {
7728 dev_err(dev, "Failed to allocate host buffer of size = %u",
7729 bytes_requested);
7730 }
7731}
7732
7733static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info)
7734{
7735 int i;
7736 struct pqi_sg_descriptor *mem_descriptor;
7737 struct pqi_ofa_memory *ofap;
7738
7739 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7740
7741 if (!ofap)
7742 return;
7743
7744 if (!ofap->bytes_allocated)
7745 goto out;
7746
7747 mem_descriptor = ofap->sg_descriptor;
7748
7749 for (i = 0; i < get_unaligned_le16(&ofap->num_memory_descriptors);
7750 i++) {
7751 dma_free_coherent(&ctrl_info->pci_dev->dev,
7752 get_unaligned_le32(&mem_descriptor[i].length),
7753 ctrl_info->pqi_ofa_chunk_virt_addr[i],
7754 get_unaligned_le64(&mem_descriptor[i].address));
7755 }
7756 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
7757
7758out:
7759 dma_free_coherent(&ctrl_info->pci_dev->dev,
7760 PQI_OFA_MEMORY_DESCRIPTOR_LENGTH, ofap,
7761 ctrl_info->pqi_ofa_mem_dma_handle);
7762 ctrl_info->pqi_ofa_mem_virt_addr = NULL;
7763}
7764
7765static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info)
7766{
7767 struct pqi_vendor_general_request request;
7768 size_t size;
7769 struct pqi_ofa_memory *ofap;
7770
7771 memset(&request, 0, sizeof(request));
7772
7773 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
7774
7775 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
7776 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
7777 &request.header.iu_length);
7778 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE,
7779 &request.function_code);
7780
7781 if (ofap) {
7782 size = offsetof(struct pqi_ofa_memory, sg_descriptor) +
7783 get_unaligned_le16(&ofap->num_memory_descriptors) *
7784 sizeof(struct pqi_sg_descriptor);
7785
7786 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle,
7787 &request.data.ofa_memory_allocation.buffer_address);
7788 put_unaligned_le32(size,
7789 &request.data.ofa_memory_allocation.buffer_length);
7790
7791 }
7792
7793 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
7794 0, NULL, NO_TIMEOUT);
7795}
7796
David Brazdil0f672f62019-12-10 10:32:29 +00007797static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info)
7798{
7799 msleep(PQI_POST_RESET_DELAY_B4_MSGU_READY);
7800 return pqi_ctrl_init_resume(ctrl_info);
7801}
7802
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007803static void pqi_perform_lockup_action(void)
7804{
7805 switch (pqi_lockup_action) {
7806 case PANIC:
7807 panic("FATAL: Smart Family Controller lockup detected");
7808 break;
7809 case REBOOT:
7810 emergency_restart();
7811 break;
7812 case NONE:
7813 default:
7814 break;
7815 }
7816}
7817
7818static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = {
7819 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR,
7820 .status = SAM_STAT_CHECK_CONDITION,
7821};
7822
7823static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info)
7824{
7825 unsigned int i;
7826 struct pqi_io_request *io_request;
7827 struct scsi_cmnd *scmd;
7828
7829 for (i = 0; i < ctrl_info->max_io_slots; i++) {
7830 io_request = &ctrl_info->io_request_pool[i];
7831 if (atomic_read(&io_request->refcount) == 0)
7832 continue;
7833
7834 scmd = io_request->scmd;
7835 if (scmd) {
7836 set_host_byte(scmd, DID_NO_CONNECT);
7837 } else {
7838 io_request->status = -ENXIO;
7839 io_request->error_info =
7840 &pqi_ctrl_offline_raid_error_info;
7841 }
7842
7843 io_request->io_complete_callback(io_request,
7844 io_request->context);
7845 }
7846}
7847
7848static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info)
7849{
7850 pqi_perform_lockup_action();
7851 pqi_stop_heartbeat_timer(ctrl_info);
7852 pqi_free_interrupts(ctrl_info);
7853 pqi_cancel_rescan_worker(ctrl_info);
7854 pqi_cancel_update_time_worker(ctrl_info);
7855 pqi_ctrl_wait_until_quiesced(ctrl_info);
7856 pqi_fail_all_outstanding_requests(ctrl_info);
7857 pqi_clear_all_queued_raid_bypass_retries(ctrl_info);
7858 pqi_ctrl_unblock_requests(ctrl_info);
7859}
7860
7861static void pqi_ctrl_offline_worker(struct work_struct *work)
7862{
7863 struct pqi_ctrl_info *ctrl_info;
7864
7865 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work);
7866 pqi_take_ctrl_offline_deferred(ctrl_info);
7867}
7868
7869static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info)
7870{
7871 if (!ctrl_info->controller_online)
7872 return;
7873
7874 ctrl_info->controller_online = false;
7875 ctrl_info->pqi_mode_enabled = false;
7876 pqi_ctrl_block_requests(ctrl_info);
7877 if (!pqi_disable_ctrl_shutdown)
7878 sis_shutdown_ctrl(ctrl_info);
7879 pci_disable_device(ctrl_info->pci_dev);
7880 dev_err(&ctrl_info->pci_dev->dev, "controller offline\n");
7881 schedule_work(&ctrl_info->ctrl_offline_work);
7882}
7883
7884static void pqi_print_ctrl_info(struct pci_dev *pci_dev,
7885 const struct pci_device_id *id)
7886{
7887 char *ctrl_description;
7888
7889 if (id->driver_data)
7890 ctrl_description = (char *)id->driver_data;
7891 else
7892 ctrl_description = "Microsemi Smart Family Controller";
7893
7894 dev_info(&pci_dev->dev, "%s found\n", ctrl_description);
7895}
7896
7897static int pqi_pci_probe(struct pci_dev *pci_dev,
7898 const struct pci_device_id *id)
7899{
7900 int rc;
David Brazdil0f672f62019-12-10 10:32:29 +00007901 int node, cp_node;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007902 struct pqi_ctrl_info *ctrl_info;
7903
7904 pqi_print_ctrl_info(pci_dev, id);
7905
7906 if (pqi_disable_device_id_wildcards &&
7907 id->subvendor == PCI_ANY_ID &&
7908 id->subdevice == PCI_ANY_ID) {
7909 dev_warn(&pci_dev->dev,
7910 "controller not probed because device ID wildcards are disabled\n");
7911 return -ENODEV;
7912 }
7913
7914 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID)
7915 dev_warn(&pci_dev->dev,
7916 "controller device ID matched using wildcards\n");
7917
7918 node = dev_to_node(&pci_dev->dev);
David Brazdil0f672f62019-12-10 10:32:29 +00007919 if (node == NUMA_NO_NODE) {
7920 cp_node = cpu_to_node(0);
7921 if (cp_node == NUMA_NO_NODE)
7922 cp_node = 0;
7923 set_dev_node(&pci_dev->dev, cp_node);
7924 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007925
7926 ctrl_info = pqi_alloc_ctrl_info(node);
7927 if (!ctrl_info) {
7928 dev_err(&pci_dev->dev,
7929 "failed to allocate controller info block\n");
7930 return -ENOMEM;
7931 }
7932
7933 ctrl_info->pci_dev = pci_dev;
7934
7935 rc = pqi_pci_init(ctrl_info);
7936 if (rc)
7937 goto error;
7938
7939 rc = pqi_ctrl_init(ctrl_info);
7940 if (rc)
7941 goto error;
7942
7943 return 0;
7944
7945error:
7946 pqi_remove_ctrl(ctrl_info);
7947
7948 return rc;
7949}
7950
7951static void pqi_pci_remove(struct pci_dev *pci_dev)
7952{
7953 struct pqi_ctrl_info *ctrl_info;
7954
7955 ctrl_info = pci_get_drvdata(pci_dev);
7956 if (!ctrl_info)
7957 return;
7958
David Brazdil0f672f62019-12-10 10:32:29 +00007959 ctrl_info->in_shutdown = true;
7960
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007961 pqi_remove_ctrl(ctrl_info);
7962}
7963
Olivier Deprez0e641232021-09-23 10:07:05 +02007964static void pqi_crash_if_pending_command(struct pqi_ctrl_info *ctrl_info)
7965{
7966 unsigned int i;
7967 struct pqi_io_request *io_request;
7968 struct scsi_cmnd *scmd;
7969
7970 for (i = 0; i < ctrl_info->max_io_slots; i++) {
7971 io_request = &ctrl_info->io_request_pool[i];
7972 if (atomic_read(&io_request->refcount) == 0)
7973 continue;
7974 scmd = io_request->scmd;
7975 WARN_ON(scmd != NULL); /* IO command from SML */
7976 WARN_ON(scmd == NULL); /* Non-IO cmd or driver initiated*/
7977 }
7978}
7979
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007980static void pqi_shutdown(struct pci_dev *pci_dev)
7981{
7982 int rc;
7983 struct pqi_ctrl_info *ctrl_info;
7984
7985 ctrl_info = pci_get_drvdata(pci_dev);
Olivier Deprez0e641232021-09-23 10:07:05 +02007986 if (!ctrl_info) {
7987 dev_err(&pci_dev->dev,
7988 "cache could not be flushed\n");
7989 return;
7990 }
7991
7992 pqi_disable_events(ctrl_info);
7993 pqi_wait_until_ofa_finished(ctrl_info);
7994 pqi_cancel_update_time_worker(ctrl_info);
7995 pqi_cancel_rescan_worker(ctrl_info);
7996 pqi_cancel_event_worker(ctrl_info);
7997
7998 pqi_ctrl_shutdown_start(ctrl_info);
7999 pqi_ctrl_wait_until_quiesced(ctrl_info);
8000
8001 rc = pqi_ctrl_wait_for_pending_io(ctrl_info, NO_TIMEOUT);
8002 if (rc) {
8003 dev_err(&pci_dev->dev,
8004 "wait for pending I/O failed\n");
8005 return;
8006 }
8007
8008 pqi_ctrl_block_device_reset(ctrl_info);
8009 pqi_wait_until_lun_reset_finished(ctrl_info);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008010
8011 /*
8012 * Write all data in the controller's battery-backed cache to
8013 * storage.
8014 */
8015 rc = pqi_flush_cache(ctrl_info, SHUTDOWN);
Olivier Deprez0e641232021-09-23 10:07:05 +02008016 if (rc)
8017 dev_err(&pci_dev->dev,
8018 "unable to flush controller cache\n");
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008019
Olivier Deprez0e641232021-09-23 10:07:05 +02008020 pqi_ctrl_block_requests(ctrl_info);
8021
8022 rc = pqi_ctrl_wait_for_pending_sync_cmds(ctrl_info);
8023 if (rc) {
8024 dev_err(&pci_dev->dev,
8025 "wait for pending sync cmds failed\n");
8026 return;
8027 }
8028
8029 pqi_crash_if_pending_command(ctrl_info);
8030 pqi_reset(ctrl_info);
8031
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008032}
8033
8034static void pqi_process_lockup_action_param(void)
8035{
8036 unsigned int i;
8037
8038 if (!pqi_lockup_action_param)
8039 return;
8040
8041 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
8042 if (strcmp(pqi_lockup_action_param,
8043 pqi_lockup_actions[i].name) == 0) {
8044 pqi_lockup_action = pqi_lockup_actions[i].action;
8045 return;
8046 }
8047 }
8048
8049 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n",
8050 DRIVER_NAME_SHORT, pqi_lockup_action_param);
8051}
8052
8053static void pqi_process_module_params(void)
8054{
8055 pqi_process_lockup_action_param();
8056}
8057
8058static __maybe_unused int pqi_suspend(struct pci_dev *pci_dev, pm_message_t state)
8059{
8060 struct pqi_ctrl_info *ctrl_info;
8061
8062 ctrl_info = pci_get_drvdata(pci_dev);
8063
8064 pqi_disable_events(ctrl_info);
8065 pqi_cancel_update_time_worker(ctrl_info);
8066 pqi_cancel_rescan_worker(ctrl_info);
8067 pqi_wait_until_scan_finished(ctrl_info);
8068 pqi_wait_until_lun_reset_finished(ctrl_info);
David Brazdil0f672f62019-12-10 10:32:29 +00008069 pqi_wait_until_ofa_finished(ctrl_info);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008070 pqi_flush_cache(ctrl_info, SUSPEND);
8071 pqi_ctrl_block_requests(ctrl_info);
8072 pqi_ctrl_wait_until_quiesced(ctrl_info);
8073 pqi_wait_until_inbound_queues_empty(ctrl_info);
David Brazdil0f672f62019-12-10 10:32:29 +00008074 pqi_ctrl_wait_for_pending_io(ctrl_info, NO_TIMEOUT);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008075 pqi_stop_heartbeat_timer(ctrl_info);
8076
8077 if (state.event == PM_EVENT_FREEZE)
8078 return 0;
8079
8080 pci_save_state(pci_dev);
8081 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
8082
8083 ctrl_info->controller_online = false;
8084 ctrl_info->pqi_mode_enabled = false;
8085
8086 return 0;
8087}
8088
8089static __maybe_unused int pqi_resume(struct pci_dev *pci_dev)
8090{
8091 int rc;
8092 struct pqi_ctrl_info *ctrl_info;
8093
8094 ctrl_info = pci_get_drvdata(pci_dev);
8095
8096 if (pci_dev->current_state != PCI_D0) {
8097 ctrl_info->max_hw_queue_index = 0;
8098 pqi_free_interrupts(ctrl_info);
8099 pqi_change_irq_mode(ctrl_info, IRQ_MODE_INTX);
8100 rc = request_irq(pci_irq_vector(pci_dev, 0), pqi_irq_handler,
8101 IRQF_SHARED, DRIVER_NAME_SHORT,
8102 &ctrl_info->queue_groups[0]);
8103 if (rc) {
8104 dev_err(&ctrl_info->pci_dev->dev,
8105 "irq %u init failed with error %d\n",
8106 pci_dev->irq, rc);
8107 return rc;
8108 }
8109 pqi_start_heartbeat_timer(ctrl_info);
8110 pqi_ctrl_unblock_requests(ctrl_info);
8111 return 0;
8112 }
8113
8114 pci_set_power_state(pci_dev, PCI_D0);
8115 pci_restore_state(pci_dev);
8116
8117 return pqi_ctrl_init_resume(ctrl_info);
8118}
8119
8120/* Define the PCI IDs for the controllers that we support. */
8121static const struct pci_device_id pqi_pci_id_table[] = {
8122 {
8123 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8124 0x105b, 0x1211)
8125 },
8126 {
8127 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8128 0x105b, 0x1321)
8129 },
8130 {
8131 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8132 0x152d, 0x8a22)
8133 },
8134 {
8135 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8136 0x152d, 0x8a23)
8137 },
8138 {
8139 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8140 0x152d, 0x8a24)
8141 },
8142 {
8143 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8144 0x152d, 0x8a36)
8145 },
8146 {
8147 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8148 0x152d, 0x8a37)
8149 },
8150 {
8151 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Olivier Deprez0e641232021-09-23 10:07:05 +02008152 0x193d, 0x8460)
8153 },
8154 {
8155 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
David Brazdil0f672f62019-12-10 10:32:29 +00008156 0x193d, 0x1104)
8157 },
8158 {
8159 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8160 0x193d, 0x1105)
8161 },
8162 {
8163 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8164 0x193d, 0x1106)
8165 },
8166 {
8167 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8168 0x193d, 0x1107)
8169 },
8170 {
8171 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008172 0x193d, 0x8460)
8173 },
8174 {
8175 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8176 0x193d, 0x8461)
8177 },
8178 {
8179 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
David Brazdil0f672f62019-12-10 10:32:29 +00008180 0x193d, 0xc460)
8181 },
8182 {
8183 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8184 0x193d, 0xc461)
8185 },
8186 {
8187 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008188 0x193d, 0xf460)
8189 },
8190 {
8191 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8192 0x193d, 0xf461)
8193 },
8194 {
8195 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8196 0x1bd4, 0x0045)
8197 },
8198 {
8199 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8200 0x1bd4, 0x0046)
8201 },
8202 {
8203 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8204 0x1bd4, 0x0047)
8205 },
8206 {
8207 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8208 0x1bd4, 0x0048)
8209 },
8210 {
8211 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8212 0x1bd4, 0x004a)
8213 },
8214 {
8215 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8216 0x1bd4, 0x004b)
8217 },
8218 {
8219 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8220 0x1bd4, 0x004c)
8221 },
8222 {
8223 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
David Brazdil0f672f62019-12-10 10:32:29 +00008224 0x1bd4, 0x004f)
8225 },
8226 {
8227 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Olivier Deprez0e641232021-09-23 10:07:05 +02008228 0x1bd4, 0x0051)
8229 },
8230 {
8231 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8232 0x1bd4, 0x0052)
8233 },
8234 {
8235 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8236 0x1bd4, 0x0053)
8237 },
8238 {
8239 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8240 0x1bd4, 0x0054)
8241 },
8242 {
8243 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
David Brazdil0f672f62019-12-10 10:32:29 +00008244 0x19e5, 0xd227)
8245 },
8246 {
8247 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8248 0x19e5, 0xd228)
8249 },
8250 {
8251 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8252 0x19e5, 0xd229)
8253 },
8254 {
8255 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8256 0x19e5, 0xd22a)
8257 },
8258 {
8259 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8260 0x19e5, 0xd22b)
8261 },
8262 {
8263 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8264 0x19e5, 0xd22c)
8265 },
8266 {
8267 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008268 PCI_VENDOR_ID_ADAPTEC2, 0x0110)
8269 },
8270 {
8271 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8272 PCI_VENDOR_ID_ADAPTEC2, 0x0608)
8273 },
8274 {
8275 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8276 PCI_VENDOR_ID_ADAPTEC2, 0x0800)
8277 },
8278 {
8279 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8280 PCI_VENDOR_ID_ADAPTEC2, 0x0801)
8281 },
8282 {
8283 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8284 PCI_VENDOR_ID_ADAPTEC2, 0x0802)
8285 },
8286 {
8287 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8288 PCI_VENDOR_ID_ADAPTEC2, 0x0803)
8289 },
8290 {
8291 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8292 PCI_VENDOR_ID_ADAPTEC2, 0x0804)
8293 },
8294 {
8295 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8296 PCI_VENDOR_ID_ADAPTEC2, 0x0805)
8297 },
8298 {
8299 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8300 PCI_VENDOR_ID_ADAPTEC2, 0x0806)
8301 },
8302 {
8303 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8304 PCI_VENDOR_ID_ADAPTEC2, 0x0807)
8305 },
8306 {
8307 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
David Brazdil0f672f62019-12-10 10:32:29 +00008308 PCI_VENDOR_ID_ADAPTEC2, 0x0808)
8309 },
8310 {
8311 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8312 PCI_VENDOR_ID_ADAPTEC2, 0x0809)
8313 },
8314 {
8315 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008316 PCI_VENDOR_ID_ADAPTEC2, 0x0900)
8317 },
8318 {
8319 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8320 PCI_VENDOR_ID_ADAPTEC2, 0x0901)
8321 },
8322 {
8323 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8324 PCI_VENDOR_ID_ADAPTEC2, 0x0902)
8325 },
8326 {
8327 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8328 PCI_VENDOR_ID_ADAPTEC2, 0x0903)
8329 },
8330 {
8331 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8332 PCI_VENDOR_ID_ADAPTEC2, 0x0904)
8333 },
8334 {
8335 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8336 PCI_VENDOR_ID_ADAPTEC2, 0x0905)
8337 },
8338 {
8339 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8340 PCI_VENDOR_ID_ADAPTEC2, 0x0906)
8341 },
8342 {
8343 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8344 PCI_VENDOR_ID_ADAPTEC2, 0x0907)
8345 },
8346 {
8347 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8348 PCI_VENDOR_ID_ADAPTEC2, 0x0908)
8349 },
8350 {
8351 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8352 PCI_VENDOR_ID_ADAPTEC2, 0x090a)
8353 },
8354 {
8355 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8356 PCI_VENDOR_ID_ADAPTEC2, 0x1200)
8357 },
8358 {
8359 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8360 PCI_VENDOR_ID_ADAPTEC2, 0x1201)
8361 },
8362 {
8363 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8364 PCI_VENDOR_ID_ADAPTEC2, 0x1202)
8365 },
8366 {
8367 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8368 PCI_VENDOR_ID_ADAPTEC2, 0x1280)
8369 },
8370 {
8371 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8372 PCI_VENDOR_ID_ADAPTEC2, 0x1281)
8373 },
8374 {
8375 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8376 PCI_VENDOR_ID_ADAPTEC2, 0x1282)
8377 },
8378 {
8379 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8380 PCI_VENDOR_ID_ADAPTEC2, 0x1300)
8381 },
8382 {
8383 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8384 PCI_VENDOR_ID_ADAPTEC2, 0x1301)
8385 },
8386 {
8387 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8388 PCI_VENDOR_ID_ADAPTEC2, 0x1302)
8389 },
8390 {
8391 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8392 PCI_VENDOR_ID_ADAPTEC2, 0x1303)
8393 },
8394 {
8395 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8396 PCI_VENDOR_ID_ADAPTEC2, 0x1380)
8397 },
8398 {
8399 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Olivier Deprez0e641232021-09-23 10:07:05 +02008400 PCI_VENDOR_ID_ADAPTEC2, 0x1400)
8401 },
8402 {
8403 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8404 PCI_VENDOR_ID_ADAPTEC2, 0x1402)
8405 },
8406 {
8407 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8408 PCI_VENDOR_ID_ADAPTEC2, 0x1410)
8409 },
8410 {
8411 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8412 PCI_VENDOR_ID_ADAPTEC2, 0x1411)
8413 },
8414 {
8415 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8416 PCI_VENDOR_ID_ADAPTEC2, 0x1412)
8417 },
8418 {
8419 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8420 PCI_VENDOR_ID_ADAPTEC2, 0x1420)
8421 },
8422 {
8423 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8424 PCI_VENDOR_ID_ADAPTEC2, 0x1430)
8425 },
8426 {
8427 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8428 PCI_VENDOR_ID_ADAPTEC2, 0x1440)
8429 },
8430 {
8431 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8432 PCI_VENDOR_ID_ADAPTEC2, 0x1441)
8433 },
8434 {
8435 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8436 PCI_VENDOR_ID_ADAPTEC2, 0x1450)
8437 },
8438 {
8439 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8440 PCI_VENDOR_ID_ADAPTEC2, 0x1452)
8441 },
8442 {
8443 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8444 PCI_VENDOR_ID_ADAPTEC2, 0x1460)
8445 },
8446 {
8447 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8448 PCI_VENDOR_ID_ADAPTEC2, 0x1461)
8449 },
8450 {
8451 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8452 PCI_VENDOR_ID_ADAPTEC2, 0x1462)
8453 },
8454 {
8455 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8456 PCI_VENDOR_ID_ADAPTEC2, 0x1470)
8457 },
8458 {
8459 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8460 PCI_VENDOR_ID_ADAPTEC2, 0x1471)
8461 },
8462 {
8463 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8464 PCI_VENDOR_ID_ADAPTEC2, 0x1472)
8465 },
8466 {
8467 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8468 PCI_VENDOR_ID_ADAPTEC2, 0x1480)
8469 },
8470 {
8471 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8472 PCI_VENDOR_ID_ADAPTEC2, 0x1490)
8473 },
8474 {
8475 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8476 PCI_VENDOR_ID_ADAPTEC2, 0x1491)
8477 },
8478 {
8479 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8480 PCI_VENDOR_ID_ADAPTEC2, 0x14a0)
8481 },
8482 {
8483 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8484 PCI_VENDOR_ID_ADAPTEC2, 0x14a1)
8485 },
8486 {
8487 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8488 PCI_VENDOR_ID_ADAPTEC2, 0x14b0)
8489 },
8490 {
8491 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8492 PCI_VENDOR_ID_ADAPTEC2, 0x14b1)
8493 },
8494 {
8495 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8496 PCI_VENDOR_ID_ADAPTEC2, 0x14c0)
8497 },
8498 {
8499 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8500 PCI_VENDOR_ID_ADAPTEC2, 0x14c1)
8501 },
8502 {
8503 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8504 PCI_VENDOR_ID_ADAPTEC2, 0x14d0)
8505 },
8506 {
8507 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8508 PCI_VENDOR_ID_ADAPTEC2, 0x14e0)
8509 },
8510 {
8511 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8512 PCI_VENDOR_ID_ADAPTEC2, 0x14f0)
8513 },
8514 {
8515 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008516 PCI_VENDOR_ID_ADVANTECH, 0x8312)
8517 },
8518 {
8519 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8520 PCI_VENDOR_ID_DELL, 0x1fe0)
8521 },
8522 {
8523 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8524 PCI_VENDOR_ID_HP, 0x0600)
8525 },
8526 {
8527 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8528 PCI_VENDOR_ID_HP, 0x0601)
8529 },
8530 {
8531 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8532 PCI_VENDOR_ID_HP, 0x0602)
8533 },
8534 {
8535 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8536 PCI_VENDOR_ID_HP, 0x0603)
8537 },
8538 {
8539 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8540 PCI_VENDOR_ID_HP, 0x0609)
8541 },
8542 {
8543 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8544 PCI_VENDOR_ID_HP, 0x0650)
8545 },
8546 {
8547 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8548 PCI_VENDOR_ID_HP, 0x0651)
8549 },
8550 {
8551 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8552 PCI_VENDOR_ID_HP, 0x0652)
8553 },
8554 {
8555 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8556 PCI_VENDOR_ID_HP, 0x0653)
8557 },
8558 {
8559 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8560 PCI_VENDOR_ID_HP, 0x0654)
8561 },
8562 {
8563 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8564 PCI_VENDOR_ID_HP, 0x0655)
8565 },
8566 {
8567 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8568 PCI_VENDOR_ID_HP, 0x0700)
8569 },
8570 {
8571 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8572 PCI_VENDOR_ID_HP, 0x0701)
8573 },
8574 {
8575 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8576 PCI_VENDOR_ID_HP, 0x1001)
8577 },
8578 {
8579 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Olivier Deprez0e641232021-09-23 10:07:05 +02008580 PCI_VENDOR_ID_HP, 0x1002)
8581 },
8582 {
8583 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008584 PCI_VENDOR_ID_HP, 0x1100)
8585 },
8586 {
8587 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8588 PCI_VENDOR_ID_HP, 0x1101)
8589 },
8590 {
8591 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Olivier Deprez0e641232021-09-23 10:07:05 +02008592 0x1590, 0x0294)
8593 },
8594 {
8595 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8596 0x1590, 0x02db)
8597 },
8598 {
8599 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8600 0x1590, 0x02dc)
8601 },
8602 {
8603 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8604 0x1590, 0x032e)
8605 },
8606 {
8607 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
David Brazdil0f672f62019-12-10 10:32:29 +00008608 0x1d8d, 0x0800)
8609 },
8610 {
8611 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8612 0x1d8d, 0x0908)
8613 },
8614 {
8615 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8616 0x1d8d, 0x0806)
8617 },
8618 {
8619 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8620 0x1d8d, 0x0916)
8621 },
8622 {
8623 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8624 PCI_VENDOR_ID_GIGABYTE, 0x1000)
8625 },
8626 {
8627 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008628 PCI_ANY_ID, PCI_ANY_ID)
8629 },
8630 { 0 }
8631};
8632
8633MODULE_DEVICE_TABLE(pci, pqi_pci_id_table);
8634
8635static struct pci_driver pqi_pci_driver = {
8636 .name = DRIVER_NAME_SHORT,
8637 .id_table = pqi_pci_id_table,
8638 .probe = pqi_pci_probe,
8639 .remove = pqi_pci_remove,
8640 .shutdown = pqi_shutdown,
8641#if defined(CONFIG_PM)
8642 .suspend = pqi_suspend,
8643 .resume = pqi_resume,
8644#endif
8645};
8646
8647static int __init pqi_init(void)
8648{
8649 int rc;
8650
8651 pr_info(DRIVER_NAME "\n");
8652
8653 pqi_sas_transport_template =
8654 sas_attach_transport(&pqi_sas_transport_functions);
8655 if (!pqi_sas_transport_template)
8656 return -ENODEV;
8657
8658 pqi_process_module_params();
8659
8660 rc = pci_register_driver(&pqi_pci_driver);
8661 if (rc)
8662 sas_release_transport(pqi_sas_transport_template);
8663
8664 return rc;
8665}
8666
8667static void __exit pqi_cleanup(void)
8668{
8669 pci_unregister_driver(&pqi_pci_driver);
8670 sas_release_transport(pqi_sas_transport_template);
8671}
8672
8673module_init(pqi_init);
8674module_exit(pqi_cleanup);
8675
8676static void __attribute__((unused)) verify_structures(void)
8677{
8678 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8679 sis_host_to_ctrl_doorbell) != 0x20);
8680 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8681 sis_interrupt_mask) != 0x34);
8682 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8683 sis_ctrl_to_host_doorbell) != 0x9c);
8684 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8685 sis_ctrl_to_host_doorbell_clear) != 0xa0);
8686 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8687 sis_driver_scratch) != 0xb0);
8688 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8689 sis_firmware_status) != 0xbc);
8690 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8691 sis_mailbox) != 0x1000);
8692 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
8693 pqi_registers) != 0x4000);
8694
8695 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8696 iu_type) != 0x0);
8697 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8698 iu_length) != 0x2);
8699 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8700 response_queue_id) != 0x4);
8701 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
8702 work_area) != 0x6);
8703 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8);
8704
8705 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8706 status) != 0x0);
8707 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8708 service_response) != 0x1);
8709 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8710 data_present) != 0x2);
8711 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8712 reserved) != 0x3);
8713 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8714 residual_count) != 0x4);
8715 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8716 data_length) != 0x8);
8717 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8718 reserved1) != 0xa);
8719 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
8720 data) != 0xc);
8721 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c);
8722
8723 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8724 data_in_result) != 0x0);
8725 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8726 data_out_result) != 0x1);
8727 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8728 reserved) != 0x2);
8729 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8730 status) != 0x5);
8731 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8732 status_qualifier) != 0x6);
8733 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8734 sense_data_length) != 0x8);
8735 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8736 response_data_length) != 0xa);
8737 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8738 data_in_transferred) != 0xc);
8739 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8740 data_out_transferred) != 0x10);
8741 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
8742 data) != 0x14);
8743 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114);
8744
8745 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8746 signature) != 0x0);
8747 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8748 function_and_status_code) != 0x8);
8749 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8750 max_admin_iq_elements) != 0x10);
8751 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8752 max_admin_oq_elements) != 0x11);
8753 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8754 admin_iq_element_length) != 0x12);
8755 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8756 admin_oq_element_length) != 0x13);
8757 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8758 max_reset_timeout) != 0x14);
8759 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8760 legacy_intx_status) != 0x18);
8761 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8762 legacy_intx_mask_set) != 0x1c);
8763 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8764 legacy_intx_mask_clear) != 0x20);
8765 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8766 device_status) != 0x40);
8767 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8768 admin_iq_pi_offset) != 0x48);
8769 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8770 admin_oq_ci_offset) != 0x50);
8771 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8772 admin_iq_element_array_addr) != 0x58);
8773 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8774 admin_oq_element_array_addr) != 0x60);
8775 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8776 admin_iq_ci_addr) != 0x68);
8777 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8778 admin_oq_pi_addr) != 0x70);
8779 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8780 admin_iq_num_elements) != 0x78);
8781 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8782 admin_oq_num_elements) != 0x79);
8783 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8784 admin_queue_int_msg_num) != 0x7a);
8785 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8786 device_error) != 0x80);
8787 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8788 error_details) != 0x88);
8789 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8790 device_reset) != 0x90);
8791 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
8792 power_action) != 0x94);
8793 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100);
8794
8795 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8796 header.iu_type) != 0);
8797 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8798 header.iu_length) != 2);
8799 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8800 header.work_area) != 6);
8801 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8802 request_id) != 8);
8803 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8804 function_code) != 10);
8805 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8806 data.report_device_capability.buffer_length) != 44);
8807 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8808 data.report_device_capability.sg_descriptor) != 48);
8809 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8810 data.create_operational_iq.queue_id) != 12);
8811 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8812 data.create_operational_iq.element_array_addr) != 16);
8813 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8814 data.create_operational_iq.ci_addr) != 24);
8815 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8816 data.create_operational_iq.num_elements) != 32);
8817 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8818 data.create_operational_iq.element_length) != 34);
8819 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8820 data.create_operational_iq.queue_protocol) != 36);
8821 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8822 data.create_operational_oq.queue_id) != 12);
8823 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8824 data.create_operational_oq.element_array_addr) != 16);
8825 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8826 data.create_operational_oq.pi_addr) != 24);
8827 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8828 data.create_operational_oq.num_elements) != 32);
8829 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8830 data.create_operational_oq.element_length) != 34);
8831 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8832 data.create_operational_oq.queue_protocol) != 36);
8833 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8834 data.create_operational_oq.int_msg_num) != 40);
8835 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8836 data.create_operational_oq.coalescing_count) != 42);
8837 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8838 data.create_operational_oq.min_coalescing_time) != 44);
8839 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8840 data.create_operational_oq.max_coalescing_time) != 48);
8841 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
8842 data.delete_operational_queue.queue_id) != 12);
8843 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64);
8844 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8845 data.create_operational_iq) != 64 - 11);
8846 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8847 data.create_operational_oq) != 64 - 11);
8848 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request,
8849 data.delete_operational_queue) != 64 - 11);
8850
8851 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8852 header.iu_type) != 0);
8853 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8854 header.iu_length) != 2);
8855 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8856 header.work_area) != 6);
8857 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8858 request_id) != 8);
8859 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8860 function_code) != 10);
8861 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8862 status) != 11);
8863 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8864 data.create_operational_iq.status_descriptor) != 12);
8865 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8866 data.create_operational_iq.iq_pi_offset) != 16);
8867 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8868 data.create_operational_oq.status_descriptor) != 12);
8869 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
8870 data.create_operational_oq.oq_ci_offset) != 16);
8871 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64);
8872
8873 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8874 header.iu_type) != 0);
8875 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8876 header.iu_length) != 2);
8877 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8878 header.response_queue_id) != 4);
8879 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8880 header.work_area) != 6);
8881 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8882 request_id) != 8);
8883 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8884 nexus_id) != 10);
8885 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8886 buffer_length) != 12);
8887 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8888 lun_number) != 16);
8889 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8890 protocol_specific) != 24);
8891 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8892 error_index) != 27);
8893 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8894 cdb) != 32);
8895 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
8896 sg_descriptors) != 64);
8897 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) !=
8898 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
8899
8900 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8901 header.iu_type) != 0);
8902 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8903 header.iu_length) != 2);
8904 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8905 header.response_queue_id) != 4);
8906 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8907 header.work_area) != 6);
8908 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8909 request_id) != 8);
8910 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8911 nexus_id) != 12);
8912 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8913 buffer_length) != 16);
8914 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8915 data_encryption_key_index) != 22);
8916 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8917 encrypt_tweak_lower) != 24);
8918 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8919 encrypt_tweak_upper) != 28);
8920 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8921 cdb) != 32);
8922 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8923 error_index) != 48);
8924 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8925 num_sg_descriptors) != 50);
8926 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8927 cdb_length) != 51);
8928 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8929 lun_number) != 52);
8930 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
8931 sg_descriptors) != 64);
8932 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) !=
8933 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
8934
8935 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8936 header.iu_type) != 0);
8937 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8938 header.iu_length) != 2);
8939 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8940 request_id) != 8);
8941 BUILD_BUG_ON(offsetof(struct pqi_io_response,
8942 error_index) != 10);
8943
8944 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8945 header.iu_type) != 0);
8946 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8947 header.iu_length) != 2);
8948 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8949 header.response_queue_id) != 4);
8950 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8951 request_id) != 8);
8952 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8953 data.report_event_configuration.buffer_length) != 12);
8954 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8955 data.report_event_configuration.sg_descriptors) != 16);
8956 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8957 data.set_event_configuration.global_event_oq_id) != 10);
8958 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8959 data.set_event_configuration.buffer_length) != 12);
8960 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
8961 data.set_event_configuration.sg_descriptors) != 16);
8962
8963 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
8964 max_inbound_iu_length) != 6);
8965 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
8966 max_outbound_iu_length) != 14);
8967 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16);
8968
8969 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8970 data_length) != 0);
8971 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8972 iq_arbitration_priority_support_bitmask) != 8);
8973 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8974 maximum_aw_a) != 9);
8975 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8976 maximum_aw_b) != 10);
8977 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8978 maximum_aw_c) != 11);
8979 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8980 max_inbound_queues) != 16);
8981 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8982 max_elements_per_iq) != 18);
8983 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8984 max_iq_element_length) != 24);
8985 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8986 min_iq_element_length) != 26);
8987 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8988 max_outbound_queues) != 30);
8989 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8990 max_elements_per_oq) != 32);
8991 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8992 intr_coalescing_time_granularity) != 34);
8993 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8994 max_oq_element_length) != 36);
8995 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8996 min_oq_element_length) != 38);
8997 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
8998 iu_layer_descriptors) != 64);
8999 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576);
9000
9001 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
9002 event_type) != 0);
9003 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
9004 oq_id) != 2);
9005 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4);
9006
9007 BUILD_BUG_ON(offsetof(struct pqi_event_config,
9008 num_event_descriptors) != 2);
9009 BUILD_BUG_ON(offsetof(struct pqi_event_config,
9010 descriptors) != 4);
9011
9012 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS !=
9013 ARRAY_SIZE(pqi_supported_event_types));
9014
9015 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9016 header.iu_type) != 0);
9017 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9018 header.iu_length) != 2);
9019 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9020 event_type) != 8);
9021 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9022 event_id) != 10);
9023 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9024 additional_event_id) != 12);
9025 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9026 data) != 16);
9027 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32);
9028
9029 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9030 header.iu_type) != 0);
9031 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9032 header.iu_length) != 2);
9033 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9034 event_type) != 8);
9035 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9036 event_id) != 10);
9037 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9038 additional_event_id) != 12);
9039 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16);
9040
9041 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9042 header.iu_type) != 0);
9043 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9044 header.iu_length) != 2);
9045 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9046 request_id) != 8);
9047 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9048 nexus_id) != 10);
9049 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9050 lun_number) != 16);
9051 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9052 protocol_specific) != 24);
9053 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9054 outbound_queue_id_to_manage) != 26);
9055 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9056 request_id_to_manage) != 28);
9057 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9058 task_management_function) != 30);
9059 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32);
9060
9061 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9062 header.iu_type) != 0);
9063 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9064 header.iu_length) != 2);
9065 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9066 request_id) != 8);
9067 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9068 nexus_id) != 10);
9069 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9070 additional_response_info) != 12);
9071 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9072 response_code) != 15);
9073 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16);
9074
9075 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9076 configured_logical_drive_count) != 0);
9077 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9078 configuration_signature) != 1);
9079 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9080 firmware_version) != 5);
9081 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9082 extended_logical_unit_count) != 154);
9083 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9084 firmware_build_number) != 190);
9085 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9086 controller_mode) != 292);
9087
9088 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9089 phys_bay_in_box) != 115);
9090 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9091 device_type) != 120);
9092 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9093 redundant_path_present_map) != 1736);
9094 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9095 active_path_number) != 1738);
9096 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9097 alternate_paths_phys_connector) != 1739);
9098 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9099 alternate_paths_phys_box_on_port) != 1755);
9100 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9101 current_queue_depth_limit) != 1796);
9102 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560);
9103
9104 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255);
9105 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255);
9106 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH %
9107 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9108 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH %
9109 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9110 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560);
9111 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH %
9112 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9113 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560);
9114 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH %
9115 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9116
9117 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS);
9118 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >=
9119 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP);
9120}