blob: b5cee2a2ac66c705654a4e11c9b892641ac2da9e [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
David Brazdil0f672f62019-12-10 10:32:29 +00004 * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24#include <linux/blkdev.h>
25#include <linux/delay.h>
26#include <linux/dma-mapping.h>
27#include <linux/idr.h>
28#include <linux/interrupt.h>
29#include <linux/module.h>
30#include <linux/kthread.h>
31#include <linux/pci.h>
32#include <linux/spinlock.h>
33#include <linux/ctype.h>
34#include <linux/aer.h>
35#include <linux/slab.h>
36#include <linux/firmware.h>
37#include <linux/miscdevice.h>
38#include <linux/percpu.h>
39#include <linux/msi.h>
David Brazdil0f672f62019-12-10 10:32:29 +000040#include <linux/irq.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000041#include <linux/bitops.h>
David Brazdil0f672f62019-12-10 10:32:29 +000042#include <linux/crash_dump.h>
Olivier Deprez0e641232021-09-23 10:07:05 +020043#include <linux/cpuhotplug.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000044
45#include <scsi/scsi.h>
46#include <scsi/scsi_device.h>
47#include <scsi/scsi_host.h>
48#include <scsi/scsi_transport_fc.h>
49#include <scsi/scsi_tcq.h>
50#include <scsi/fc/fc_fs.h>
51
52#include <linux/nvme-fc-driver.h>
53
54#include "lpfc_hw4.h"
55#include "lpfc_hw.h"
56#include "lpfc_sli.h"
57#include "lpfc_sli4.h"
58#include "lpfc_nl.h"
59#include "lpfc_disc.h"
60#include "lpfc.h"
61#include "lpfc_scsi.h"
62#include "lpfc_nvme.h"
63#include "lpfc_nvmet.h"
64#include "lpfc_logmsg.h"
65#include "lpfc_crtn.h"
66#include "lpfc_vport.h"
67#include "lpfc_version.h"
68#include "lpfc_ids.h"
69
Olivier Deprez0e641232021-09-23 10:07:05 +020070static enum cpuhp_state lpfc_cpuhp_state;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000071/* Used when mapping IRQ vectors in a driver centric manner */
David Brazdil0f672f62019-12-10 10:32:29 +000072static uint32_t lpfc_present_cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000073
Olivier Deprez0e641232021-09-23 10:07:05 +020074static void __lpfc_cpuhp_remove(struct lpfc_hba *phba);
75static void lpfc_cpuhp_remove(struct lpfc_hba *phba);
76static void lpfc_cpuhp_add(struct lpfc_hba *phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000077static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
78static int lpfc_post_rcv_buf(struct lpfc_hba *);
79static int lpfc_sli4_queue_verify(struct lpfc_hba *);
80static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
81static int lpfc_setup_endian_order(struct lpfc_hba *);
82static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
83static void lpfc_free_els_sgl_list(struct lpfc_hba *);
84static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
85static void lpfc_init_sgl_list(struct lpfc_hba *);
86static int lpfc_init_active_sgl_array(struct lpfc_hba *);
87static void lpfc_free_active_sgl(struct lpfc_hba *);
88static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
89static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
90static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
91static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
92static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
93static void lpfc_sli4_disable_intr(struct lpfc_hba *);
94static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
95static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
David Brazdil0f672f62019-12-10 10:32:29 +000096static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
97static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000098
99static struct scsi_transport_template *lpfc_transport_template = NULL;
100static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
101static DEFINE_IDR(lpfc_hba_index);
102#define LPFC_NVMET_BUF_POST 254
103
104/**
105 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
106 * @phba: pointer to lpfc hba data structure.
107 *
108 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
109 * mailbox command. It retrieves the revision information from the HBA and
110 * collects the Vital Product Data (VPD) about the HBA for preparing the
111 * configuration of the HBA.
112 *
113 * Return codes:
114 * 0 - success.
115 * -ERESTART - requests the SLI layer to reset the HBA and try again.
116 * Any other value - indicates an error.
117 **/
118int
119lpfc_config_port_prep(struct lpfc_hba *phba)
120{
121 lpfc_vpd_t *vp = &phba->vpd;
122 int i = 0, rc;
123 LPFC_MBOXQ_t *pmb;
124 MAILBOX_t *mb;
125 char *lpfc_vpd_data = NULL;
126 uint16_t offset = 0;
127 static char licensed[56] =
128 "key unlock for use with gnu public licensed code only\0";
129 static int init_key = 1;
130
131 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
132 if (!pmb) {
133 phba->link_state = LPFC_HBA_ERROR;
134 return -ENOMEM;
135 }
136
137 mb = &pmb->u.mb;
138 phba->link_state = LPFC_INIT_MBX_CMDS;
139
140 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
141 if (init_key) {
142 uint32_t *ptext = (uint32_t *) licensed;
143
144 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
145 *ptext = cpu_to_be32(*ptext);
146 init_key = 0;
147 }
148
149 lpfc_read_nv(phba, pmb);
150 memset((char*)mb->un.varRDnvp.rsvd3, 0,
151 sizeof (mb->un.varRDnvp.rsvd3));
152 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
153 sizeof (licensed));
154
155 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
156
157 if (rc != MBX_SUCCESS) {
158 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
159 "0324 Config Port initialization "
160 "error, mbxCmd x%x READ_NVPARM, "
161 "mbxStatus x%x\n",
162 mb->mbxCommand, mb->mbxStatus);
163 mempool_free(pmb, phba->mbox_mem_pool);
164 return -ERESTART;
165 }
166 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
167 sizeof(phba->wwnn));
168 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
169 sizeof(phba->wwpn));
170 }
171
172 /*
173 * Clear all option bits except LPFC_SLI3_BG_ENABLED,
174 * which was already set in lpfc_get_cfgparam()
175 */
176 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
177
178 /* Setup and issue mailbox READ REV command */
179 lpfc_read_rev(phba, pmb);
180 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
181 if (rc != MBX_SUCCESS) {
182 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
183 "0439 Adapter failed to init, mbxCmd x%x "
184 "READ_REV, mbxStatus x%x\n",
185 mb->mbxCommand, mb->mbxStatus);
186 mempool_free( pmb, phba->mbox_mem_pool);
187 return -ERESTART;
188 }
189
190
191 /*
192 * The value of rr must be 1 since the driver set the cv field to 1.
193 * This setting requires the FW to set all revision fields.
194 */
195 if (mb->un.varRdRev.rr == 0) {
196 vp->rev.rBit = 0;
197 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
198 "0440 Adapter failed to init, READ_REV has "
199 "missing revision information.\n");
200 mempool_free(pmb, phba->mbox_mem_pool);
201 return -ERESTART;
202 }
203
204 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
205 mempool_free(pmb, phba->mbox_mem_pool);
206 return -EINVAL;
207 }
208
209 /* Save information as VPD data */
210 vp->rev.rBit = 1;
211 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
212 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
213 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
214 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
215 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
216 vp->rev.biuRev = mb->un.varRdRev.biuRev;
217 vp->rev.smRev = mb->un.varRdRev.smRev;
218 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
219 vp->rev.endecRev = mb->un.varRdRev.endecRev;
220 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
221 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
222 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
223 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
224 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
225 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
226
227 /* If the sli feature level is less then 9, we must
228 * tear down all RPIs and VPIs on link down if NPIV
229 * is enabled.
230 */
231 if (vp->rev.feaLevelHigh < 9)
232 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
233
234 if (lpfc_is_LC_HBA(phba->pcidev->device))
235 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
236 sizeof (phba->RandomData));
237
238 /* Get adapter VPD information */
239 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
240 if (!lpfc_vpd_data)
241 goto out_free_mbox;
242 do {
243 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
244 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
245
246 if (rc != MBX_SUCCESS) {
247 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
248 "0441 VPD not present on adapter, "
249 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
250 mb->mbxCommand, mb->mbxStatus);
251 mb->un.varDmp.word_cnt = 0;
252 }
253 /* dump mem may return a zero when finished or we got a
254 * mailbox error, either way we are done.
255 */
256 if (mb->un.varDmp.word_cnt == 0)
257 break;
258 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
259 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
260 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
261 lpfc_vpd_data + offset,
262 mb->un.varDmp.word_cnt);
263 offset += mb->un.varDmp.word_cnt;
264 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
265 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
266
267 kfree(lpfc_vpd_data);
268out_free_mbox:
269 mempool_free(pmb, phba->mbox_mem_pool);
270 return 0;
271}
272
273/**
274 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
275 * @phba: pointer to lpfc hba data structure.
276 * @pmboxq: pointer to the driver internal queue element for mailbox command.
277 *
278 * This is the completion handler for driver's configuring asynchronous event
279 * mailbox command to the device. If the mailbox command returns successfully,
280 * it will set internal async event support flag to 1; otherwise, it will
281 * set internal async event support flag to 0.
282 **/
283static void
284lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
285{
286 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
287 phba->temp_sensor_support = 1;
288 else
289 phba->temp_sensor_support = 0;
290 mempool_free(pmboxq, phba->mbox_mem_pool);
291 return;
292}
293
294/**
295 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
296 * @phba: pointer to lpfc hba data structure.
297 * @pmboxq: pointer to the driver internal queue element for mailbox command.
298 *
299 * This is the completion handler for dump mailbox command for getting
300 * wake up parameters. When this command complete, the response contain
301 * Option rom version of the HBA. This function translate the version number
302 * into a human readable string and store it in OptionROMVersion.
303 **/
304static void
305lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
306{
307 struct prog_id *prg;
308 uint32_t prog_id_word;
309 char dist = ' ';
310 /* character array used for decoding dist type. */
311 char dist_char[] = "nabx";
312
313 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
314 mempool_free(pmboxq, phba->mbox_mem_pool);
315 return;
316 }
317
318 prg = (struct prog_id *) &prog_id_word;
319
320 /* word 7 contain option rom version */
321 prog_id_word = pmboxq->u.mb.un.varWords[7];
322
323 /* Decode the Option rom version word to a readable string */
324 if (prg->dist < 4)
325 dist = dist_char[prg->dist];
326
327 if ((prg->dist == 3) && (prg->num == 0))
328 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
329 prg->ver, prg->rev, prg->lev);
330 else
331 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
332 prg->ver, prg->rev, prg->lev,
333 dist, prg->num);
334 mempool_free(pmboxq, phba->mbox_mem_pool);
335 return;
336}
337
338/**
339 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
340 * cfg_soft_wwnn, cfg_soft_wwpn
341 * @vport: pointer to lpfc vport data structure.
342 *
343 *
344 * Return codes
345 * None.
346 **/
347void
348lpfc_update_vport_wwn(struct lpfc_vport *vport)
349{
350 uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
351 u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
352
353 /* If the soft name exists then update it using the service params */
354 if (vport->phba->cfg_soft_wwnn)
355 u64_to_wwn(vport->phba->cfg_soft_wwnn,
356 vport->fc_sparam.nodeName.u.wwn);
357 if (vport->phba->cfg_soft_wwpn)
358 u64_to_wwn(vport->phba->cfg_soft_wwpn,
359 vport->fc_sparam.portName.u.wwn);
360
361 /*
362 * If the name is empty or there exists a soft name
363 * then copy the service params name, otherwise use the fc name
364 */
365 if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
366 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
367 sizeof(struct lpfc_name));
368 else
369 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
370 sizeof(struct lpfc_name));
371
372 /*
373 * If the port name has changed, then set the Param changes flag
374 * to unreg the login
375 */
376 if (vport->fc_portname.u.wwn[0] != 0 &&
377 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
378 sizeof(struct lpfc_name)))
379 vport->vport_flag |= FAWWPN_PARAM_CHG;
380
381 if (vport->fc_portname.u.wwn[0] == 0 ||
382 vport->phba->cfg_soft_wwpn ||
383 (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
384 vport->vport_flag & FAWWPN_SET) {
385 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
386 sizeof(struct lpfc_name));
387 vport->vport_flag &= ~FAWWPN_SET;
388 if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
389 vport->vport_flag |= FAWWPN_SET;
390 }
391 else
392 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
393 sizeof(struct lpfc_name));
394}
395
396/**
397 * lpfc_config_port_post - Perform lpfc initialization after config port
398 * @phba: pointer to lpfc hba data structure.
399 *
400 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
401 * command call. It performs all internal resource and state setups on the
402 * port: post IOCB buffers, enable appropriate host interrupt attentions,
403 * ELS ring timers, etc.
404 *
405 * Return codes
406 * 0 - success.
407 * Any other value - error.
408 **/
409int
410lpfc_config_port_post(struct lpfc_hba *phba)
411{
412 struct lpfc_vport *vport = phba->pport;
413 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
414 LPFC_MBOXQ_t *pmb;
415 MAILBOX_t *mb;
416 struct lpfc_dmabuf *mp;
417 struct lpfc_sli *psli = &phba->sli;
418 uint32_t status, timeout;
419 int i, j;
420 int rc;
421
422 spin_lock_irq(&phba->hbalock);
423 /*
424 * If the Config port completed correctly the HBA is not
425 * over heated any more.
426 */
427 if (phba->over_temp_state == HBA_OVER_TEMP)
428 phba->over_temp_state = HBA_NORMAL_TEMP;
429 spin_unlock_irq(&phba->hbalock);
430
431 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
432 if (!pmb) {
433 phba->link_state = LPFC_HBA_ERROR;
434 return -ENOMEM;
435 }
436 mb = &pmb->u.mb;
437
438 /* Get login parameters for NID. */
439 rc = lpfc_read_sparam(phba, pmb, 0);
440 if (rc) {
441 mempool_free(pmb, phba->mbox_mem_pool);
442 return -ENOMEM;
443 }
444
445 pmb->vport = vport;
446 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
447 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
448 "0448 Adapter failed init, mbxCmd x%x "
449 "READ_SPARM mbxStatus x%x\n",
450 mb->mbxCommand, mb->mbxStatus);
451 phba->link_state = LPFC_HBA_ERROR;
David Brazdil0f672f62019-12-10 10:32:29 +0000452 mp = (struct lpfc_dmabuf *)pmb->ctx_buf;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000453 mempool_free(pmb, phba->mbox_mem_pool);
454 lpfc_mbuf_free(phba, mp->virt, mp->phys);
455 kfree(mp);
456 return -EIO;
457 }
458
David Brazdil0f672f62019-12-10 10:32:29 +0000459 mp = (struct lpfc_dmabuf *)pmb->ctx_buf;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000460
461 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
462 lpfc_mbuf_free(phba, mp->virt, mp->phys);
463 kfree(mp);
David Brazdil0f672f62019-12-10 10:32:29 +0000464 pmb->ctx_buf = NULL;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000465 lpfc_update_vport_wwn(vport);
466
467 /* Update the fc_host data structures with new wwn. */
468 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
469 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
470 fc_host_max_npiv_vports(shost) = phba->max_vpi;
471
472 /* If no serial number in VPD data, use low 6 bytes of WWNN */
473 /* This should be consolidated into parse_vpd ? - mr */
474 if (phba->SerialNumber[0] == 0) {
475 uint8_t *outptr;
476
477 outptr = &vport->fc_nodename.u.s.IEEE[0];
478 for (i = 0; i < 12; i++) {
479 status = *outptr++;
480 j = ((status & 0xf0) >> 4);
481 if (j <= 9)
482 phba->SerialNumber[i] =
483 (char)((uint8_t) 0x30 + (uint8_t) j);
484 else
485 phba->SerialNumber[i] =
486 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
487 i++;
488 j = (status & 0xf);
489 if (j <= 9)
490 phba->SerialNumber[i] =
491 (char)((uint8_t) 0x30 + (uint8_t) j);
492 else
493 phba->SerialNumber[i] =
494 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
495 }
496 }
497
498 lpfc_read_config(phba, pmb);
499 pmb->vport = vport;
500 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
501 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
502 "0453 Adapter failed to init, mbxCmd x%x "
503 "READ_CONFIG, mbxStatus x%x\n",
504 mb->mbxCommand, mb->mbxStatus);
505 phba->link_state = LPFC_HBA_ERROR;
506 mempool_free( pmb, phba->mbox_mem_pool);
507 return -EIO;
508 }
509
510 /* Check if the port is disabled */
511 lpfc_sli_read_link_ste(phba);
512
513 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
514 i = (mb->un.varRdConfig.max_xri + 1);
515 if (phba->cfg_hba_queue_depth > i) {
516 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
517 "3359 HBA queue depth changed from %d to %d\n",
518 phba->cfg_hba_queue_depth, i);
519 phba->cfg_hba_queue_depth = i;
520 }
521
522 /* Reset the DFT_LUN_Q_DEPTH to (max xri >> 3) */
523 i = (mb->un.varRdConfig.max_xri >> 3);
524 if (phba->pport->cfg_lun_queue_depth > i) {
525 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
526 "3360 LUN queue depth changed from %d to %d\n",
527 phba->pport->cfg_lun_queue_depth, i);
528 phba->pport->cfg_lun_queue_depth = i;
529 }
530
531 phba->lmt = mb->un.varRdConfig.lmt;
532
533 /* Get the default values for Model Name and Description */
534 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
535
536 phba->link_state = LPFC_LINK_DOWN;
537
538 /* Only process IOCBs on ELS ring till hba_state is READY */
539 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
540 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
541 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
542 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
543
544 /* Post receive buffers for desired rings */
545 if (phba->sli_rev != 3)
546 lpfc_post_rcv_buf(phba);
547
548 /*
549 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
550 */
551 if (phba->intr_type == MSIX) {
552 rc = lpfc_config_msi(phba, pmb);
553 if (rc) {
554 mempool_free(pmb, phba->mbox_mem_pool);
555 return -EIO;
556 }
557 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
558 if (rc != MBX_SUCCESS) {
559 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
560 "0352 Config MSI mailbox command "
561 "failed, mbxCmd x%x, mbxStatus x%x\n",
562 pmb->u.mb.mbxCommand,
563 pmb->u.mb.mbxStatus);
564 mempool_free(pmb, phba->mbox_mem_pool);
565 return -EIO;
566 }
567 }
568
569 spin_lock_irq(&phba->hbalock);
570 /* Initialize ERATT handling flag */
571 phba->hba_flag &= ~HBA_ERATT_HANDLED;
572
573 /* Enable appropriate host interrupts */
574 if (lpfc_readl(phba->HCregaddr, &status)) {
575 spin_unlock_irq(&phba->hbalock);
576 return -EIO;
577 }
578 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
579 if (psli->num_rings > 0)
580 status |= HC_R0INT_ENA;
581 if (psli->num_rings > 1)
582 status |= HC_R1INT_ENA;
583 if (psli->num_rings > 2)
584 status |= HC_R2INT_ENA;
585 if (psli->num_rings > 3)
586 status |= HC_R3INT_ENA;
587
588 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
589 (phba->cfg_poll & DISABLE_FCP_RING_INT))
590 status &= ~(HC_R0INT_ENA);
591
592 writel(status, phba->HCregaddr);
593 readl(phba->HCregaddr); /* flush */
594 spin_unlock_irq(&phba->hbalock);
595
596 /* Set up ring-0 (ELS) timer */
597 timeout = phba->fc_ratov * 2;
598 mod_timer(&vport->els_tmofunc,
599 jiffies + msecs_to_jiffies(1000 * timeout));
600 /* Set up heart beat (HB) timer */
601 mod_timer(&phba->hb_tmofunc,
602 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
603 phba->hb_outstanding = 0;
604 phba->last_completion_time = jiffies;
605 /* Set up error attention (ERATT) polling timer */
606 mod_timer(&phba->eratt_poll,
607 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
608
609 if (phba->hba_flag & LINK_DISABLED) {
610 lpfc_printf_log(phba,
611 KERN_ERR, LOG_INIT,
612 "2598 Adapter Link is disabled.\n");
613 lpfc_down_link(phba, pmb);
614 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
615 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
616 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
617 lpfc_printf_log(phba,
618 KERN_ERR, LOG_INIT,
619 "2599 Adapter failed to issue DOWN_LINK"
620 " mbox command rc 0x%x\n", rc);
621
622 mempool_free(pmb, phba->mbox_mem_pool);
623 return -EIO;
624 }
625 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
626 mempool_free(pmb, phba->mbox_mem_pool);
627 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
628 if (rc)
629 return rc;
630 }
631 /* MBOX buffer will be freed in mbox compl */
632 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
633 if (!pmb) {
634 phba->link_state = LPFC_HBA_ERROR;
635 return -ENOMEM;
636 }
637
638 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
639 pmb->mbox_cmpl = lpfc_config_async_cmpl;
640 pmb->vport = phba->pport;
641 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
642
643 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
644 lpfc_printf_log(phba,
645 KERN_ERR,
646 LOG_INIT,
647 "0456 Adapter failed to issue "
648 "ASYNCEVT_ENABLE mbox status x%x\n",
649 rc);
650 mempool_free(pmb, phba->mbox_mem_pool);
651 }
652
653 /* Get Option rom version */
654 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
655 if (!pmb) {
656 phba->link_state = LPFC_HBA_ERROR;
657 return -ENOMEM;
658 }
659
660 lpfc_dump_wakeup_param(phba, pmb);
661 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
662 pmb->vport = phba->pport;
663 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
664
665 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
666 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, "0435 Adapter failed "
667 "to get Option ROM version status x%x\n", rc);
668 mempool_free(pmb, phba->mbox_mem_pool);
669 }
670
671 return 0;
672}
673
674/**
675 * lpfc_hba_init_link - Initialize the FC link
676 * @phba: pointer to lpfc hba data structure.
677 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
678 *
679 * This routine will issue the INIT_LINK mailbox command call.
680 * It is available to other drivers through the lpfc_hba data
681 * structure for use as a delayed link up mechanism with the
682 * module parameter lpfc_suppress_link_up.
683 *
684 * Return code
685 * 0 - success
686 * Any other value - error
687 **/
688static int
689lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
690{
691 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
692}
693
694/**
695 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
696 * @phba: pointer to lpfc hba data structure.
697 * @fc_topology: desired fc topology.
698 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
699 *
700 * This routine will issue the INIT_LINK mailbox command call.
701 * It is available to other drivers through the lpfc_hba data
702 * structure for use as a delayed link up mechanism with the
703 * module parameter lpfc_suppress_link_up.
704 *
705 * Return code
706 * 0 - success
707 * Any other value - error
708 **/
709int
710lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
711 uint32_t flag)
712{
713 struct lpfc_vport *vport = phba->pport;
714 LPFC_MBOXQ_t *pmb;
715 MAILBOX_t *mb;
716 int rc;
717
718 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
719 if (!pmb) {
720 phba->link_state = LPFC_HBA_ERROR;
721 return -ENOMEM;
722 }
723 mb = &pmb->u.mb;
724 pmb->vport = vport;
725
726 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
727 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
728 !(phba->lmt & LMT_1Gb)) ||
729 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
730 !(phba->lmt & LMT_2Gb)) ||
731 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
732 !(phba->lmt & LMT_4Gb)) ||
733 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
734 !(phba->lmt & LMT_8Gb)) ||
735 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
736 !(phba->lmt & LMT_10Gb)) ||
737 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
738 !(phba->lmt & LMT_16Gb)) ||
739 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
740 !(phba->lmt & LMT_32Gb)) ||
741 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
742 !(phba->lmt & LMT_64Gb))) {
743 /* Reset link speed to auto */
744 lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
745 "1302 Invalid speed for this board:%d "
746 "Reset link speed to auto.\n",
747 phba->cfg_link_speed);
748 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
749 }
750 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
751 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
752 if (phba->sli_rev < LPFC_SLI_REV4)
753 lpfc_set_loopback_flag(phba);
754 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
755 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
756 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
757 "0498 Adapter failed to init, mbxCmd x%x "
758 "INIT_LINK, mbxStatus x%x\n",
759 mb->mbxCommand, mb->mbxStatus);
760 if (phba->sli_rev <= LPFC_SLI_REV3) {
761 /* Clear all interrupt enable conditions */
762 writel(0, phba->HCregaddr);
763 readl(phba->HCregaddr); /* flush */
764 /* Clear all pending interrupts */
765 writel(0xffffffff, phba->HAregaddr);
766 readl(phba->HAregaddr); /* flush */
767 }
768 phba->link_state = LPFC_HBA_ERROR;
769 if (rc != MBX_BUSY || flag == MBX_POLL)
770 mempool_free(pmb, phba->mbox_mem_pool);
771 return -EIO;
772 }
773 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
774 if (flag == MBX_POLL)
775 mempool_free(pmb, phba->mbox_mem_pool);
776
777 return 0;
778}
779
780/**
781 * lpfc_hba_down_link - this routine downs the FC link
782 * @phba: pointer to lpfc hba data structure.
783 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
784 *
785 * This routine will issue the DOWN_LINK mailbox command call.
786 * It is available to other drivers through the lpfc_hba data
787 * structure for use to stop the link.
788 *
789 * Return code
790 * 0 - success
791 * Any other value - error
792 **/
793static int
794lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
795{
796 LPFC_MBOXQ_t *pmb;
797 int rc;
798
799 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
800 if (!pmb) {
801 phba->link_state = LPFC_HBA_ERROR;
802 return -ENOMEM;
803 }
804
805 lpfc_printf_log(phba,
806 KERN_ERR, LOG_INIT,
807 "0491 Adapter Link is disabled.\n");
808 lpfc_down_link(phba, pmb);
809 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
810 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
811 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
812 lpfc_printf_log(phba,
813 KERN_ERR, LOG_INIT,
814 "2522 Adapter failed to issue DOWN_LINK"
815 " mbox command rc 0x%x\n", rc);
816
817 mempool_free(pmb, phba->mbox_mem_pool);
818 return -EIO;
819 }
820 if (flag == MBX_POLL)
821 mempool_free(pmb, phba->mbox_mem_pool);
822
823 return 0;
824}
825
826/**
827 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
828 * @phba: pointer to lpfc HBA data structure.
829 *
830 * This routine will do LPFC uninitialization before the HBA is reset when
831 * bringing down the SLI Layer.
832 *
833 * Return codes
834 * 0 - success.
835 * Any other value - error.
836 **/
837int
838lpfc_hba_down_prep(struct lpfc_hba *phba)
839{
840 struct lpfc_vport **vports;
841 int i;
842
843 if (phba->sli_rev <= LPFC_SLI_REV3) {
844 /* Disable interrupts */
845 writel(0, phba->HCregaddr);
846 readl(phba->HCregaddr); /* flush */
847 }
848
849 if (phba->pport->load_flag & FC_UNLOADING)
850 lpfc_cleanup_discovery_resources(phba->pport);
851 else {
852 vports = lpfc_create_vport_work_array(phba);
853 if (vports != NULL)
854 for (i = 0; i <= phba->max_vports &&
855 vports[i] != NULL; i++)
856 lpfc_cleanup_discovery_resources(vports[i]);
857 lpfc_destroy_vport_work_array(phba, vports);
858 }
859 return 0;
860}
861
862/**
863 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
864 * rspiocb which got deferred
865 *
866 * @phba: pointer to lpfc HBA data structure.
867 *
868 * This routine will cleanup completed slow path events after HBA is reset
869 * when bringing down the SLI Layer.
870 *
871 *
872 * Return codes
873 * void.
874 **/
875static void
876lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
877{
878 struct lpfc_iocbq *rspiocbq;
879 struct hbq_dmabuf *dmabuf;
880 struct lpfc_cq_event *cq_event;
881
882 spin_lock_irq(&phba->hbalock);
883 phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
884 spin_unlock_irq(&phba->hbalock);
885
886 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
887 /* Get the response iocb from the head of work queue */
888 spin_lock_irq(&phba->hbalock);
889 list_remove_head(&phba->sli4_hba.sp_queue_event,
890 cq_event, struct lpfc_cq_event, list);
891 spin_unlock_irq(&phba->hbalock);
892
893 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
894 case CQE_CODE_COMPL_WQE:
895 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
896 cq_event);
897 lpfc_sli_release_iocbq(phba, rspiocbq);
898 break;
899 case CQE_CODE_RECEIVE:
900 case CQE_CODE_RECEIVE_V1:
901 dmabuf = container_of(cq_event, struct hbq_dmabuf,
902 cq_event);
903 lpfc_in_buf_free(phba, &dmabuf->dbuf);
904 }
905 }
906}
907
908/**
909 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
910 * @phba: pointer to lpfc HBA data structure.
911 *
912 * This routine will cleanup posted ELS buffers after the HBA is reset
913 * when bringing down the SLI Layer.
914 *
915 *
916 * Return codes
917 * void.
918 **/
919static void
920lpfc_hba_free_post_buf(struct lpfc_hba *phba)
921{
922 struct lpfc_sli *psli = &phba->sli;
923 struct lpfc_sli_ring *pring;
924 struct lpfc_dmabuf *mp, *next_mp;
925 LIST_HEAD(buflist);
926 int count;
927
928 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
929 lpfc_sli_hbqbuf_free_all(phba);
930 else {
931 /* Cleanup preposted buffers on the ELS ring */
932 pring = &psli->sli3_ring[LPFC_ELS_RING];
933 spin_lock_irq(&phba->hbalock);
934 list_splice_init(&pring->postbufq, &buflist);
935 spin_unlock_irq(&phba->hbalock);
936
937 count = 0;
938 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
939 list_del(&mp->list);
940 count++;
941 lpfc_mbuf_free(phba, mp->virt, mp->phys);
942 kfree(mp);
943 }
944
945 spin_lock_irq(&phba->hbalock);
946 pring->postbufq_cnt -= count;
947 spin_unlock_irq(&phba->hbalock);
948 }
949}
950
951/**
952 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
953 * @phba: pointer to lpfc HBA data structure.
954 *
955 * This routine will cleanup the txcmplq after the HBA is reset when bringing
956 * down the SLI Layer.
957 *
958 * Return codes
959 * void
960 **/
961static void
962lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
963{
964 struct lpfc_sli *psli = &phba->sli;
965 struct lpfc_queue *qp = NULL;
966 struct lpfc_sli_ring *pring;
967 LIST_HEAD(completions);
968 int i;
969 struct lpfc_iocbq *piocb, *next_iocb;
970
971 if (phba->sli_rev != LPFC_SLI_REV4) {
972 for (i = 0; i < psli->num_rings; i++) {
973 pring = &psli->sli3_ring[i];
974 spin_lock_irq(&phba->hbalock);
975 /* At this point in time the HBA is either reset or DOA
976 * Nothing should be on txcmplq as it will
977 * NEVER complete.
978 */
979 list_splice_init(&pring->txcmplq, &completions);
980 pring->txcmplq_cnt = 0;
981 spin_unlock_irq(&phba->hbalock);
982
983 lpfc_sli_abort_iocb_ring(phba, pring);
984 }
985 /* Cancel all the IOCBs from the completions list */
986 lpfc_sli_cancel_iocbs(phba, &completions,
987 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
988 return;
989 }
990 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
991 pring = qp->pring;
992 if (!pring)
993 continue;
994 spin_lock_irq(&pring->ring_lock);
995 list_for_each_entry_safe(piocb, next_iocb,
996 &pring->txcmplq, list)
997 piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
998 list_splice_init(&pring->txcmplq, &completions);
999 pring->txcmplq_cnt = 0;
1000 spin_unlock_irq(&pring->ring_lock);
1001 lpfc_sli_abort_iocb_ring(phba, pring);
1002 }
1003 /* Cancel all the IOCBs from the completions list */
1004 lpfc_sli_cancel_iocbs(phba, &completions,
1005 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1006}
1007
1008/**
1009 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1010 int i;
1011 * @phba: pointer to lpfc HBA data structure.
1012 *
1013 * This routine will do uninitialization after the HBA is reset when bring
1014 * down the SLI Layer.
1015 *
1016 * Return codes
1017 * 0 - success.
1018 * Any other value - error.
1019 **/
1020static int
1021lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1022{
1023 lpfc_hba_free_post_buf(phba);
1024 lpfc_hba_clean_txcmplq(phba);
1025 return 0;
1026}
1027
1028/**
1029 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1030 * @phba: pointer to lpfc HBA data structure.
1031 *
1032 * This routine will do uninitialization after the HBA is reset when bring
1033 * down the SLI Layer.
1034 *
1035 * Return codes
1036 * 0 - success.
1037 * Any other value - error.
1038 **/
1039static int
1040lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1041{
David Brazdil0f672f62019-12-10 10:32:29 +00001042 struct lpfc_io_buf *psb, *psb_next;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001043 struct lpfc_nvmet_rcv_ctx *ctxp, *ctxp_next;
David Brazdil0f672f62019-12-10 10:32:29 +00001044 struct lpfc_sli4_hdw_queue *qp;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001045 LIST_HEAD(aborts);
1046 LIST_HEAD(nvme_aborts);
1047 LIST_HEAD(nvmet_aborts);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001048 struct lpfc_sglq *sglq_entry = NULL;
David Brazdil0f672f62019-12-10 10:32:29 +00001049 int cnt, idx;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001050
1051
1052 lpfc_sli_hbqbuf_free_all(phba);
1053 lpfc_hba_clean_txcmplq(phba);
1054
1055 /* At this point in time the HBA is either reset or DOA. Either
1056 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
1057 * on the lpfc_els_sgl_list so that it can either be freed if the
1058 * driver is unloading or reposted if the driver is restarting
1059 * the port.
1060 */
1061 spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
1062 /* scsl_buf_list */
1063 /* sgl_list_lock required because worker thread uses this
1064 * list.
1065 */
1066 spin_lock(&phba->sli4_hba.sgl_list_lock);
1067 list_for_each_entry(sglq_entry,
1068 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1069 sglq_entry->state = SGL_FREED;
1070
1071 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1072 &phba->sli4_hba.lpfc_els_sgl_list);
1073
1074
1075 spin_unlock(&phba->sli4_hba.sgl_list_lock);
David Brazdil0f672f62019-12-10 10:32:29 +00001076
1077 /* abts_xxxx_buf_list_lock required because worker thread uses this
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001078 * list.
1079 */
David Brazdil0f672f62019-12-10 10:32:29 +00001080 cnt = 0;
1081 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
1082 qp = &phba->sli4_hba.hdwq[idx];
1083
1084 spin_lock(&qp->abts_io_buf_list_lock);
1085 list_splice_init(&qp->lpfc_abts_io_buf_list,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001086 &aborts);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001087
David Brazdil0f672f62019-12-10 10:32:29 +00001088 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001089 psb->pCmd = NULL;
1090 psb->status = IOSTAT_SUCCESS;
1091 cnt++;
1092 }
David Brazdil0f672f62019-12-10 10:32:29 +00001093 spin_lock(&qp->io_buf_list_put_lock);
1094 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
1095 qp->put_io_bufs += qp->abts_scsi_io_bufs;
1096 qp->put_io_bufs += qp->abts_nvme_io_bufs;
1097 qp->abts_scsi_io_bufs = 0;
1098 qp->abts_nvme_io_bufs = 0;
1099 spin_unlock(&qp->io_buf_list_put_lock);
1100 spin_unlock(&qp->abts_io_buf_list_lock);
1101 }
1102 spin_unlock_irq(&phba->hbalock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001103
David Brazdil0f672f62019-12-10 10:32:29 +00001104 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1105 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1106 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1107 &nvmet_aborts);
1108 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001109 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1110 ctxp->flag &= ~(LPFC_NVMET_XBUSY | LPFC_NVMET_ABORT_OP);
1111 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
1112 }
1113 }
1114
1115 lpfc_sli4_free_sp_events(phba);
David Brazdil0f672f62019-12-10 10:32:29 +00001116 return cnt;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001117}
1118
1119/**
1120 * lpfc_hba_down_post - Wrapper func for hba down post routine
1121 * @phba: pointer to lpfc HBA data structure.
1122 *
1123 * This routine wraps the actual SLI3 or SLI4 routine for performing
1124 * uninitialization after the HBA is reset when bring down the SLI Layer.
1125 *
1126 * Return codes
1127 * 0 - success.
1128 * Any other value - error.
1129 **/
1130int
1131lpfc_hba_down_post(struct lpfc_hba *phba)
1132{
1133 return (*phba->lpfc_hba_down_post)(phba);
1134}
1135
1136/**
1137 * lpfc_hb_timeout - The HBA-timer timeout handler
1138 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1139 *
1140 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1141 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1142 * work-port-events bitmap and the worker thread is notified. This timeout
1143 * event will be used by the worker thread to invoke the actual timeout
1144 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1145 * be performed in the timeout handler and the HBA timeout event bit shall
1146 * be cleared by the worker thread after it has taken the event bitmap out.
1147 **/
1148static void
1149lpfc_hb_timeout(struct timer_list *t)
1150{
1151 struct lpfc_hba *phba;
1152 uint32_t tmo_posted;
1153 unsigned long iflag;
1154
1155 phba = from_timer(phba, t, hb_tmofunc);
1156
1157 /* Check for heart beat timeout conditions */
1158 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1159 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1160 if (!tmo_posted)
1161 phba->pport->work_port_events |= WORKER_HB_TMO;
1162 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1163
1164 /* Tell the worker thread there is work to do */
1165 if (!tmo_posted)
1166 lpfc_worker_wake_up(phba);
1167 return;
1168}
1169
1170/**
1171 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1172 * @ptr: unsigned long holds the pointer to lpfc hba data structure.
1173 *
1174 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1175 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1176 * work-port-events bitmap and the worker thread is notified. This timeout
1177 * event will be used by the worker thread to invoke the actual timeout
1178 * handler routine, lpfc_rrq_handler. Any periodical operations will
1179 * be performed in the timeout handler and the RRQ timeout event bit shall
1180 * be cleared by the worker thread after it has taken the event bitmap out.
1181 **/
1182static void
1183lpfc_rrq_timeout(struct timer_list *t)
1184{
1185 struct lpfc_hba *phba;
1186 unsigned long iflag;
1187
1188 phba = from_timer(phba, t, rrq_tmr);
1189 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1190 if (!(phba->pport->load_flag & FC_UNLOADING))
1191 phba->hba_flag |= HBA_RRQ_ACTIVE;
1192 else
1193 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
1194 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1195
1196 if (!(phba->pport->load_flag & FC_UNLOADING))
1197 lpfc_worker_wake_up(phba);
1198}
1199
1200/**
1201 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
1202 * @phba: pointer to lpfc hba data structure.
1203 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1204 *
1205 * This is the callback function to the lpfc heart-beat mailbox command.
1206 * If configured, the lpfc driver issues the heart-beat mailbox command to
1207 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1208 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1209 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1210 * heart-beat outstanding state. Once the mailbox command comes back and
1211 * no error conditions detected, the heart-beat mailbox command timer is
1212 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1213 * state is cleared for the next heart-beat. If the timer expired with the
1214 * heart-beat outstanding state set, the driver will put the HBA offline.
1215 **/
1216static void
1217lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1218{
1219 unsigned long drvr_flag;
1220
1221 spin_lock_irqsave(&phba->hbalock, drvr_flag);
1222 phba->hb_outstanding = 0;
1223 spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
1224
1225 /* Check and reset heart-beat timer is necessary */
1226 mempool_free(pmboxq, phba->mbox_mem_pool);
1227 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
1228 !(phba->link_state == LPFC_HBA_ERROR) &&
1229 !(phba->pport->load_flag & FC_UNLOADING))
1230 mod_timer(&phba->hb_tmofunc,
1231 jiffies +
1232 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1233 return;
1234}
1235
David Brazdil0f672f62019-12-10 10:32:29 +00001236static void
1237lpfc_hb_eq_delay_work(struct work_struct *work)
1238{
1239 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1240 struct lpfc_hba, eq_delay_work);
1241 struct lpfc_eq_intr_info *eqi, *eqi_new;
1242 struct lpfc_queue *eq, *eq_next;
1243 unsigned char *eqcnt = NULL;
1244 uint32_t usdelay;
1245 int i;
1246 bool update = false;
1247
1248 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING)
1249 return;
1250
1251 if (phba->link_state == LPFC_HBA_ERROR ||
1252 phba->pport->fc_flag & FC_OFFLINE_MODE)
1253 goto requeue;
1254
1255 eqcnt = kcalloc(num_possible_cpus(), sizeof(unsigned char),
1256 GFP_KERNEL);
1257 if (!eqcnt)
1258 goto requeue;
1259
1260 if (phba->cfg_irq_chann > 1) {
1261 /* Loop thru all IRQ vectors */
1262 for (i = 0; i < phba->cfg_irq_chann; i++) {
1263 /* Get the EQ corresponding to the IRQ vector */
1264 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1265 if (!eq)
1266 continue;
1267 if (eq->q_mode) {
1268 update = true;
1269 break;
1270 }
1271 if (eqcnt[eq->last_cpu] < 2)
1272 eqcnt[eq->last_cpu]++;
1273 }
1274 } else
1275 update = true;
1276
1277 for_each_present_cpu(i) {
1278 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1279 if (!update && eqcnt[i] < 2) {
1280 eqi->icnt = 0;
1281 continue;
1282 }
1283
1284 usdelay = (eqi->icnt / LPFC_IMAX_THRESHOLD) *
1285 LPFC_EQ_DELAY_STEP;
1286 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1287 usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1288
1289 eqi->icnt = 0;
1290
1291 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1292 if (eq->last_cpu != i) {
1293 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1294 eq->last_cpu);
1295 list_move_tail(&eq->cpu_list, &eqi_new->list);
1296 continue;
1297 }
1298 if (usdelay != eq->q_mode)
1299 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1300 usdelay);
1301 }
1302 }
1303
1304 kfree(eqcnt);
1305
1306requeue:
1307 queue_delayed_work(phba->wq, &phba->eq_delay_work,
1308 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1309}
1310
1311/**
1312 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1313 * @phba: pointer to lpfc hba data structure.
1314 *
1315 * For each heartbeat, this routine does some heuristic methods to adjust
1316 * XRI distribution. The goal is to fully utilize free XRIs.
1317 **/
1318static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
1319{
1320 u32 i;
1321 u32 hwq_count;
1322
1323 hwq_count = phba->cfg_hdw_queue;
1324 for (i = 0; i < hwq_count; i++) {
1325 /* Adjust XRIs in private pool */
1326 lpfc_adjust_pvt_pool_count(phba, i);
1327
1328 /* Adjust high watermark */
1329 lpfc_adjust_high_watermark(phba, i);
1330
1331#ifdef LPFC_MXP_STAT
1332 /* Snapshot pbl, pvt and busy count */
1333 lpfc_snapshot_mxp(phba, i);
1334#endif
1335 }
1336}
1337
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001338/**
1339 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
1340 * @phba: pointer to lpfc hba data structure.
1341 *
1342 * This is the actual HBA-timer timeout handler to be invoked by the worker
1343 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1344 * handler performs any periodic operations needed for the device. If such
1345 * periodic event has already been attended to either in the interrupt handler
1346 * or by processing slow-ring or fast-ring events within the HBA-timer
1347 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1348 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1349 * is configured and there is no heart-beat mailbox command outstanding, a
1350 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1351 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1352 * to offline.
1353 **/
1354void
1355lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1356{
1357 struct lpfc_vport **vports;
1358 LPFC_MBOXQ_t *pmboxq;
1359 struct lpfc_dmabuf *buf_ptr;
1360 int retval, i;
1361 struct lpfc_sli *psli = &phba->sli;
1362 LIST_HEAD(completions);
David Brazdil0f672f62019-12-10 10:32:29 +00001363
1364 if (phba->cfg_xri_rebalancing) {
1365 /* Multi-XRI pools handler */
1366 lpfc_hb_mxp_handler(phba);
1367 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001368
1369 vports = lpfc_create_vport_work_array(phba);
1370 if (vports != NULL)
1371 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
1372 lpfc_rcv_seq_check_edtov(vports[i]);
Olivier Deprez0e641232021-09-23 10:07:05 +02001373 lpfc_fdmi_change_check(vports[i]);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001374 }
1375 lpfc_destroy_vport_work_array(phba, vports);
1376
1377 if ((phba->link_state == LPFC_HBA_ERROR) ||
1378 (phba->pport->load_flag & FC_UNLOADING) ||
1379 (phba->pport->fc_flag & FC_OFFLINE_MODE))
1380 return;
1381
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001382 spin_lock_irq(&phba->pport->work_port_lock);
1383
1384 if (time_after(phba->last_completion_time +
1385 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
1386 jiffies)) {
1387 spin_unlock_irq(&phba->pport->work_port_lock);
1388 if (!phba->hb_outstanding)
1389 mod_timer(&phba->hb_tmofunc,
1390 jiffies +
1391 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1392 else
1393 mod_timer(&phba->hb_tmofunc,
1394 jiffies +
1395 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
1396 return;
1397 }
1398 spin_unlock_irq(&phba->pport->work_port_lock);
1399
1400 if (phba->elsbuf_cnt &&
1401 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1402 spin_lock_irq(&phba->hbalock);
1403 list_splice_init(&phba->elsbuf, &completions);
1404 phba->elsbuf_cnt = 0;
1405 phba->elsbuf_prev_cnt = 0;
1406 spin_unlock_irq(&phba->hbalock);
1407
1408 while (!list_empty(&completions)) {
1409 list_remove_head(&completions, buf_ptr,
1410 struct lpfc_dmabuf, list);
1411 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1412 kfree(buf_ptr);
1413 }
1414 }
1415 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1416
1417 /* If there is no heart beat outstanding, issue a heartbeat command */
1418 if (phba->cfg_enable_hba_heartbeat) {
1419 if (!phba->hb_outstanding) {
1420 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1421 (list_empty(&psli->mboxq))) {
1422 pmboxq = mempool_alloc(phba->mbox_mem_pool,
1423 GFP_KERNEL);
1424 if (!pmboxq) {
1425 mod_timer(&phba->hb_tmofunc,
1426 jiffies +
1427 msecs_to_jiffies(1000 *
1428 LPFC_HB_MBOX_INTERVAL));
1429 return;
1430 }
1431
1432 lpfc_heart_beat(phba, pmboxq);
1433 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1434 pmboxq->vport = phba->pport;
1435 retval = lpfc_sli_issue_mbox(phba, pmboxq,
1436 MBX_NOWAIT);
1437
1438 if (retval != MBX_BUSY &&
1439 retval != MBX_SUCCESS) {
1440 mempool_free(pmboxq,
1441 phba->mbox_mem_pool);
1442 mod_timer(&phba->hb_tmofunc,
1443 jiffies +
1444 msecs_to_jiffies(1000 *
1445 LPFC_HB_MBOX_INTERVAL));
1446 return;
1447 }
1448 phba->skipped_hb = 0;
1449 phba->hb_outstanding = 1;
1450 } else if (time_before_eq(phba->last_completion_time,
1451 phba->skipped_hb)) {
1452 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1453 "2857 Last completion time not "
1454 " updated in %d ms\n",
1455 jiffies_to_msecs(jiffies
1456 - phba->last_completion_time));
1457 } else
1458 phba->skipped_hb = jiffies;
1459
1460 mod_timer(&phba->hb_tmofunc,
1461 jiffies +
1462 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
1463 return;
1464 } else {
1465 /*
1466 * If heart beat timeout called with hb_outstanding set
1467 * we need to give the hb mailbox cmd a chance to
1468 * complete or TMO.
1469 */
1470 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1471 "0459 Adapter heartbeat still out"
1472 "standing:last compl time was %d ms.\n",
1473 jiffies_to_msecs(jiffies
1474 - phba->last_completion_time));
1475 mod_timer(&phba->hb_tmofunc,
1476 jiffies +
1477 msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
1478 }
1479 } else {
1480 mod_timer(&phba->hb_tmofunc,
1481 jiffies +
1482 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
1483 }
1484}
1485
1486/**
1487 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
1488 * @phba: pointer to lpfc hba data structure.
1489 *
1490 * This routine is called to bring the HBA offline when HBA hardware error
1491 * other than Port Error 6 has been detected.
1492 **/
1493static void
1494lpfc_offline_eratt(struct lpfc_hba *phba)
1495{
1496 struct lpfc_sli *psli = &phba->sli;
1497
1498 spin_lock_irq(&phba->hbalock);
1499 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1500 spin_unlock_irq(&phba->hbalock);
1501 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1502
1503 lpfc_offline(phba);
1504 lpfc_reset_barrier(phba);
1505 spin_lock_irq(&phba->hbalock);
1506 lpfc_sli_brdreset(phba);
1507 spin_unlock_irq(&phba->hbalock);
1508 lpfc_hba_down_post(phba);
1509 lpfc_sli_brdready(phba, HS_MBRDY);
1510 lpfc_unblock_mgmt_io(phba);
1511 phba->link_state = LPFC_HBA_ERROR;
1512 return;
1513}
1514
1515/**
1516 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1517 * @phba: pointer to lpfc hba data structure.
1518 *
1519 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1520 * other than Port Error 6 has been detected.
1521 **/
1522void
1523lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1524{
1525 spin_lock_irq(&phba->hbalock);
1526 phba->link_state = LPFC_HBA_ERROR;
1527 spin_unlock_irq(&phba->hbalock);
1528
1529 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
David Brazdil0f672f62019-12-10 10:32:29 +00001530 lpfc_sli_flush_io_rings(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001531 lpfc_offline(phba);
1532 lpfc_hba_down_post(phba);
1533 lpfc_unblock_mgmt_io(phba);
1534}
1535
1536/**
1537 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1538 * @phba: pointer to lpfc hba data structure.
1539 *
1540 * This routine is invoked to handle the deferred HBA hardware error
1541 * conditions. This type of error is indicated by HBA by setting ER1
1542 * and another ER bit in the host status register. The driver will
1543 * wait until the ER1 bit clears before handling the error condition.
1544 **/
1545static void
1546lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1547{
1548 uint32_t old_host_status = phba->work_hs;
1549 struct lpfc_sli *psli = &phba->sli;
1550
1551 /* If the pci channel is offline, ignore possible errors,
1552 * since we cannot communicate with the pci card anyway.
1553 */
1554 if (pci_channel_offline(phba->pcidev)) {
1555 spin_lock_irq(&phba->hbalock);
1556 phba->hba_flag &= ~DEFER_ERATT;
1557 spin_unlock_irq(&phba->hbalock);
1558 return;
1559 }
1560
1561 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1562 "0479 Deferred Adapter Hardware Error "
1563 "Data: x%x x%x x%x\n",
1564 phba->work_hs,
1565 phba->work_status[0], phba->work_status[1]);
1566
1567 spin_lock_irq(&phba->hbalock);
1568 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1569 spin_unlock_irq(&phba->hbalock);
1570
1571
1572 /*
1573 * Firmware stops when it triggred erratt. That could cause the I/Os
1574 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1575 * SCSI layer retry it after re-establishing link.
1576 */
1577 lpfc_sli_abort_fcp_rings(phba);
1578
1579 /*
1580 * There was a firmware error. Take the hba offline and then
1581 * attempt to restart it.
1582 */
1583 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
1584 lpfc_offline(phba);
1585
1586 /* Wait for the ER1 bit to clear.*/
1587 while (phba->work_hs & HS_FFER1) {
1588 msleep(100);
1589 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1590 phba->work_hs = UNPLUG_ERR ;
1591 break;
1592 }
1593 /* If driver is unloading let the worker thread continue */
1594 if (phba->pport->load_flag & FC_UNLOADING) {
1595 phba->work_hs = 0;
1596 break;
1597 }
1598 }
1599
1600 /*
1601 * This is to ptrotect against a race condition in which
1602 * first write to the host attention register clear the
1603 * host status register.
1604 */
1605 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
1606 phba->work_hs = old_host_status & ~HS_FFER1;
1607
1608 spin_lock_irq(&phba->hbalock);
1609 phba->hba_flag &= ~DEFER_ERATT;
1610 spin_unlock_irq(&phba->hbalock);
1611 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1612 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1613}
1614
1615static void
1616lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1617{
1618 struct lpfc_board_event_header board_event;
1619 struct Scsi_Host *shost;
1620
1621 board_event.event_type = FC_REG_BOARD_EVENT;
1622 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1623 shost = lpfc_shost_from_vport(phba->pport);
1624 fc_host_post_vendor_event(shost, fc_get_event_number(),
1625 sizeof(board_event),
1626 (char *) &board_event,
1627 LPFC_NL_VENDOR_ID);
1628}
1629
1630/**
1631 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
1632 * @phba: pointer to lpfc hba data structure.
1633 *
1634 * This routine is invoked to handle the following HBA hardware error
1635 * conditions:
1636 * 1 - HBA error attention interrupt
1637 * 2 - DMA ring index out of range
1638 * 3 - Mailbox command came back as unknown
1639 **/
1640static void
1641lpfc_handle_eratt_s3(struct lpfc_hba *phba)
1642{
1643 struct lpfc_vport *vport = phba->pport;
1644 struct lpfc_sli *psli = &phba->sli;
1645 uint32_t event_data;
1646 unsigned long temperature;
1647 struct temp_event temp_event_data;
1648 struct Scsi_Host *shost;
1649
1650 /* If the pci channel is offline, ignore possible errors,
1651 * since we cannot communicate with the pci card anyway.
1652 */
1653 if (pci_channel_offline(phba->pcidev)) {
1654 spin_lock_irq(&phba->hbalock);
1655 phba->hba_flag &= ~DEFER_ERATT;
1656 spin_unlock_irq(&phba->hbalock);
1657 return;
1658 }
1659
1660 /* If resets are disabled then leave the HBA alone and return */
1661 if (!phba->cfg_enable_hba_reset)
1662 return;
1663
1664 /* Send an internal error event to mgmt application */
1665 lpfc_board_errevt_to_mgmt(phba);
1666
1667 if (phba->hba_flag & DEFER_ERATT)
1668 lpfc_handle_deferred_eratt(phba);
1669
1670 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1671 if (phba->work_hs & HS_FFER6)
1672 /* Re-establishing Link */
1673 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1674 "1301 Re-establishing Link "
1675 "Data: x%x x%x x%x\n",
1676 phba->work_hs, phba->work_status[0],
1677 phba->work_status[1]);
1678 if (phba->work_hs & HS_FFER8)
1679 /* Device Zeroization */
1680 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1681 "2861 Host Authentication device "
1682 "zeroization Data:x%x x%x x%x\n",
1683 phba->work_hs, phba->work_status[0],
1684 phba->work_status[1]);
1685
1686 spin_lock_irq(&phba->hbalock);
1687 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1688 spin_unlock_irq(&phba->hbalock);
1689
1690 /*
1691 * Firmware stops when it triggled erratt with HS_FFER6.
1692 * That could cause the I/Os dropped by the firmware.
1693 * Error iocb (I/O) on txcmplq and let the SCSI layer
1694 * retry it after re-establishing link.
1695 */
1696 lpfc_sli_abort_fcp_rings(phba);
1697
1698 /*
1699 * There was a firmware error. Take the hba offline and then
1700 * attempt to restart it.
1701 */
1702 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1703 lpfc_offline(phba);
1704 lpfc_sli_brdrestart(phba);
1705 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
1706 lpfc_unblock_mgmt_io(phba);
1707 return;
1708 }
1709 lpfc_unblock_mgmt_io(phba);
1710 } else if (phba->work_hs & HS_CRIT_TEMP) {
1711 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1712 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1713 temp_event_data.event_code = LPFC_CRIT_TEMP;
1714 temp_event_data.data = (uint32_t)temperature;
1715
1716 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1717 "0406 Adapter maximum temperature exceeded "
1718 "(%ld), taking this port offline "
1719 "Data: x%x x%x x%x\n",
1720 temperature, phba->work_hs,
1721 phba->work_status[0], phba->work_status[1]);
1722
1723 shost = lpfc_shost_from_vport(phba->pport);
1724 fc_host_post_vendor_event(shost, fc_get_event_number(),
1725 sizeof(temp_event_data),
1726 (char *) &temp_event_data,
1727 SCSI_NL_VID_TYPE_PCI
1728 | PCI_VENDOR_ID_EMULEX);
1729
1730 spin_lock_irq(&phba->hbalock);
1731 phba->over_temp_state = HBA_OVER_TEMP;
1732 spin_unlock_irq(&phba->hbalock);
1733 lpfc_offline_eratt(phba);
1734
1735 } else {
1736 /* The if clause above forces this code path when the status
1737 * failure is a value other than FFER6. Do not call the offline
1738 * twice. This is the adapter hardware error path.
1739 */
1740 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1741 "0457 Adapter Hardware Error "
1742 "Data: x%x x%x x%x\n",
1743 phba->work_hs,
1744 phba->work_status[0], phba->work_status[1]);
1745
1746 event_data = FC_REG_DUMP_EVENT;
1747 shost = lpfc_shost_from_vport(vport);
1748 fc_host_post_vendor_event(shost, fc_get_event_number(),
1749 sizeof(event_data), (char *) &event_data,
1750 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1751
1752 lpfc_offline_eratt(phba);
1753 }
1754 return;
1755}
1756
1757/**
1758 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1759 * @phba: pointer to lpfc hba data structure.
1760 * @mbx_action: flag for mailbox shutdown action.
1761 *
1762 * This routine is invoked to perform an SLI4 port PCI function reset in
1763 * response to port status register polling attention. It waits for port
1764 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1765 * During this process, interrupt vectors are freed and later requested
1766 * for handling possible port resource change.
1767 **/
1768static int
1769lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1770 bool en_rn_msg)
1771{
1772 int rc;
1773 uint32_t intr_mode;
1774
1775 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
1776 LPFC_SLI_INTF_IF_TYPE_2) {
1777 /*
1778 * On error status condition, driver need to wait for port
1779 * ready before performing reset.
1780 */
1781 rc = lpfc_sli4_pdev_status_reg_wait(phba);
1782 if (rc)
1783 return rc;
1784 }
1785
1786 /* need reset: attempt for port recovery */
1787 if (en_rn_msg)
1788 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1789 "2887 Reset Needed: Attempting Port "
1790 "Recovery...\n");
1791 lpfc_offline_prep(phba, mbx_action);
David Brazdil0f672f62019-12-10 10:32:29 +00001792 lpfc_sli_flush_io_rings(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001793 lpfc_offline(phba);
1794 /* release interrupt for possible resource change */
1795 lpfc_sli4_disable_intr(phba);
David Brazdil0f672f62019-12-10 10:32:29 +00001796 rc = lpfc_sli_brdrestart(phba);
1797 if (rc) {
1798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1799 "6309 Failed to restart board\n");
1800 return rc;
1801 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001802 /* request and enable interrupt */
1803 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1804 if (intr_mode == LPFC_INTR_ERROR) {
1805 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1806 "3175 Failed to enable interrupt\n");
1807 return -EIO;
1808 }
1809 phba->intr_mode = intr_mode;
1810 rc = lpfc_online(phba);
1811 if (rc == 0)
1812 lpfc_unblock_mgmt_io(phba);
1813
1814 return rc;
1815}
1816
1817/**
1818 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1819 * @phba: pointer to lpfc hba data structure.
1820 *
1821 * This routine is invoked to handle the SLI4 HBA hardware error attention
1822 * conditions.
1823 **/
1824static void
1825lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1826{
1827 struct lpfc_vport *vport = phba->pport;
1828 uint32_t event_data;
1829 struct Scsi_Host *shost;
1830 uint32_t if_type;
1831 struct lpfc_register portstat_reg = {0};
1832 uint32_t reg_err1, reg_err2;
1833 uint32_t uerrlo_reg, uemasklo_reg;
1834 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
1835 bool en_rn_msg = true;
1836 struct temp_event temp_event_data;
1837 struct lpfc_register portsmphr_reg;
1838 int rc, i;
1839
1840 /* If the pci channel is offline, ignore possible errors, since
1841 * we cannot communicate with the pci card anyway.
1842 */
David Brazdil0f672f62019-12-10 10:32:29 +00001843 if (pci_channel_offline(phba->pcidev)) {
1844 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1845 "3166 pci channel is offline\n");
1846 lpfc_sli4_offline_eratt(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001847 return;
David Brazdil0f672f62019-12-10 10:32:29 +00001848 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001849
1850 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
1851 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1852 switch (if_type) {
1853 case LPFC_SLI_INTF_IF_TYPE_0:
1854 pci_rd_rc1 = lpfc_readl(
1855 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1856 &uerrlo_reg);
1857 pci_rd_rc2 = lpfc_readl(
1858 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1859 &uemasklo_reg);
1860 /* consider PCI bus read error as pci_channel_offline */
1861 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
1862 return;
1863 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
1864 lpfc_sli4_offline_eratt(phba);
1865 return;
1866 }
1867 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1868 "7623 Checking UE recoverable");
1869
1870 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1871 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1872 &portsmphr_reg.word0))
1873 continue;
1874
1875 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
1876 &portsmphr_reg);
1877 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1878 LPFC_PORT_SEM_UE_RECOVERABLE)
1879 break;
1880 /*Sleep for 1Sec, before checking SEMAPHORE */
1881 msleep(1000);
1882 }
1883
1884 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1885 "4827 smphr_port_status x%x : Waited %dSec",
1886 smphr_port_status, i);
1887
1888 /* Recoverable UE, reset the HBA device */
1889 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
1890 LPFC_PORT_SEM_UE_RECOVERABLE) {
1891 for (i = 0; i < 20; i++) {
1892 msleep(1000);
1893 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1894 &portsmphr_reg.word0) &&
1895 (LPFC_POST_STAGE_PORT_READY ==
1896 bf_get(lpfc_port_smphr_port_status,
1897 &portsmphr_reg))) {
1898 rc = lpfc_sli4_port_sta_fn_reset(phba,
1899 LPFC_MBX_NO_WAIT, en_rn_msg);
1900 if (rc == 0)
1901 return;
1902 lpfc_printf_log(phba,
1903 KERN_ERR, LOG_INIT,
1904 "4215 Failed to recover UE");
1905 break;
1906 }
1907 }
1908 }
1909 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1910 "7624 Firmware not ready: Failing UE recovery,"
1911 " waited %dSec", i);
David Brazdil0f672f62019-12-10 10:32:29 +00001912 phba->link_state = LPFC_HBA_ERROR;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001913 break;
1914
1915 case LPFC_SLI_INTF_IF_TYPE_2:
1916 case LPFC_SLI_INTF_IF_TYPE_6:
1917 pci_rd_rc1 = lpfc_readl(
1918 phba->sli4_hba.u.if_type2.STATUSregaddr,
1919 &portstat_reg.word0);
1920 /* consider PCI bus read error as pci_channel_offline */
1921 if (pci_rd_rc1 == -EIO) {
1922 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1923 "3151 PCI bus read access failure: x%x\n",
1924 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
David Brazdil0f672f62019-12-10 10:32:29 +00001925 lpfc_sli4_offline_eratt(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001926 return;
1927 }
1928 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1929 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
1930 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
1931 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1932 "2889 Port Overtemperature event, "
1933 "taking port offline Data: x%x x%x\n",
1934 reg_err1, reg_err2);
1935
1936 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
1937 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1938 temp_event_data.event_code = LPFC_CRIT_TEMP;
1939 temp_event_data.data = 0xFFFFFFFF;
1940
1941 shost = lpfc_shost_from_vport(phba->pport);
1942 fc_host_post_vendor_event(shost, fc_get_event_number(),
1943 sizeof(temp_event_data),
1944 (char *)&temp_event_data,
1945 SCSI_NL_VID_TYPE_PCI
1946 | PCI_VENDOR_ID_EMULEX);
1947
1948 spin_lock_irq(&phba->hbalock);
1949 phba->over_temp_state = HBA_OVER_TEMP;
1950 spin_unlock_irq(&phba->hbalock);
1951 lpfc_sli4_offline_eratt(phba);
1952 return;
1953 }
1954 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1955 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
1956 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1957 "3143 Port Down: Firmware Update "
1958 "Detected\n");
1959 en_rn_msg = false;
1960 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1961 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1962 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1963 "3144 Port Down: Debug Dump\n");
1964 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1965 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
1966 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1967 "3145 Port Down: Provisioning\n");
1968
1969 /* If resets are disabled then leave the HBA alone and return */
1970 if (!phba->cfg_enable_hba_reset)
1971 return;
1972
1973 /* Check port status register for function reset */
1974 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
1975 en_rn_msg);
1976 if (rc == 0) {
1977 /* don't report event on forced debug dump */
1978 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
1979 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
1980 return;
1981 else
1982 break;
1983 }
1984 /* fall through for not able to recover */
1985 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00001986 "3152 Unrecoverable error\n");
1987 phba->link_state = LPFC_HBA_ERROR;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001988 break;
1989 case LPFC_SLI_INTF_IF_TYPE_1:
1990 default:
1991 break;
1992 }
1993 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1994 "3123 Report dump event to upper layer\n");
1995 /* Send an internal error event to mgmt application */
1996 lpfc_board_errevt_to_mgmt(phba);
1997
1998 event_data = FC_REG_DUMP_EVENT;
1999 shost = lpfc_shost_from_vport(vport);
2000 fc_host_post_vendor_event(shost, fc_get_event_number(),
2001 sizeof(event_data), (char *) &event_data,
2002 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
2003}
2004
2005/**
2006 * lpfc_handle_eratt - Wrapper func for handling hba error attention
2007 * @phba: pointer to lpfc HBA data structure.
2008 *
2009 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
2010 * routine from the API jump table function pointer from the lpfc_hba struct.
2011 *
2012 * Return codes
2013 * 0 - success.
2014 * Any other value - error.
2015 **/
2016void
2017lpfc_handle_eratt(struct lpfc_hba *phba)
2018{
2019 (*phba->lpfc_handle_eratt)(phba);
2020}
2021
2022/**
2023 * lpfc_handle_latt - The HBA link event handler
2024 * @phba: pointer to lpfc hba data structure.
2025 *
2026 * This routine is invoked from the worker thread to handle a HBA host
2027 * attention link event. SLI3 only.
2028 **/
2029void
2030lpfc_handle_latt(struct lpfc_hba *phba)
2031{
2032 struct lpfc_vport *vport = phba->pport;
2033 struct lpfc_sli *psli = &phba->sli;
2034 LPFC_MBOXQ_t *pmb;
2035 volatile uint32_t control;
2036 struct lpfc_dmabuf *mp;
2037 int rc = 0;
2038
2039 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2040 if (!pmb) {
2041 rc = 1;
2042 goto lpfc_handle_latt_err_exit;
2043 }
2044
2045 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
2046 if (!mp) {
2047 rc = 2;
2048 goto lpfc_handle_latt_free_pmb;
2049 }
2050
2051 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
2052 if (!mp->virt) {
2053 rc = 3;
2054 goto lpfc_handle_latt_free_mp;
2055 }
2056
2057 /* Cleanup any outstanding ELS commands */
2058 lpfc_els_flush_all_cmd(phba);
2059
2060 psli->slistat.link_event++;
2061 lpfc_read_topology(phba, pmb, mp);
2062 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2063 pmb->vport = vport;
2064 /* Block ELS IOCBs until we have processed this mbox command */
2065 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
2066 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
2067 if (rc == MBX_NOT_FINISHED) {
2068 rc = 4;
2069 goto lpfc_handle_latt_free_mbuf;
2070 }
2071
2072 /* Clear Link Attention in HA REG */
2073 spin_lock_irq(&phba->hbalock);
2074 writel(HA_LATT, phba->HAregaddr);
2075 readl(phba->HAregaddr); /* flush */
2076 spin_unlock_irq(&phba->hbalock);
2077
2078 return;
2079
2080lpfc_handle_latt_free_mbuf:
2081 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
2082 lpfc_mbuf_free(phba, mp->virt, mp->phys);
2083lpfc_handle_latt_free_mp:
2084 kfree(mp);
2085lpfc_handle_latt_free_pmb:
2086 mempool_free(pmb, phba->mbox_mem_pool);
2087lpfc_handle_latt_err_exit:
2088 /* Enable Link attention interrupts */
2089 spin_lock_irq(&phba->hbalock);
2090 psli->sli_flag |= LPFC_PROCESS_LA;
2091 control = readl(phba->HCregaddr);
2092 control |= HC_LAINT_ENA;
2093 writel(control, phba->HCregaddr);
2094 readl(phba->HCregaddr); /* flush */
2095
2096 /* Clear Link Attention in HA REG */
2097 writel(HA_LATT, phba->HAregaddr);
2098 readl(phba->HAregaddr); /* flush */
2099 spin_unlock_irq(&phba->hbalock);
2100 lpfc_linkdown(phba);
2101 phba->link_state = LPFC_HBA_ERROR;
2102
2103 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
2104 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
2105
2106 return;
2107}
2108
2109/**
2110 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
2111 * @phba: pointer to lpfc hba data structure.
2112 * @vpd: pointer to the vital product data.
2113 * @len: length of the vital product data in bytes.
2114 *
2115 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2116 * an array of characters. In this routine, the ModelName, ProgramType, and
2117 * ModelDesc, etc. fields of the phba data structure will be populated.
2118 *
2119 * Return codes
2120 * 0 - pointer to the VPD passed in is NULL
2121 * 1 - success
2122 **/
2123int
2124lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
2125{
2126 uint8_t lenlo, lenhi;
2127 int Length;
2128 int i, j;
2129 int finished = 0;
2130 int index = 0;
2131
2132 if (!vpd)
2133 return 0;
2134
2135 /* Vital Product */
2136 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2137 "0455 Vital Product Data: x%x x%x x%x x%x\n",
2138 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2139 (uint32_t) vpd[3]);
2140 while (!finished && (index < (len - 4))) {
2141 switch (vpd[index]) {
2142 case 0x82:
2143 case 0x91:
2144 index += 1;
2145 lenlo = vpd[index];
2146 index += 1;
2147 lenhi = vpd[index];
2148 index += 1;
2149 i = ((((unsigned short)lenhi) << 8) + lenlo);
2150 index += i;
2151 break;
2152 case 0x90:
2153 index += 1;
2154 lenlo = vpd[index];
2155 index += 1;
2156 lenhi = vpd[index];
2157 index += 1;
2158 Length = ((((unsigned short)lenhi) << 8) + lenlo);
2159 if (Length > len - index)
2160 Length = len - index;
2161 while (Length > 0) {
2162 /* Look for Serial Number */
2163 if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
2164 index += 2;
2165 i = vpd[index];
2166 index += 1;
2167 j = 0;
2168 Length -= (3+i);
2169 while(i--) {
2170 phba->SerialNumber[j++] = vpd[index++];
2171 if (j == 31)
2172 break;
2173 }
2174 phba->SerialNumber[j] = 0;
2175 continue;
2176 }
2177 else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
2178 phba->vpd_flag |= VPD_MODEL_DESC;
2179 index += 2;
2180 i = vpd[index];
2181 index += 1;
2182 j = 0;
2183 Length -= (3+i);
2184 while(i--) {
2185 phba->ModelDesc[j++] = vpd[index++];
2186 if (j == 255)
2187 break;
2188 }
2189 phba->ModelDesc[j] = 0;
2190 continue;
2191 }
2192 else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
2193 phba->vpd_flag |= VPD_MODEL_NAME;
2194 index += 2;
2195 i = vpd[index];
2196 index += 1;
2197 j = 0;
2198 Length -= (3+i);
2199 while(i--) {
2200 phba->ModelName[j++] = vpd[index++];
2201 if (j == 79)
2202 break;
2203 }
2204 phba->ModelName[j] = 0;
2205 continue;
2206 }
2207 else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
2208 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2209 index += 2;
2210 i = vpd[index];
2211 index += 1;
2212 j = 0;
2213 Length -= (3+i);
2214 while(i--) {
2215 phba->ProgramType[j++] = vpd[index++];
2216 if (j == 255)
2217 break;
2218 }
2219 phba->ProgramType[j] = 0;
2220 continue;
2221 }
2222 else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
2223 phba->vpd_flag |= VPD_PORT;
2224 index += 2;
2225 i = vpd[index];
2226 index += 1;
2227 j = 0;
2228 Length -= (3+i);
2229 while(i--) {
2230 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2231 (phba->sli4_hba.pport_name_sta ==
2232 LPFC_SLI4_PPNAME_GET)) {
2233 j++;
2234 index++;
2235 } else
2236 phba->Port[j++] = vpd[index++];
2237 if (j == 19)
2238 break;
2239 }
2240 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2241 (phba->sli4_hba.pport_name_sta ==
2242 LPFC_SLI4_PPNAME_NON))
2243 phba->Port[j] = 0;
2244 continue;
2245 }
2246 else {
2247 index += 2;
2248 i = vpd[index];
2249 index += 1;
2250 index += i;
2251 Length -= (3 + i);
2252 }
2253 }
2254 finished = 0;
2255 break;
2256 case 0x78:
2257 finished = 1;
2258 break;
2259 default:
2260 index ++;
2261 break;
2262 }
2263 }
2264
2265 return(1);
2266}
2267
2268/**
2269 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
2270 * @phba: pointer to lpfc hba data structure.
2271 * @mdp: pointer to the data structure to hold the derived model name.
2272 * @descp: pointer to the data structure to hold the derived description.
2273 *
2274 * This routine retrieves HBA's description based on its registered PCI device
2275 * ID. The @descp passed into this function points to an array of 256 chars. It
2276 * shall be returned with the model name, maximum speed, and the host bus type.
2277 * The @mdp passed into this function points to an array of 80 chars. When the
2278 * function returns, the @mdp will be filled with the model name.
2279 **/
2280static void
2281lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2282{
2283 lpfc_vpd_t *vp;
2284 uint16_t dev_id = phba->pcidev->device;
2285 int max_speed;
2286 int GE = 0;
2287 int oneConnect = 0; /* default is not a oneConnect */
2288 struct {
2289 char *name;
2290 char *bus;
2291 char *function;
2292 } m = {"<Unknown>", "", ""};
2293
2294 if (mdp && mdp[0] != '\0'
2295 && descp && descp[0] != '\0')
2296 return;
2297
2298 if (phba->lmt & LMT_64Gb)
2299 max_speed = 64;
2300 else if (phba->lmt & LMT_32Gb)
2301 max_speed = 32;
2302 else if (phba->lmt & LMT_16Gb)
2303 max_speed = 16;
2304 else if (phba->lmt & LMT_10Gb)
2305 max_speed = 10;
2306 else if (phba->lmt & LMT_8Gb)
2307 max_speed = 8;
2308 else if (phba->lmt & LMT_4Gb)
2309 max_speed = 4;
2310 else if (phba->lmt & LMT_2Gb)
2311 max_speed = 2;
2312 else if (phba->lmt & LMT_1Gb)
2313 max_speed = 1;
2314 else
2315 max_speed = 0;
2316
2317 vp = &phba->vpd;
2318
2319 switch (dev_id) {
2320 case PCI_DEVICE_ID_FIREFLY:
2321 m = (typeof(m)){"LP6000", "PCI",
2322 "Obsolete, Unsupported Fibre Channel Adapter"};
2323 break;
2324 case PCI_DEVICE_ID_SUPERFLY:
2325 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
2326 m = (typeof(m)){"LP7000", "PCI", ""};
2327 else
2328 m = (typeof(m)){"LP7000E", "PCI", ""};
2329 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2330 break;
2331 case PCI_DEVICE_ID_DRAGONFLY:
2332 m = (typeof(m)){"LP8000", "PCI",
2333 "Obsolete, Unsupported Fibre Channel Adapter"};
2334 break;
2335 case PCI_DEVICE_ID_CENTAUR:
2336 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
2337 m = (typeof(m)){"LP9002", "PCI", ""};
2338 else
2339 m = (typeof(m)){"LP9000", "PCI", ""};
2340 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2341 break;
2342 case PCI_DEVICE_ID_RFLY:
2343 m = (typeof(m)){"LP952", "PCI",
2344 "Obsolete, Unsupported Fibre Channel Adapter"};
2345 break;
2346 case PCI_DEVICE_ID_PEGASUS:
2347 m = (typeof(m)){"LP9802", "PCI-X",
2348 "Obsolete, Unsupported Fibre Channel Adapter"};
2349 break;
2350 case PCI_DEVICE_ID_THOR:
2351 m = (typeof(m)){"LP10000", "PCI-X",
2352 "Obsolete, Unsupported Fibre Channel Adapter"};
2353 break;
2354 case PCI_DEVICE_ID_VIPER:
2355 m = (typeof(m)){"LPX1000", "PCI-X",
2356 "Obsolete, Unsupported Fibre Channel Adapter"};
2357 break;
2358 case PCI_DEVICE_ID_PFLY:
2359 m = (typeof(m)){"LP982", "PCI-X",
2360 "Obsolete, Unsupported Fibre Channel Adapter"};
2361 break;
2362 case PCI_DEVICE_ID_TFLY:
2363 m = (typeof(m)){"LP1050", "PCI-X",
2364 "Obsolete, Unsupported Fibre Channel Adapter"};
2365 break;
2366 case PCI_DEVICE_ID_HELIOS:
2367 m = (typeof(m)){"LP11000", "PCI-X2",
2368 "Obsolete, Unsupported Fibre Channel Adapter"};
2369 break;
2370 case PCI_DEVICE_ID_HELIOS_SCSP:
2371 m = (typeof(m)){"LP11000-SP", "PCI-X2",
2372 "Obsolete, Unsupported Fibre Channel Adapter"};
2373 break;
2374 case PCI_DEVICE_ID_HELIOS_DCSP:
2375 m = (typeof(m)){"LP11002-SP", "PCI-X2",
2376 "Obsolete, Unsupported Fibre Channel Adapter"};
2377 break;
2378 case PCI_DEVICE_ID_NEPTUNE:
2379 m = (typeof(m)){"LPe1000", "PCIe",
2380 "Obsolete, Unsupported Fibre Channel Adapter"};
2381 break;
2382 case PCI_DEVICE_ID_NEPTUNE_SCSP:
2383 m = (typeof(m)){"LPe1000-SP", "PCIe",
2384 "Obsolete, Unsupported Fibre Channel Adapter"};
2385 break;
2386 case PCI_DEVICE_ID_NEPTUNE_DCSP:
2387 m = (typeof(m)){"LPe1002-SP", "PCIe",
2388 "Obsolete, Unsupported Fibre Channel Adapter"};
2389 break;
2390 case PCI_DEVICE_ID_BMID:
2391 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
2392 break;
2393 case PCI_DEVICE_ID_BSMB:
2394 m = (typeof(m)){"LP111", "PCI-X2",
2395 "Obsolete, Unsupported Fibre Channel Adapter"};
2396 break;
2397 case PCI_DEVICE_ID_ZEPHYR:
2398 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2399 break;
2400 case PCI_DEVICE_ID_ZEPHYR_SCSP:
2401 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
2402 break;
2403 case PCI_DEVICE_ID_ZEPHYR_DCSP:
2404 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
2405 GE = 1;
2406 break;
2407 case PCI_DEVICE_ID_ZMID:
2408 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
2409 break;
2410 case PCI_DEVICE_ID_ZSMB:
2411 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
2412 break;
2413 case PCI_DEVICE_ID_LP101:
2414 m = (typeof(m)){"LP101", "PCI-X",
2415 "Obsolete, Unsupported Fibre Channel Adapter"};
2416 break;
2417 case PCI_DEVICE_ID_LP10000S:
2418 m = (typeof(m)){"LP10000-S", "PCI",
2419 "Obsolete, Unsupported Fibre Channel Adapter"};
2420 break;
2421 case PCI_DEVICE_ID_LP11000S:
2422 m = (typeof(m)){"LP11000-S", "PCI-X2",
2423 "Obsolete, Unsupported Fibre Channel Adapter"};
2424 break;
2425 case PCI_DEVICE_ID_LPE11000S:
2426 m = (typeof(m)){"LPe11000-S", "PCIe",
2427 "Obsolete, Unsupported Fibre Channel Adapter"};
2428 break;
2429 case PCI_DEVICE_ID_SAT:
2430 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
2431 break;
2432 case PCI_DEVICE_ID_SAT_MID:
2433 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
2434 break;
2435 case PCI_DEVICE_ID_SAT_SMB:
2436 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
2437 break;
2438 case PCI_DEVICE_ID_SAT_DCSP:
2439 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
2440 break;
2441 case PCI_DEVICE_ID_SAT_SCSP:
2442 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
2443 break;
2444 case PCI_DEVICE_ID_SAT_S:
2445 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
2446 break;
2447 case PCI_DEVICE_ID_HORNET:
2448 m = (typeof(m)){"LP21000", "PCIe",
2449 "Obsolete, Unsupported FCoE Adapter"};
2450 GE = 1;
2451 break;
2452 case PCI_DEVICE_ID_PROTEUS_VF:
2453 m = (typeof(m)){"LPev12000", "PCIe IOV",
2454 "Obsolete, Unsupported Fibre Channel Adapter"};
2455 break;
2456 case PCI_DEVICE_ID_PROTEUS_PF:
2457 m = (typeof(m)){"LPev12000", "PCIe IOV",
2458 "Obsolete, Unsupported Fibre Channel Adapter"};
2459 break;
2460 case PCI_DEVICE_ID_PROTEUS_S:
2461 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
2462 "Obsolete, Unsupported Fibre Channel Adapter"};
2463 break;
2464 case PCI_DEVICE_ID_TIGERSHARK:
2465 oneConnect = 1;
2466 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
2467 break;
2468 case PCI_DEVICE_ID_TOMCAT:
2469 oneConnect = 1;
2470 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
2471 break;
2472 case PCI_DEVICE_ID_FALCON:
2473 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2474 "EmulexSecure Fibre"};
2475 break;
2476 case PCI_DEVICE_ID_BALIUS:
2477 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
2478 "Obsolete, Unsupported Fibre Channel Adapter"};
2479 break;
2480 case PCI_DEVICE_ID_LANCER_FC:
2481 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
2482 break;
2483 case PCI_DEVICE_ID_LANCER_FC_VF:
2484 m = (typeof(m)){"LPe16000", "PCIe",
2485 "Obsolete, Unsupported Fibre Channel Adapter"};
2486 break;
2487 case PCI_DEVICE_ID_LANCER_FCOE:
2488 oneConnect = 1;
2489 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
2490 break;
2491 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2492 oneConnect = 1;
2493 m = (typeof(m)){"OCe15100", "PCIe",
2494 "Obsolete, Unsupported FCoE"};
2495 break;
2496 case PCI_DEVICE_ID_LANCER_G6_FC:
2497 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2498 break;
2499 case PCI_DEVICE_ID_LANCER_G7_FC:
2500 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
2501 break;
2502 case PCI_DEVICE_ID_SKYHAWK:
2503 case PCI_DEVICE_ID_SKYHAWK_VF:
2504 oneConnect = 1;
2505 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
2506 break;
2507 default:
2508 m = (typeof(m)){"Unknown", "", ""};
2509 break;
2510 }
2511
2512 if (mdp && mdp[0] == '\0')
2513 snprintf(mdp, 79,"%s", m.name);
2514 /*
2515 * oneConnect hba requires special processing, they are all initiators
2516 * and we put the port number on the end
2517 */
2518 if (descp && descp[0] == '\0') {
2519 if (oneConnect)
2520 snprintf(descp, 255,
2521 "Emulex OneConnect %s, %s Initiator %s",
2522 m.name, m.function,
2523 phba->Port);
2524 else if (max_speed == 0)
2525 snprintf(descp, 255,
2526 "Emulex %s %s %s",
2527 m.name, m.bus, m.function);
2528 else
2529 snprintf(descp, 255,
2530 "Emulex %s %d%s %s %s",
2531 m.name, max_speed, (GE) ? "GE" : "Gb",
2532 m.bus, m.function);
2533 }
2534}
2535
2536/**
2537 * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
2538 * @phba: pointer to lpfc hba data structure.
2539 * @pring: pointer to a IOCB ring.
2540 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2541 *
2542 * This routine posts a given number of IOCBs with the associated DMA buffer
2543 * descriptors specified by the cnt argument to the given IOCB ring.
2544 *
2545 * Return codes
2546 * The number of IOCBs NOT able to be posted to the IOCB ring.
2547 **/
2548int
2549lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
2550{
2551 IOCB_t *icmd;
2552 struct lpfc_iocbq *iocb;
2553 struct lpfc_dmabuf *mp1, *mp2;
2554
2555 cnt += pring->missbufcnt;
2556
2557 /* While there are buffers to post */
2558 while (cnt > 0) {
2559 /* Allocate buffer for command iocb */
2560 iocb = lpfc_sli_get_iocbq(phba);
2561 if (iocb == NULL) {
2562 pring->missbufcnt = cnt;
2563 return cnt;
2564 }
2565 icmd = &iocb->iocb;
2566
2567 /* 2 buffers can be posted per command */
2568 /* Allocate buffer to post */
2569 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2570 if (mp1)
2571 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2572 if (!mp1 || !mp1->virt) {
2573 kfree(mp1);
2574 lpfc_sli_release_iocbq(phba, iocb);
2575 pring->missbufcnt = cnt;
2576 return cnt;
2577 }
2578
2579 INIT_LIST_HEAD(&mp1->list);
2580 /* Allocate buffer to post */
2581 if (cnt > 1) {
2582 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2583 if (mp2)
2584 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2585 &mp2->phys);
2586 if (!mp2 || !mp2->virt) {
2587 kfree(mp2);
2588 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2589 kfree(mp1);
2590 lpfc_sli_release_iocbq(phba, iocb);
2591 pring->missbufcnt = cnt;
2592 return cnt;
2593 }
2594
2595 INIT_LIST_HEAD(&mp2->list);
2596 } else {
2597 mp2 = NULL;
2598 }
2599
2600 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2601 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2602 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2603 icmd->ulpBdeCount = 1;
2604 cnt--;
2605 if (mp2) {
2606 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2607 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2608 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2609 cnt--;
2610 icmd->ulpBdeCount = 2;
2611 }
2612
2613 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2614 icmd->ulpLe = 1;
2615
2616 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2617 IOCB_ERROR) {
2618 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2619 kfree(mp1);
2620 cnt++;
2621 if (mp2) {
2622 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2623 kfree(mp2);
2624 cnt++;
2625 }
2626 lpfc_sli_release_iocbq(phba, iocb);
2627 pring->missbufcnt = cnt;
2628 return cnt;
2629 }
2630 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
2631 if (mp2)
2632 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
2633 }
2634 pring->missbufcnt = 0;
2635 return 0;
2636}
2637
2638/**
2639 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
2640 * @phba: pointer to lpfc hba data structure.
2641 *
2642 * This routine posts initial receive IOCB buffers to the ELS ring. The
2643 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
2644 * set to 64 IOCBs. SLI3 only.
2645 *
2646 * Return codes
2647 * 0 - success (currently always success)
2648 **/
2649static int
2650lpfc_post_rcv_buf(struct lpfc_hba *phba)
2651{
2652 struct lpfc_sli *psli = &phba->sli;
2653
2654 /* Ring 0, ELS / CT buffers */
2655 lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
2656 /* Ring 2 - FCP no buffers needed */
2657
2658 return 0;
2659}
2660
2661#define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2662
2663/**
2664 * lpfc_sha_init - Set up initial array of hash table entries
2665 * @HashResultPointer: pointer to an array as hash table.
2666 *
2667 * This routine sets up the initial values to the array of hash table entries
2668 * for the LC HBAs.
2669 **/
2670static void
2671lpfc_sha_init(uint32_t * HashResultPointer)
2672{
2673 HashResultPointer[0] = 0x67452301;
2674 HashResultPointer[1] = 0xEFCDAB89;
2675 HashResultPointer[2] = 0x98BADCFE;
2676 HashResultPointer[3] = 0x10325476;
2677 HashResultPointer[4] = 0xC3D2E1F0;
2678}
2679
2680/**
2681 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
2682 * @HashResultPointer: pointer to an initial/result hash table.
2683 * @HashWorkingPointer: pointer to an working hash table.
2684 *
2685 * This routine iterates an initial hash table pointed by @HashResultPointer
2686 * with the values from the working hash table pointeed by @HashWorkingPointer.
2687 * The results are putting back to the initial hash table, returned through
2688 * the @HashResultPointer as the result hash table.
2689 **/
2690static void
2691lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2692{
2693 int t;
2694 uint32_t TEMP;
2695 uint32_t A, B, C, D, E;
2696 t = 16;
2697 do {
2698 HashWorkingPointer[t] =
2699 S(1,
2700 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2701 8] ^
2702 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2703 } while (++t <= 79);
2704 t = 0;
2705 A = HashResultPointer[0];
2706 B = HashResultPointer[1];
2707 C = HashResultPointer[2];
2708 D = HashResultPointer[3];
2709 E = HashResultPointer[4];
2710
2711 do {
2712 if (t < 20) {
2713 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2714 } else if (t < 40) {
2715 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2716 } else if (t < 60) {
2717 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2718 } else {
2719 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2720 }
2721 TEMP += S(5, A) + E + HashWorkingPointer[t];
2722 E = D;
2723 D = C;
2724 C = S(30, B);
2725 B = A;
2726 A = TEMP;
2727 } while (++t <= 79);
2728
2729 HashResultPointer[0] += A;
2730 HashResultPointer[1] += B;
2731 HashResultPointer[2] += C;
2732 HashResultPointer[3] += D;
2733 HashResultPointer[4] += E;
2734
2735}
2736
2737/**
2738 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
2739 * @RandomChallenge: pointer to the entry of host challenge random number array.
2740 * @HashWorking: pointer to the entry of the working hash array.
2741 *
2742 * This routine calculates the working hash array referred by @HashWorking
2743 * from the challenge random numbers associated with the host, referred by
2744 * @RandomChallenge. The result is put into the entry of the working hash
2745 * array and returned by reference through @HashWorking.
2746 **/
2747static void
2748lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
2749{
2750 *HashWorking = (*RandomChallenge ^ *HashWorking);
2751}
2752
2753/**
2754 * lpfc_hba_init - Perform special handling for LC HBA initialization
2755 * @phba: pointer to lpfc hba data structure.
2756 * @hbainit: pointer to an array of unsigned 32-bit integers.
2757 *
2758 * This routine performs the special handling for LC HBA initialization.
2759 **/
2760void
2761lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
2762{
2763 int t;
2764 uint32_t *HashWorking;
2765 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
2766
2767 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
2768 if (!HashWorking)
2769 return;
2770
2771 HashWorking[0] = HashWorking[78] = *pwwnn++;
2772 HashWorking[1] = HashWorking[79] = *pwwnn;
2773
2774 for (t = 0; t < 7; t++)
2775 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
2776
2777 lpfc_sha_init(hbainit);
2778 lpfc_sha_iterate(hbainit, HashWorking);
2779 kfree(HashWorking);
2780}
2781
2782/**
2783 * lpfc_cleanup - Performs vport cleanups before deleting a vport
2784 * @vport: pointer to a virtual N_Port data structure.
2785 *
2786 * This routine performs the necessary cleanups before deleting the @vport.
2787 * It invokes the discovery state machine to perform necessary state
2788 * transitions and to release the ndlps associated with the @vport. Note,
2789 * the physical port is treated as @vport 0.
2790 **/
2791void
2792lpfc_cleanup(struct lpfc_vport *vport)
2793{
2794 struct lpfc_hba *phba = vport->phba;
2795 struct lpfc_nodelist *ndlp, *next_ndlp;
2796 int i = 0;
2797
2798 if (phba->link_state > LPFC_LINK_DOWN)
2799 lpfc_port_link_failure(vport);
2800
2801 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
2802 if (!NLP_CHK_NODE_ACT(ndlp)) {
2803 ndlp = lpfc_enable_node(vport, ndlp,
2804 NLP_STE_UNUSED_NODE);
2805 if (!ndlp)
2806 continue;
2807 spin_lock_irq(&phba->ndlp_lock);
2808 NLP_SET_FREE_REQ(ndlp);
2809 spin_unlock_irq(&phba->ndlp_lock);
2810 /* Trigger the release of the ndlp memory */
2811 lpfc_nlp_put(ndlp);
2812 continue;
2813 }
2814 spin_lock_irq(&phba->ndlp_lock);
2815 if (NLP_CHK_FREE_REQ(ndlp)) {
2816 /* The ndlp should not be in memory free mode already */
2817 spin_unlock_irq(&phba->ndlp_lock);
2818 continue;
2819 } else
2820 /* Indicate request for freeing ndlp memory */
2821 NLP_SET_FREE_REQ(ndlp);
2822 spin_unlock_irq(&phba->ndlp_lock);
2823
2824 if (vport->port_type != LPFC_PHYSICAL_PORT &&
2825 ndlp->nlp_DID == Fabric_DID) {
2826 /* Just free up ndlp with Fabric_DID for vports */
2827 lpfc_nlp_put(ndlp);
2828 continue;
2829 }
2830
2831 /* take care of nodes in unused state before the state
2832 * machine taking action.
2833 */
2834 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
2835 lpfc_nlp_put(ndlp);
2836 continue;
2837 }
2838
2839 if (ndlp->nlp_type & NLP_FABRIC)
2840 lpfc_disc_state_machine(vport, ndlp, NULL,
2841 NLP_EVT_DEVICE_RECOVERY);
2842
2843 lpfc_disc_state_machine(vport, ndlp, NULL,
2844 NLP_EVT_DEVICE_RM);
2845 }
2846
2847 /* At this point, ALL ndlp's should be gone
2848 * because of the previous NLP_EVT_DEVICE_RM.
2849 * Lets wait for this to happen, if needed.
2850 */
2851 while (!list_empty(&vport->fc_nodes)) {
2852 if (i++ > 3000) {
2853 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY,
2854 "0233 Nodelist not empty\n");
2855 list_for_each_entry_safe(ndlp, next_ndlp,
2856 &vport->fc_nodes, nlp_listp) {
2857 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
2858 LOG_NODE,
David Brazdil0f672f62019-12-10 10:32:29 +00002859 "0282 did:x%x ndlp:x%px "
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002860 "usgmap:x%x refcnt:%d\n",
2861 ndlp->nlp_DID, (void *)ndlp,
2862 ndlp->nlp_usg_map,
2863 kref_read(&ndlp->kref));
2864 }
2865 break;
2866 }
2867
2868 /* Wait for any activity on ndlps to settle */
2869 msleep(10);
2870 }
2871 lpfc_cleanup_vports_rrqs(vport, NULL);
2872}
2873
2874/**
2875 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
2876 * @vport: pointer to a virtual N_Port data structure.
2877 *
2878 * This routine stops all the timers associated with a @vport. This function
2879 * is invoked before disabling or deleting a @vport. Note that the physical
2880 * port is treated as @vport 0.
2881 **/
2882void
2883lpfc_stop_vport_timers(struct lpfc_vport *vport)
2884{
2885 del_timer_sync(&vport->els_tmofunc);
2886 del_timer_sync(&vport->delayed_disc_tmo);
2887 lpfc_can_disctmo(vport);
2888 return;
2889}
2890
2891/**
2892 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2893 * @phba: pointer to lpfc hba data structure.
2894 *
2895 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
2896 * caller of this routine should already hold the host lock.
2897 **/
2898void
2899__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2900{
2901 /* Clear pending FCF rediscovery wait flag */
2902 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
2903
2904 /* Now, try to stop the timer */
2905 del_timer(&phba->fcf.redisc_wait);
2906}
2907
2908/**
2909 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
2910 * @phba: pointer to lpfc hba data structure.
2911 *
2912 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
2913 * checks whether the FCF rediscovery wait timer is pending with the host
2914 * lock held before proceeding with disabling the timer and clearing the
2915 * wait timer pendig flag.
2916 **/
2917void
2918lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
2919{
2920 spin_lock_irq(&phba->hbalock);
2921 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
2922 /* FCF rediscovery timer already fired or stopped */
2923 spin_unlock_irq(&phba->hbalock);
2924 return;
2925 }
2926 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
2927 /* Clear failover in progress flags */
2928 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
2929 spin_unlock_irq(&phba->hbalock);
2930}
2931
2932/**
2933 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
2934 * @phba: pointer to lpfc hba data structure.
2935 *
2936 * This routine stops all the timers associated with a HBA. This function is
2937 * invoked before either putting a HBA offline or unloading the driver.
2938 **/
2939void
2940lpfc_stop_hba_timers(struct lpfc_hba *phba)
2941{
David Brazdil0f672f62019-12-10 10:32:29 +00002942 if (phba->pport)
2943 lpfc_stop_vport_timers(phba->pport);
2944 cancel_delayed_work_sync(&phba->eq_delay_work);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002945 del_timer_sync(&phba->sli.mbox_tmo);
2946 del_timer_sync(&phba->fabric_block_timer);
2947 del_timer_sync(&phba->eratt_poll);
2948 del_timer_sync(&phba->hb_tmofunc);
2949 if (phba->sli_rev == LPFC_SLI_REV4) {
2950 del_timer_sync(&phba->rrq_tmr);
2951 phba->hba_flag &= ~HBA_RRQ_ACTIVE;
2952 }
2953 phba->hb_outstanding = 0;
2954
2955 switch (phba->pci_dev_grp) {
2956 case LPFC_PCI_DEV_LP:
2957 /* Stop any LightPulse device specific driver timers */
2958 del_timer_sync(&phba->fcp_poll_timer);
2959 break;
2960 case LPFC_PCI_DEV_OC:
David Brazdil0f672f62019-12-10 10:32:29 +00002961 /* Stop any OneConnect device specific driver timers */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002962 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
2963 break;
2964 default:
2965 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
2966 "0297 Invalid device group (x%x)\n",
2967 phba->pci_dev_grp);
2968 break;
2969 }
2970 return;
2971}
2972
2973/**
2974 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
2975 * @phba: pointer to lpfc hba data structure.
2976 *
2977 * This routine marks a HBA's management interface as blocked. Once the HBA's
2978 * management interface is marked as blocked, all the user space access to
2979 * the HBA, whether they are from sysfs interface or libdfc interface will
2980 * all be blocked. The HBA is set to block the management interface when the
2981 * driver prepares the HBA interface for online or offline.
2982 **/
2983static void
2984lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
2985{
2986 unsigned long iflag;
2987 uint8_t actcmd = MBX_HEARTBEAT;
2988 unsigned long timeout;
2989
2990 spin_lock_irqsave(&phba->hbalock, iflag);
2991 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
2992 spin_unlock_irqrestore(&phba->hbalock, iflag);
2993 if (mbx_action == LPFC_MBX_NO_WAIT)
2994 return;
2995 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
2996 spin_lock_irqsave(&phba->hbalock, iflag);
2997 if (phba->sli.mbox_active) {
2998 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
2999 /* Determine how long we might wait for the active mailbox
3000 * command to be gracefully completed by firmware.
3001 */
3002 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
3003 phba->sli.mbox_active) * 1000) + jiffies;
3004 }
3005 spin_unlock_irqrestore(&phba->hbalock, iflag);
3006
3007 /* Wait for the outstnading mailbox command to complete */
3008 while (phba->sli.mbox_active) {
3009 /* Check active mailbox complete status every 2ms */
3010 msleep(2);
3011 if (time_after(jiffies, timeout)) {
3012 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3013 "2813 Mgmt IO is Blocked %x "
3014 "- mbox cmd %x still active\n",
3015 phba->sli.sli_flag, actcmd);
3016 break;
3017 }
3018 }
3019}
3020
3021/**
3022 * lpfc_sli4_node_prep - Assign RPIs for active nodes.
3023 * @phba: pointer to lpfc hba data structure.
3024 *
3025 * Allocate RPIs for all active remote nodes. This is needed whenever
3026 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
3027 * is to fixup the temporary rpi assignments.
3028 **/
3029void
3030lpfc_sli4_node_prep(struct lpfc_hba *phba)
3031{
3032 struct lpfc_nodelist *ndlp, *next_ndlp;
3033 struct lpfc_vport **vports;
3034 int i, rpi;
3035 unsigned long flags;
3036
3037 if (phba->sli_rev != LPFC_SLI_REV4)
3038 return;
3039
3040 vports = lpfc_create_vport_work_array(phba);
3041 if (vports == NULL)
3042 return;
3043
3044 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3045 if (vports[i]->load_flag & FC_UNLOADING)
3046 continue;
3047
3048 list_for_each_entry_safe(ndlp, next_ndlp,
3049 &vports[i]->fc_nodes,
3050 nlp_listp) {
3051 if (!NLP_CHK_NODE_ACT(ndlp))
3052 continue;
3053 rpi = lpfc_sli4_alloc_rpi(phba);
3054 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3055 spin_lock_irqsave(&phba->ndlp_lock, flags);
3056 NLP_CLR_NODE_ACT(ndlp);
3057 spin_unlock_irqrestore(&phba->ndlp_lock, flags);
3058 continue;
3059 }
3060 ndlp->nlp_rpi = rpi;
3061 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE,
3062 "0009 rpi:%x DID:%x "
David Brazdil0f672f62019-12-10 10:32:29 +00003063 "flg:%x map:%x x%px\n", ndlp->nlp_rpi,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003064 ndlp->nlp_DID, ndlp->nlp_flag,
3065 ndlp->nlp_usg_map, ndlp);
3066 }
3067 }
3068 lpfc_destroy_vport_work_array(phba, vports);
3069}
3070
3071/**
David Brazdil0f672f62019-12-10 10:32:29 +00003072 * lpfc_create_expedite_pool - create expedite pool
3073 * @phba: pointer to lpfc hba data structure.
3074 *
3075 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
3076 * to expedite pool. Mark them as expedite.
3077 **/
3078static void lpfc_create_expedite_pool(struct lpfc_hba *phba)
3079{
3080 struct lpfc_sli4_hdw_queue *qp;
3081 struct lpfc_io_buf *lpfc_ncmd;
3082 struct lpfc_io_buf *lpfc_ncmd_next;
3083 struct lpfc_epd_pool *epd_pool;
3084 unsigned long iflag;
3085
3086 epd_pool = &phba->epd_pool;
3087 qp = &phba->sli4_hba.hdwq[0];
3088
3089 spin_lock_init(&epd_pool->lock);
3090 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3091 spin_lock(&epd_pool->lock);
3092 INIT_LIST_HEAD(&epd_pool->list);
3093 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3094 &qp->lpfc_io_buf_list_put, list) {
3095 list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
3096 lpfc_ncmd->expedite = true;
3097 qp->put_io_bufs--;
3098 epd_pool->count++;
3099 if (epd_pool->count >= XRI_BATCH)
3100 break;
3101 }
3102 spin_unlock(&epd_pool->lock);
3103 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3104}
3105
3106/**
3107 * lpfc_destroy_expedite_pool - destroy expedite pool
3108 * @phba: pointer to lpfc hba data structure.
3109 *
3110 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
3111 * of HWQ 0. Clear the mark.
3112 **/
3113static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
3114{
3115 struct lpfc_sli4_hdw_queue *qp;
3116 struct lpfc_io_buf *lpfc_ncmd;
3117 struct lpfc_io_buf *lpfc_ncmd_next;
3118 struct lpfc_epd_pool *epd_pool;
3119 unsigned long iflag;
3120
3121 epd_pool = &phba->epd_pool;
3122 qp = &phba->sli4_hba.hdwq[0];
3123
3124 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3125 spin_lock(&epd_pool->lock);
3126 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3127 &epd_pool->list, list) {
3128 list_move_tail(&lpfc_ncmd->list,
3129 &qp->lpfc_io_buf_list_put);
3130 lpfc_ncmd->flags = false;
3131 qp->put_io_bufs++;
3132 epd_pool->count--;
3133 }
3134 spin_unlock(&epd_pool->lock);
3135 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3136}
3137
3138/**
3139 * lpfc_create_multixri_pools - create multi-XRI pools
3140 * @phba: pointer to lpfc hba data structure.
3141 *
3142 * This routine initialize public, private per HWQ. Then, move XRIs from
3143 * lpfc_io_buf_list_put to public pool. High and low watermark are also
3144 * Initialized.
3145 **/
3146void lpfc_create_multixri_pools(struct lpfc_hba *phba)
3147{
3148 u32 i, j;
3149 u32 hwq_count;
3150 u32 count_per_hwq;
3151 struct lpfc_io_buf *lpfc_ncmd;
3152 struct lpfc_io_buf *lpfc_ncmd_next;
3153 unsigned long iflag;
3154 struct lpfc_sli4_hdw_queue *qp;
3155 struct lpfc_multixri_pool *multixri_pool;
3156 struct lpfc_pbl_pool *pbl_pool;
3157 struct lpfc_pvt_pool *pvt_pool;
3158
3159 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3160 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
3161 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3162 phba->sli4_hba.io_xri_cnt);
3163
3164 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3165 lpfc_create_expedite_pool(phba);
3166
3167 hwq_count = phba->cfg_hdw_queue;
3168 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3169
3170 for (i = 0; i < hwq_count; i++) {
3171 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL);
3172
3173 if (!multixri_pool) {
3174 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3175 "1238 Failed to allocate memory for "
3176 "multixri_pool\n");
3177
3178 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3179 lpfc_destroy_expedite_pool(phba);
3180
3181 j = 0;
3182 while (j < i) {
3183 qp = &phba->sli4_hba.hdwq[j];
3184 kfree(qp->p_multixri_pool);
3185 j++;
3186 }
3187 phba->cfg_xri_rebalancing = 0;
3188 return;
3189 }
3190
3191 qp = &phba->sli4_hba.hdwq[i];
3192 qp->p_multixri_pool = multixri_pool;
3193
3194 multixri_pool->xri_limit = count_per_hwq;
3195 multixri_pool->rrb_next_hwqid = i;
3196
3197 /* Deal with public free xri pool */
3198 pbl_pool = &multixri_pool->pbl_pool;
3199 spin_lock_init(&pbl_pool->lock);
3200 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3201 spin_lock(&pbl_pool->lock);
3202 INIT_LIST_HEAD(&pbl_pool->list);
3203 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3204 &qp->lpfc_io_buf_list_put, list) {
3205 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
3206 qp->put_io_bufs--;
3207 pbl_pool->count++;
3208 }
3209 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3210 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
3211 pbl_pool->count, i);
3212 spin_unlock(&pbl_pool->lock);
3213 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3214
3215 /* Deal with private free xri pool */
3216 pvt_pool = &multixri_pool->pvt_pool;
3217 pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
3218 pvt_pool->low_watermark = XRI_BATCH;
3219 spin_lock_init(&pvt_pool->lock);
3220 spin_lock_irqsave(&pvt_pool->lock, iflag);
3221 INIT_LIST_HEAD(&pvt_pool->list);
3222 pvt_pool->count = 0;
3223 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
3224 }
3225}
3226
3227/**
3228 * lpfc_destroy_multixri_pools - destroy multi-XRI pools
3229 * @phba: pointer to lpfc hba data structure.
3230 *
3231 * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
3232 **/
3233static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
3234{
3235 u32 i;
3236 u32 hwq_count;
3237 struct lpfc_io_buf *lpfc_ncmd;
3238 struct lpfc_io_buf *lpfc_ncmd_next;
3239 unsigned long iflag;
3240 struct lpfc_sli4_hdw_queue *qp;
3241 struct lpfc_multixri_pool *multixri_pool;
3242 struct lpfc_pbl_pool *pbl_pool;
3243 struct lpfc_pvt_pool *pvt_pool;
3244
3245 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3246 lpfc_destroy_expedite_pool(phba);
3247
3248 if (!(phba->pport->load_flag & FC_UNLOADING))
3249 lpfc_sli_flush_io_rings(phba);
3250
3251 hwq_count = phba->cfg_hdw_queue;
3252
3253 for (i = 0; i < hwq_count; i++) {
3254 qp = &phba->sli4_hba.hdwq[i];
3255 multixri_pool = qp->p_multixri_pool;
3256 if (!multixri_pool)
3257 continue;
3258
3259 qp->p_multixri_pool = NULL;
3260
3261 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3262
3263 /* Deal with public free xri pool */
3264 pbl_pool = &multixri_pool->pbl_pool;
3265 spin_lock(&pbl_pool->lock);
3266
3267 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3268 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
3269 pbl_pool->count, i);
3270
3271 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3272 &pbl_pool->list, list) {
3273 list_move_tail(&lpfc_ncmd->list,
3274 &qp->lpfc_io_buf_list_put);
3275 qp->put_io_bufs++;
3276 pbl_pool->count--;
3277 }
3278
3279 INIT_LIST_HEAD(&pbl_pool->list);
3280 pbl_pool->count = 0;
3281
3282 spin_unlock(&pbl_pool->lock);
3283
3284 /* Deal with private free xri pool */
3285 pvt_pool = &multixri_pool->pvt_pool;
3286 spin_lock(&pvt_pool->lock);
3287
3288 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3289 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
3290 pvt_pool->count, i);
3291
3292 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3293 &pvt_pool->list, list) {
3294 list_move_tail(&lpfc_ncmd->list,
3295 &qp->lpfc_io_buf_list_put);
3296 qp->put_io_bufs++;
3297 pvt_pool->count--;
3298 }
3299
3300 INIT_LIST_HEAD(&pvt_pool->list);
3301 pvt_pool->count = 0;
3302
3303 spin_unlock(&pvt_pool->lock);
3304 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3305
3306 kfree(multixri_pool);
3307 }
3308}
3309
3310/**
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003311 * lpfc_online - Initialize and bring a HBA online
3312 * @phba: pointer to lpfc hba data structure.
3313 *
3314 * This routine initializes the HBA and brings a HBA online. During this
3315 * process, the management interface is blocked to prevent user space access
3316 * to the HBA interfering with the driver initialization.
3317 *
3318 * Return codes
3319 * 0 - successful
3320 * 1 - failed
3321 **/
3322int
3323lpfc_online(struct lpfc_hba *phba)
3324{
3325 struct lpfc_vport *vport;
3326 struct lpfc_vport **vports;
3327 int i, error = 0;
3328 bool vpis_cleared = false;
3329
3330 if (!phba)
3331 return 0;
3332 vport = phba->pport;
3333
3334 if (!(vport->fc_flag & FC_OFFLINE_MODE))
3335 return 0;
3336
3337 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3338 "0458 Bring Adapter online\n");
3339
3340 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
3341
3342 if (phba->sli_rev == LPFC_SLI_REV4) {
3343 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3344 lpfc_unblock_mgmt_io(phba);
3345 return 1;
3346 }
3347 spin_lock_irq(&phba->hbalock);
3348 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3349 vpis_cleared = true;
3350 spin_unlock_irq(&phba->hbalock);
3351
3352 /* Reestablish the local initiator port.
3353 * The offline process destroyed the previous lport.
3354 */
3355 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3356 !phba->nvmet_support) {
3357 error = lpfc_nvme_create_localport(phba->pport);
3358 if (error)
3359 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
3360 "6132 NVME restore reg failed "
3361 "on nvmei error x%x\n", error);
3362 }
3363 } else {
3364 lpfc_sli_queue_init(phba);
3365 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3366 lpfc_unblock_mgmt_io(phba);
3367 return 1;
3368 }
3369 }
3370
3371 vports = lpfc_create_vport_work_array(phba);
3372 if (vports != NULL) {
3373 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3374 struct Scsi_Host *shost;
3375 shost = lpfc_shost_from_vport(vports[i]);
3376 spin_lock_irq(shost->host_lock);
3377 vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
3378 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3379 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3380 if (phba->sli_rev == LPFC_SLI_REV4) {
3381 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
3382 if ((vpis_cleared) &&
3383 (vports[i]->port_type !=
3384 LPFC_PHYSICAL_PORT))
3385 vports[i]->vpi = 0;
3386 }
3387 spin_unlock_irq(shost->host_lock);
3388 }
3389 }
3390 lpfc_destroy_vport_work_array(phba, vports);
3391
David Brazdil0f672f62019-12-10 10:32:29 +00003392 if (phba->cfg_xri_rebalancing)
3393 lpfc_create_multixri_pools(phba);
3394
Olivier Deprez0e641232021-09-23 10:07:05 +02003395 lpfc_cpuhp_add(phba);
3396
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003397 lpfc_unblock_mgmt_io(phba);
3398 return 0;
3399}
3400
3401/**
3402 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
3403 * @phba: pointer to lpfc hba data structure.
3404 *
3405 * This routine marks a HBA's management interface as not blocked. Once the
3406 * HBA's management interface is marked as not blocked, all the user space
3407 * access to the HBA, whether they are from sysfs interface or libdfc
3408 * interface will be allowed. The HBA is set to block the management interface
3409 * when the driver prepares the HBA interface for online or offline and then
3410 * set to unblock the management interface afterwards.
3411 **/
3412void
3413lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3414{
3415 unsigned long iflag;
3416
3417 spin_lock_irqsave(&phba->hbalock, iflag);
3418 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3419 spin_unlock_irqrestore(&phba->hbalock, iflag);
3420}
3421
3422/**
3423 * lpfc_offline_prep - Prepare a HBA to be brought offline
3424 * @phba: pointer to lpfc hba data structure.
3425 *
3426 * This routine is invoked to prepare a HBA to be brought offline. It performs
3427 * unregistration login to all the nodes on all vports and flushes the mailbox
3428 * queue to make it ready to be brought offline.
3429 **/
3430void
3431lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
3432{
3433 struct lpfc_vport *vport = phba->pport;
3434 struct lpfc_nodelist *ndlp, *next_ndlp;
3435 struct lpfc_vport **vports;
3436 struct Scsi_Host *shost;
3437 int i;
3438
3439 if (vport->fc_flag & FC_OFFLINE_MODE)
3440 return;
3441
3442 lpfc_block_mgmt_io(phba, mbx_action);
3443
3444 lpfc_linkdown(phba);
3445
3446 /* Issue an unreg_login to all nodes on all vports */
3447 vports = lpfc_create_vport_work_array(phba);
3448 if (vports != NULL) {
3449 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3450 if (vports[i]->load_flag & FC_UNLOADING)
3451 continue;
3452 shost = lpfc_shost_from_vport(vports[i]);
3453 spin_lock_irq(shost->host_lock);
3454 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
3455 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
3456 vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
3457 spin_unlock_irq(shost->host_lock);
3458
3459 shost = lpfc_shost_from_vport(vports[i]);
3460 list_for_each_entry_safe(ndlp, next_ndlp,
3461 &vports[i]->fc_nodes,
3462 nlp_listp) {
3463 if (!NLP_CHK_NODE_ACT(ndlp))
3464 continue;
3465 if (ndlp->nlp_state == NLP_STE_UNUSED_NODE)
3466 continue;
3467 if (ndlp->nlp_type & NLP_FABRIC) {
3468 lpfc_disc_state_machine(vports[i], ndlp,
3469 NULL, NLP_EVT_DEVICE_RECOVERY);
3470 lpfc_disc_state_machine(vports[i], ndlp,
3471 NULL, NLP_EVT_DEVICE_RM);
3472 }
3473 spin_lock_irq(shost->host_lock);
3474 ndlp->nlp_flag &= ~NLP_NPR_ADISC;
3475 spin_unlock_irq(shost->host_lock);
3476 /*
3477 * Whenever an SLI4 port goes offline, free the
3478 * RPI. Get a new RPI when the adapter port
3479 * comes back online.
3480 */
3481 if (phba->sli_rev == LPFC_SLI_REV4) {
3482 lpfc_printf_vlog(ndlp->vport,
3483 KERN_INFO, LOG_NODE,
3484 "0011 lpfc_offline: "
David Brazdil0f672f62019-12-10 10:32:29 +00003485 "ndlp:x%px did %x "
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003486 "usgmap:x%x rpi:%x\n",
3487 ndlp, ndlp->nlp_DID,
3488 ndlp->nlp_usg_map,
3489 ndlp->nlp_rpi);
3490
3491 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
3492 }
3493 lpfc_unreg_rpi(vports[i], ndlp);
3494 }
3495 }
3496 }
3497 lpfc_destroy_vport_work_array(phba, vports);
3498
3499 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
3500
3501 if (phba->wq)
3502 flush_workqueue(phba->wq);
3503}
3504
3505/**
3506 * lpfc_offline - Bring a HBA offline
3507 * @phba: pointer to lpfc hba data structure.
3508 *
3509 * This routine actually brings a HBA offline. It stops all the timers
3510 * associated with the HBA, brings down the SLI layer, and eventually
3511 * marks the HBA as in offline state for the upper layer protocol.
3512 **/
3513void
3514lpfc_offline(struct lpfc_hba *phba)
3515{
3516 struct Scsi_Host *shost;
3517 struct lpfc_vport **vports;
3518 int i;
3519
3520 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
3521 return;
3522
3523 /* stop port and all timers associated with this hba */
3524 lpfc_stop_port(phba);
3525
3526 /* Tear down the local and target port registrations. The
3527 * nvme transports need to cleanup.
3528 */
3529 lpfc_nvmet_destroy_targetport(phba);
3530 lpfc_nvme_destroy_localport(phba->pport);
3531
3532 vports = lpfc_create_vport_work_array(phba);
3533 if (vports != NULL)
3534 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
3535 lpfc_stop_vport_timers(vports[i]);
3536 lpfc_destroy_vport_work_array(phba, vports);
3537 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3538 "0460 Bring Adapter offline\n");
3539 /* Bring down the SLI Layer and cleanup. The HBA is offline
3540 now. */
3541 lpfc_sli_hba_down(phba);
3542 spin_lock_irq(&phba->hbalock);
3543 phba->work_ha = 0;
3544 spin_unlock_irq(&phba->hbalock);
3545 vports = lpfc_create_vport_work_array(phba);
3546 if (vports != NULL)
3547 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3548 shost = lpfc_shost_from_vport(vports[i]);
3549 spin_lock_irq(shost->host_lock);
3550 vports[i]->work_port_events = 0;
3551 vports[i]->fc_flag |= FC_OFFLINE_MODE;
3552 spin_unlock_irq(shost->host_lock);
3553 }
3554 lpfc_destroy_vport_work_array(phba, vports);
Olivier Deprez0e641232021-09-23 10:07:05 +02003555 __lpfc_cpuhp_remove(phba);
David Brazdil0f672f62019-12-10 10:32:29 +00003556
3557 if (phba->cfg_xri_rebalancing)
3558 lpfc_destroy_multixri_pools(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003559}
3560
3561/**
3562 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
3563 * @phba: pointer to lpfc hba data structure.
3564 *
3565 * This routine is to free all the SCSI buffers and IOCBs from the driver
3566 * list back to kernel. It is called from lpfc_pci_remove_one to free
3567 * the internal resources before the device is removed from the system.
3568 **/
3569static void
3570lpfc_scsi_free(struct lpfc_hba *phba)
3571{
David Brazdil0f672f62019-12-10 10:32:29 +00003572 struct lpfc_io_buf *sb, *sb_next;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003573
3574 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3575 return;
3576
3577 spin_lock_irq(&phba->hbalock);
3578
3579 /* Release all the lpfc_scsi_bufs maintained by this host. */
3580
3581 spin_lock(&phba->scsi_buf_list_put_lock);
3582 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3583 list) {
3584 list_del(&sb->list);
3585 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3586 sb->dma_handle);
3587 kfree(sb);
3588 phba->total_scsi_bufs--;
3589 }
3590 spin_unlock(&phba->scsi_buf_list_put_lock);
3591
3592 spin_lock(&phba->scsi_buf_list_get_lock);
3593 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3594 list) {
3595 list_del(&sb->list);
3596 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3597 sb->dma_handle);
3598 kfree(sb);
3599 phba->total_scsi_bufs--;
3600 }
3601 spin_unlock(&phba->scsi_buf_list_get_lock);
3602 spin_unlock_irq(&phba->hbalock);
3603}
David Brazdil0f672f62019-12-10 10:32:29 +00003604
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003605/**
David Brazdil0f672f62019-12-10 10:32:29 +00003606 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003607 * @phba: pointer to lpfc hba data structure.
3608 *
David Brazdil0f672f62019-12-10 10:32:29 +00003609 * This routine is to free all the IO buffers and IOCBs from the driver
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003610 * list back to kernel. It is called from lpfc_pci_remove_one to free
3611 * the internal resources before the device is removed from the system.
3612 **/
David Brazdil0f672f62019-12-10 10:32:29 +00003613void
3614lpfc_io_free(struct lpfc_hba *phba)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003615{
David Brazdil0f672f62019-12-10 10:32:29 +00003616 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
3617 struct lpfc_sli4_hdw_queue *qp;
3618 int idx;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003619
David Brazdil0f672f62019-12-10 10:32:29 +00003620 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3621 qp = &phba->sli4_hba.hdwq[idx];
3622 /* Release all the lpfc_nvme_bufs maintained by this host. */
3623 spin_lock(&qp->io_buf_list_put_lock);
3624 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3625 &qp->lpfc_io_buf_list_put,
3626 list) {
3627 list_del(&lpfc_ncmd->list);
3628 qp->put_io_bufs--;
3629 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
3630 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
3631 if (phba->cfg_xpsgl && !phba->nvmet_support)
3632 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
3633 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
3634 kfree(lpfc_ncmd);
3635 qp->total_io_bufs--;
3636 }
3637 spin_unlock(&qp->io_buf_list_put_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003638
David Brazdil0f672f62019-12-10 10:32:29 +00003639 spin_lock(&qp->io_buf_list_get_lock);
3640 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3641 &qp->lpfc_io_buf_list_get,
3642 list) {
3643 list_del(&lpfc_ncmd->list);
3644 qp->get_io_bufs--;
3645 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
3646 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
3647 if (phba->cfg_xpsgl && !phba->nvmet_support)
3648 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
3649 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
3650 kfree(lpfc_ncmd);
3651 qp->total_io_bufs--;
3652 }
3653 spin_unlock(&qp->io_buf_list_get_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003654 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003655}
David Brazdil0f672f62019-12-10 10:32:29 +00003656
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003657/**
3658 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
3659 * @phba: pointer to lpfc hba data structure.
3660 *
3661 * This routine first calculates the sizes of the current els and allocated
3662 * scsi sgl lists, and then goes through all sgls to updates the physical
3663 * XRIs assigned due to port function reset. During port initialization, the
3664 * current els and allocated scsi sgl lists are 0s.
3665 *
3666 * Return codes
3667 * 0 - successful (for now, it always returns 0)
3668 **/
3669int
3670lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
3671{
3672 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3673 uint16_t i, lxri, xri_cnt, els_xri_cnt;
3674 LIST_HEAD(els_sgl_list);
3675 int rc;
3676
3677 /*
3678 * update on pci function's els xri-sgl list
3679 */
3680 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3681
3682 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3683 /* els xri-sgl expanded */
3684 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3685 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3686 "3157 ELS xri-sgl count increased from "
3687 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3688 els_xri_cnt);
3689 /* allocate the additional els sgls */
3690 for (i = 0; i < xri_cnt; i++) {
3691 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3692 GFP_KERNEL);
3693 if (sglq_entry == NULL) {
3694 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3695 "2562 Failure to allocate an "
3696 "ELS sgl entry:%d\n", i);
3697 rc = -ENOMEM;
3698 goto out_free_mem;
3699 }
3700 sglq_entry->buff_type = GEN_BUFF_TYPE;
3701 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
3702 &sglq_entry->phys);
3703 if (sglq_entry->virt == NULL) {
3704 kfree(sglq_entry);
3705 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3706 "2563 Failure to allocate an "
3707 "ELS mbuf:%d\n", i);
3708 rc = -ENOMEM;
3709 goto out_free_mem;
3710 }
3711 sglq_entry->sgl = sglq_entry->virt;
3712 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
3713 sglq_entry->state = SGL_FREED;
3714 list_add_tail(&sglq_entry->list, &els_sgl_list);
3715 }
3716 spin_lock_irq(&phba->hbalock);
3717 spin_lock(&phba->sli4_hba.sgl_list_lock);
3718 list_splice_init(&els_sgl_list,
3719 &phba->sli4_hba.lpfc_els_sgl_list);
3720 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3721 spin_unlock_irq(&phba->hbalock);
3722 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3723 /* els xri-sgl shrinked */
3724 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3725 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3726 "3158 ELS xri-sgl count decreased from "
3727 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3728 els_xri_cnt);
3729 spin_lock_irq(&phba->hbalock);
3730 spin_lock(&phba->sli4_hba.sgl_list_lock);
3731 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3732 &els_sgl_list);
3733 /* release extra els sgls from list */
3734 for (i = 0; i < xri_cnt; i++) {
3735 list_remove_head(&els_sgl_list,
3736 sglq_entry, struct lpfc_sglq, list);
3737 if (sglq_entry) {
3738 __lpfc_mbuf_free(phba, sglq_entry->virt,
3739 sglq_entry->phys);
3740 kfree(sglq_entry);
3741 }
3742 }
3743 list_splice_init(&els_sgl_list,
3744 &phba->sli4_hba.lpfc_els_sgl_list);
3745 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3746 spin_unlock_irq(&phba->hbalock);
3747 } else
3748 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3749 "3163 ELS xri-sgl count unchanged: %d\n",
3750 els_xri_cnt);
3751 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3752
3753 /* update xris to els sgls on the list */
3754 sglq_entry = NULL;
3755 sglq_entry_next = NULL;
3756 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3757 &phba->sli4_hba.lpfc_els_sgl_list, list) {
3758 lxri = lpfc_sli4_next_xritag(phba);
3759 if (lxri == NO_XRI) {
3760 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3761 "2400 Failed to allocate xri for "
3762 "ELS sgl\n");
3763 rc = -ENOMEM;
3764 goto out_free_mem;
3765 }
3766 sglq_entry->sli4_lxritag = lxri;
3767 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3768 }
3769 return 0;
3770
3771out_free_mem:
3772 lpfc_free_els_sgl_list(phba);
3773 return rc;
3774}
3775
3776/**
3777 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
3778 * @phba: pointer to lpfc hba data structure.
3779 *
3780 * This routine first calculates the sizes of the current els and allocated
3781 * scsi sgl lists, and then goes through all sgls to updates the physical
3782 * XRIs assigned due to port function reset. During port initialization, the
3783 * current els and allocated scsi sgl lists are 0s.
3784 *
3785 * Return codes
3786 * 0 - successful (for now, it always returns 0)
3787 **/
3788int
3789lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
3790{
3791 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
3792 uint16_t i, lxri, xri_cnt, els_xri_cnt;
3793 uint16_t nvmet_xri_cnt;
3794 LIST_HEAD(nvmet_sgl_list);
3795 int rc;
3796
3797 /*
3798 * update on pci function's nvmet xri-sgl list
3799 */
3800 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
3801
3802 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
3803 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3804 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3805 /* els xri-sgl expanded */
3806 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3807 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3808 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
3809 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3810 /* allocate the additional nvmet sgls */
3811 for (i = 0; i < xri_cnt; i++) {
3812 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
3813 GFP_KERNEL);
3814 if (sglq_entry == NULL) {
3815 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3816 "6303 Failure to allocate an "
3817 "NVMET sgl entry:%d\n", i);
3818 rc = -ENOMEM;
3819 goto out_free_mem;
3820 }
3821 sglq_entry->buff_type = NVMET_BUFF_TYPE;
3822 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
3823 &sglq_entry->phys);
3824 if (sglq_entry->virt == NULL) {
3825 kfree(sglq_entry);
3826 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3827 "6304 Failure to allocate an "
3828 "NVMET buf:%d\n", i);
3829 rc = -ENOMEM;
3830 goto out_free_mem;
3831 }
3832 sglq_entry->sgl = sglq_entry->virt;
3833 memset(sglq_entry->sgl, 0,
3834 phba->cfg_sg_dma_buf_size);
3835 sglq_entry->state = SGL_FREED;
3836 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
3837 }
3838 spin_lock_irq(&phba->hbalock);
3839 spin_lock(&phba->sli4_hba.sgl_list_lock);
3840 list_splice_init(&nvmet_sgl_list,
3841 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3842 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3843 spin_unlock_irq(&phba->hbalock);
3844 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3845 /* nvmet xri-sgl shrunk */
3846 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3847 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3848 "6305 NVMET xri-sgl count decreased from "
3849 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3850 nvmet_xri_cnt);
3851 spin_lock_irq(&phba->hbalock);
3852 spin_lock(&phba->sli4_hba.sgl_list_lock);
3853 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3854 &nvmet_sgl_list);
3855 /* release extra nvmet sgls from list */
3856 for (i = 0; i < xri_cnt; i++) {
3857 list_remove_head(&nvmet_sgl_list,
3858 sglq_entry, struct lpfc_sglq, list);
3859 if (sglq_entry) {
3860 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
3861 sglq_entry->phys);
3862 kfree(sglq_entry);
3863 }
3864 }
3865 list_splice_init(&nvmet_sgl_list,
3866 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3867 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3868 spin_unlock_irq(&phba->hbalock);
3869 } else
3870 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
3871 "6306 NVMET xri-sgl count unchanged: %d\n",
3872 nvmet_xri_cnt);
3873 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3874
3875 /* update xris to nvmet sgls on the list */
3876 sglq_entry = NULL;
3877 sglq_entry_next = NULL;
3878 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
3879 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3880 lxri = lpfc_sli4_next_xritag(phba);
3881 if (lxri == NO_XRI) {
3882 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
3883 "6307 Failed to allocate xri for "
3884 "NVMET sgl\n");
3885 rc = -ENOMEM;
3886 goto out_free_mem;
3887 }
3888 sglq_entry->sli4_lxritag = lxri;
3889 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3890 }
3891 return 0;
3892
3893out_free_mem:
3894 lpfc_free_nvmet_sgl_list(phba);
3895 return rc;
3896}
3897
David Brazdil0f672f62019-12-10 10:32:29 +00003898int
3899lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
3900{
3901 LIST_HEAD(blist);
3902 struct lpfc_sli4_hdw_queue *qp;
3903 struct lpfc_io_buf *lpfc_cmd;
3904 struct lpfc_io_buf *iobufp, *prev_iobufp;
3905 int idx, cnt, xri, inserted;
3906
3907 cnt = 0;
3908 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3909 qp = &phba->sli4_hba.hdwq[idx];
3910 spin_lock_irq(&qp->io_buf_list_get_lock);
3911 spin_lock(&qp->io_buf_list_put_lock);
3912
3913 /* Take everything off the get and put lists */
3914 list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
3915 list_splice(&qp->lpfc_io_buf_list_put, &blist);
3916 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
3917 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
3918 cnt += qp->get_io_bufs + qp->put_io_bufs;
3919 qp->get_io_bufs = 0;
3920 qp->put_io_bufs = 0;
3921 qp->total_io_bufs = 0;
3922 spin_unlock(&qp->io_buf_list_put_lock);
3923 spin_unlock_irq(&qp->io_buf_list_get_lock);
3924 }
3925
3926 /*
3927 * Take IO buffers off blist and put on cbuf sorted by XRI.
3928 * This is because POST_SGL takes a sequential range of XRIs
3929 * to post to the firmware.
3930 */
3931 for (idx = 0; idx < cnt; idx++) {
3932 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
3933 if (!lpfc_cmd)
3934 return cnt;
3935 if (idx == 0) {
3936 list_add_tail(&lpfc_cmd->list, cbuf);
3937 continue;
3938 }
3939 xri = lpfc_cmd->cur_iocbq.sli4_xritag;
3940 inserted = 0;
3941 prev_iobufp = NULL;
3942 list_for_each_entry(iobufp, cbuf, list) {
3943 if (xri < iobufp->cur_iocbq.sli4_xritag) {
3944 if (prev_iobufp)
3945 list_add(&lpfc_cmd->list,
3946 &prev_iobufp->list);
3947 else
3948 list_add(&lpfc_cmd->list, cbuf);
3949 inserted = 1;
3950 break;
3951 }
3952 prev_iobufp = iobufp;
3953 }
3954 if (!inserted)
3955 list_add_tail(&lpfc_cmd->list, cbuf);
3956 }
3957 return cnt;
3958}
3959
3960int
3961lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
3962{
3963 struct lpfc_sli4_hdw_queue *qp;
3964 struct lpfc_io_buf *lpfc_cmd;
3965 int idx, cnt;
3966
3967 qp = phba->sli4_hba.hdwq;
3968 cnt = 0;
3969 while (!list_empty(cbuf)) {
3970 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3971 list_remove_head(cbuf, lpfc_cmd,
3972 struct lpfc_io_buf, list);
3973 if (!lpfc_cmd)
3974 return cnt;
3975 cnt++;
3976 qp = &phba->sli4_hba.hdwq[idx];
3977 lpfc_cmd->hdwq_no = idx;
3978 lpfc_cmd->hdwq = qp;
3979 lpfc_cmd->cur_iocbq.wqe_cmpl = NULL;
3980 lpfc_cmd->cur_iocbq.iocb_cmpl = NULL;
3981 spin_lock(&qp->io_buf_list_put_lock);
3982 list_add_tail(&lpfc_cmd->list,
3983 &qp->lpfc_io_buf_list_put);
3984 qp->put_io_bufs++;
3985 qp->total_io_bufs++;
3986 spin_unlock(&qp->io_buf_list_put_lock);
3987 }
3988 }
3989 return cnt;
3990}
3991
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003992/**
David Brazdil0f672f62019-12-10 10:32:29 +00003993 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003994 * @phba: pointer to lpfc hba data structure.
3995 *
3996 * This routine first calculates the sizes of the current els and allocated
3997 * scsi sgl lists, and then goes through all sgls to updates the physical
3998 * XRIs assigned due to port function reset. During port initialization, the
3999 * current els and allocated scsi sgl lists are 0s.
4000 *
4001 * Return codes
4002 * 0 - successful (for now, it always returns 0)
4003 **/
4004int
David Brazdil0f672f62019-12-10 10:32:29 +00004005lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004006{
David Brazdil0f672f62019-12-10 10:32:29 +00004007 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
4008 uint16_t i, lxri, els_xri_cnt;
4009 uint16_t io_xri_cnt, io_xri_max;
4010 LIST_HEAD(io_sgl_list);
4011 int rc, cnt;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004012
4013 /*
David Brazdil0f672f62019-12-10 10:32:29 +00004014 * update on pci function's allocated nvme xri-sgl list
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004015 */
David Brazdil0f672f62019-12-10 10:32:29 +00004016
4017 /* maximum number of xris available for nvme buffers */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004018 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
David Brazdil0f672f62019-12-10 10:32:29 +00004019 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4020 phba->sli4_hba.io_xri_max = io_xri_max;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004021
4022 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
David Brazdil0f672f62019-12-10 10:32:29 +00004023 "6074 Current allocated XRI sgl count:%d, "
4024 "maximum XRI count:%d\n",
4025 phba->sli4_hba.io_xri_cnt,
4026 phba->sli4_hba.io_xri_max);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004027
David Brazdil0f672f62019-12-10 10:32:29 +00004028 cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
4029
4030 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4031 /* max nvme xri shrunk below the allocated nvme buffers */
4032 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4033 phba->sli4_hba.io_xri_max;
4034 /* release the extra allocated nvme buffers */
4035 for (i = 0; i < io_xri_cnt; i++) {
4036 list_remove_head(&io_sgl_list, lpfc_ncmd,
4037 struct lpfc_io_buf, list);
4038 if (lpfc_ncmd) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004039 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
David Brazdil0f672f62019-12-10 10:32:29 +00004040 lpfc_ncmd->data,
4041 lpfc_ncmd->dma_handle);
4042 kfree(lpfc_ncmd);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004043 }
4044 }
David Brazdil0f672f62019-12-10 10:32:29 +00004045 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004046 }
4047
David Brazdil0f672f62019-12-10 10:32:29 +00004048 /* update xris associated to remaining allocated nvme buffers */
4049 lpfc_ncmd = NULL;
4050 lpfc_ncmd_next = NULL;
4051 phba->sli4_hba.io_xri_cnt = cnt;
4052 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4053 &io_sgl_list, list) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004054 lxri = lpfc_sli4_next_xritag(phba);
4055 if (lxri == NO_XRI) {
4056 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
David Brazdil0f672f62019-12-10 10:32:29 +00004057 "6075 Failed to allocate xri for "
4058 "nvme buffer\n");
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004059 rc = -ENOMEM;
4060 goto out_free_mem;
4061 }
David Brazdil0f672f62019-12-10 10:32:29 +00004062 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
4063 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004064 }
David Brazdil0f672f62019-12-10 10:32:29 +00004065 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004066 return 0;
4067
4068out_free_mem:
David Brazdil0f672f62019-12-10 10:32:29 +00004069 lpfc_io_free(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004070 return rc;
4071}
4072
David Brazdil0f672f62019-12-10 10:32:29 +00004073/**
4074 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
4075 * @vport: The virtual port for which this call being executed.
4076 * @num_to_allocate: The requested number of buffers to allocate.
4077 *
4078 * This routine allocates nvme buffers for device with SLI-4 interface spec,
4079 * the nvme buffer contains all the necessary information needed to initiate
4080 * an I/O. After allocating up to @num_to_allocate IO buffers and put
4081 * them on a list, it post them to the port by using SGL block post.
4082 *
4083 * Return codes:
4084 * int - number of IO buffers that were allocated and posted.
4085 * 0 = failure, less than num_to_alloc is a partial failure.
4086 **/
4087int
4088lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
4089{
4090 struct lpfc_io_buf *lpfc_ncmd;
4091 struct lpfc_iocbq *pwqeq;
4092 uint16_t iotag, lxri = 0;
4093 int bcnt, num_posted;
4094 LIST_HEAD(prep_nblist);
4095 LIST_HEAD(post_nblist);
4096 LIST_HEAD(nvme_nblist);
4097
4098 phba->sli4_hba.io_xri_cnt = 0;
4099 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
4100 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL);
4101 if (!lpfc_ncmd)
4102 break;
4103 /*
4104 * Get memory from the pci pool to map the virt space to
4105 * pci bus space for an I/O. The DMA buffer includes the
4106 * number of SGE's necessary to support the sg_tablesize.
4107 */
4108 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool,
4109 GFP_KERNEL,
4110 &lpfc_ncmd->dma_handle);
4111 if (!lpfc_ncmd->data) {
4112 kfree(lpfc_ncmd);
4113 break;
4114 }
4115
4116 if (phba->cfg_xpsgl && !phba->nvmet_support) {
4117 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list);
4118 } else {
4119 /*
4120 * 4K Page alignment is CRITICAL to BlockGuard, double
4121 * check to be sure.
4122 */
4123 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
4124 (((unsigned long)(lpfc_ncmd->data) &
4125 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
4126 lpfc_printf_log(phba, KERN_ERR, LOG_FCP,
4127 "3369 Memory alignment err: "
4128 "addr=%lx\n",
4129 (unsigned long)lpfc_ncmd->data);
4130 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4131 lpfc_ncmd->data,
4132 lpfc_ncmd->dma_handle);
4133 kfree(lpfc_ncmd);
4134 break;
4135 }
4136 }
4137
4138 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list);
4139
4140 lxri = lpfc_sli4_next_xritag(phba);
4141 if (lxri == NO_XRI) {
4142 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4143 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4144 kfree(lpfc_ncmd);
4145 break;
4146 }
4147 pwqeq = &lpfc_ncmd->cur_iocbq;
4148
4149 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */
4150 iotag = lpfc_sli_next_iotag(phba, pwqeq);
4151 if (iotag == 0) {
4152 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4153 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4154 kfree(lpfc_ncmd);
4155 lpfc_printf_log(phba, KERN_ERR, LOG_NVME_IOERR,
4156 "6121 Failed to allocate IOTAG for"
4157 " XRI:0x%x\n", lxri);
4158 lpfc_sli4_free_xri(phba, lxri);
4159 break;
4160 }
4161 pwqeq->sli4_lxritag = lxri;
4162 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4163 pwqeq->context1 = lpfc_ncmd;
4164
4165 /* Initialize local short-hand pointers. */
4166 lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
4167 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
4168 lpfc_ncmd->cur_iocbq.context1 = lpfc_ncmd;
4169 spin_lock_init(&lpfc_ncmd->buf_lock);
4170
4171 /* add the nvme buffer to a post list */
4172 list_add_tail(&lpfc_ncmd->list, &post_nblist);
4173 phba->sli4_hba.io_xri_cnt++;
4174 }
4175 lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
4176 "6114 Allocate %d out of %d requested new NVME "
4177 "buffers\n", bcnt, num_to_alloc);
4178
4179 /* post the list of nvme buffer sgls to port if available */
4180 if (!list_empty(&post_nblist))
4181 num_posted = lpfc_sli4_post_io_sgl_list(
4182 phba, &post_nblist, bcnt);
4183 else
4184 num_posted = 0;
4185
4186 return num_posted;
4187}
4188
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004189static uint64_t
4190lpfc_get_wwpn(struct lpfc_hba *phba)
4191{
4192 uint64_t wwn;
4193 int rc;
4194 LPFC_MBOXQ_t *mboxq;
4195 MAILBOX_t *mb;
4196
4197 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4198 GFP_KERNEL);
4199 if (!mboxq)
4200 return (uint64_t)-1;
4201
4202 /* First get WWN of HBA instance */
4203 lpfc_read_nv(phba, mboxq);
4204 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
4205 if (rc != MBX_SUCCESS) {
4206 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4207 "6019 Mailbox failed , mbxCmd x%x "
4208 "READ_NV, mbxStatus x%x\n",
4209 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
4210 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
4211 mempool_free(mboxq, phba->mbox_mem_pool);
4212 return (uint64_t) -1;
4213 }
4214 mb = &mboxq->u.mb;
4215 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
4216 /* wwn is WWPN of HBA instance */
4217 mempool_free(mboxq, phba->mbox_mem_pool);
4218 if (phba->sli_rev == LPFC_SLI_REV4)
4219 return be64_to_cpu(wwn);
4220 else
4221 return rol64(wwn, 32);
4222}
4223
4224/**
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004225 * lpfc_create_port - Create an FC port
4226 * @phba: pointer to lpfc hba data structure.
4227 * @instance: a unique integer ID to this FC port.
4228 * @dev: pointer to the device data structure.
4229 *
4230 * This routine creates a FC port for the upper layer protocol. The FC port
4231 * can be created on top of either a physical port or a virtual port provided
4232 * by the HBA. This routine also allocates a SCSI host data structure (shost)
4233 * and associates the FC port created before adding the shost into the SCSI
4234 * layer.
4235 *
4236 * Return codes
4237 * @vport - pointer to the virtual N_Port data structure.
4238 * NULL - port create failed.
4239 **/
4240struct lpfc_vport *
4241lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
4242{
4243 struct lpfc_vport *vport;
4244 struct Scsi_Host *shost = NULL;
4245 int error = 0;
4246 int i;
4247 uint64_t wwn;
4248 bool use_no_reset_hba = false;
4249 int rc;
4250
4251 if (lpfc_no_hba_reset_cnt) {
4252 if (phba->sli_rev < LPFC_SLI_REV4 &&
4253 dev == &phba->pcidev->dev) {
4254 /* Reset the port first */
4255 lpfc_sli_brdrestart(phba);
4256 rc = lpfc_sli_chipset_init(phba);
4257 if (rc)
4258 return NULL;
4259 }
4260 wwn = lpfc_get_wwpn(phba);
4261 }
4262
4263 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
4264 if (wwn == lpfc_no_hba_reset[i]) {
4265 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4266 "6020 Setting use_no_reset port=%llx\n",
4267 wwn);
4268 use_no_reset_hba = true;
4269 break;
4270 }
4271 }
4272
4273 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
4274 if (dev != &phba->pcidev->dev) {
4275 shost = scsi_host_alloc(&lpfc_vport_template,
4276 sizeof(struct lpfc_vport));
4277 } else {
4278 if (!use_no_reset_hba)
4279 shost = scsi_host_alloc(&lpfc_template,
4280 sizeof(struct lpfc_vport));
4281 else
4282 shost = scsi_host_alloc(&lpfc_template_no_hr,
4283 sizeof(struct lpfc_vport));
4284 }
4285 } else if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
4286 shost = scsi_host_alloc(&lpfc_template_nvme,
4287 sizeof(struct lpfc_vport));
4288 }
4289 if (!shost)
4290 goto out;
4291
4292 vport = (struct lpfc_vport *) shost->hostdata;
4293 vport->phba = phba;
4294 vport->load_flag |= FC_LOADING;
4295 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
4296 vport->fc_rscn_flush = 0;
4297 lpfc_get_vport_cfgparam(vport);
4298
David Brazdil0f672f62019-12-10 10:32:29 +00004299 /* Adjust value in vport */
4300 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type;
4301
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004302 shost->unique_id = instance;
4303 shost->max_id = LPFC_MAX_TARGET;
4304 shost->max_lun = vport->cfg_max_luns;
4305 shost->this_id = -1;
4306 shost->max_cmd_len = 16;
David Brazdil0f672f62019-12-10 10:32:29 +00004307
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004308 if (phba->sli_rev == LPFC_SLI_REV4) {
David Brazdil0f672f62019-12-10 10:32:29 +00004309 if (!phba->cfg_fcp_mq_threshold ||
4310 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue)
4311 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue;
4312
4313 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(),
4314 phba->cfg_fcp_mq_threshold);
4315
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004316 shost->dma_boundary =
4317 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
David Brazdil0f672f62019-12-10 10:32:29 +00004318
4319 if (phba->cfg_xpsgl && !phba->nvmet_support)
4320 shost->sg_tablesize = LPFC_MAX_SG_TABLESIZE;
4321 else
4322 shost->sg_tablesize = phba->cfg_scsi_seg_cnt;
4323 } else
4324 /* SLI-3 has a limited number of hardware queues (3),
4325 * thus there is only one for FCP processing.
4326 */
4327 shost->nr_hw_queues = 1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004328
4329 /*
4330 * Set initial can_queue value since 0 is no longer supported and
4331 * scsi_add_host will fail. This will be adjusted later based on the
4332 * max xri value determined in hba setup.
4333 */
4334 shost->can_queue = phba->cfg_hba_queue_depth - 10;
4335 if (dev != &phba->pcidev->dev) {
4336 shost->transportt = lpfc_vport_transport_template;
4337 vport->port_type = LPFC_NPIV_PORT;
4338 } else {
4339 shost->transportt = lpfc_transport_template;
4340 vport->port_type = LPFC_PHYSICAL_PORT;
4341 }
4342
4343 /* Initialize all internally managed lists. */
4344 INIT_LIST_HEAD(&vport->fc_nodes);
4345 INIT_LIST_HEAD(&vport->rcv_buffer_list);
4346 spin_lock_init(&vport->work_port_lock);
4347
4348 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
4349
4350 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
4351
4352 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
4353
David Brazdil0f672f62019-12-10 10:32:29 +00004354 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
4355 lpfc_setup_bg(phba, shost);
4356
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004357 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
4358 if (error)
4359 goto out_put_shost;
4360
David Brazdil0f672f62019-12-10 10:32:29 +00004361 spin_lock_irq(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004362 list_add_tail(&vport->listentry, &phba->port_list);
David Brazdil0f672f62019-12-10 10:32:29 +00004363 spin_unlock_irq(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004364 return vport;
4365
4366out_put_shost:
4367 scsi_host_put(shost);
4368out:
4369 return NULL;
4370}
4371
4372/**
4373 * destroy_port - destroy an FC port
4374 * @vport: pointer to an lpfc virtual N_Port data structure.
4375 *
4376 * This routine destroys a FC port from the upper layer protocol. All the
4377 * resources associated with the port are released.
4378 **/
4379void
4380destroy_port(struct lpfc_vport *vport)
4381{
4382 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
4383 struct lpfc_hba *phba = vport->phba;
4384
4385 lpfc_debugfs_terminate(vport);
4386 fc_remove_host(shost);
4387 scsi_remove_host(shost);
4388
David Brazdil0f672f62019-12-10 10:32:29 +00004389 spin_lock_irq(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004390 list_del_init(&vport->listentry);
David Brazdil0f672f62019-12-10 10:32:29 +00004391 spin_unlock_irq(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004392
4393 lpfc_cleanup(vport);
4394 return;
4395}
4396
4397/**
4398 * lpfc_get_instance - Get a unique integer ID
4399 *
4400 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4401 * uses the kernel idr facility to perform the task.
4402 *
4403 * Return codes:
4404 * instance - a unique integer ID allocated as the new instance.
4405 * -1 - lpfc get instance failed.
4406 **/
4407int
4408lpfc_get_instance(void)
4409{
4410 int ret;
4411
4412 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4413 return ret < 0 ? -1 : ret;
4414}
4415
4416/**
4417 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
4418 * @shost: pointer to SCSI host data structure.
4419 * @time: elapsed time of the scan in jiffies.
4420 *
4421 * This routine is called by the SCSI layer with a SCSI host to determine
4422 * whether the scan host is finished.
4423 *
4424 * Note: there is no scan_start function as adapter initialization will have
4425 * asynchronously kicked off the link initialization.
4426 *
4427 * Return codes
4428 * 0 - SCSI host scan is not over yet.
4429 * 1 - SCSI host scan is over.
4430 **/
4431int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4432{
4433 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4434 struct lpfc_hba *phba = vport->phba;
4435 int stat = 0;
4436
4437 spin_lock_irq(shost->host_lock);
4438
4439 if (vport->load_flag & FC_UNLOADING) {
4440 stat = 1;
4441 goto finished;
4442 }
4443 if (time >= msecs_to_jiffies(30 * 1000)) {
4444 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4445 "0461 Scanning longer than 30 "
4446 "seconds. Continuing initialization\n");
4447 stat = 1;
4448 goto finished;
4449 }
4450 if (time >= msecs_to_jiffies(15 * 1000) &&
4451 phba->link_state <= LPFC_LINK_DOWN) {
4452 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4453 "0465 Link down longer than 15 "
4454 "seconds. Continuing initialization\n");
4455 stat = 1;
4456 goto finished;
4457 }
4458
4459 if (vport->port_state != LPFC_VPORT_READY)
4460 goto finished;
4461 if (vport->num_disc_nodes || vport->fc_prli_sent)
4462 goto finished;
4463 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
4464 goto finished;
4465 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
4466 goto finished;
4467
4468 stat = 1;
4469
4470finished:
4471 spin_unlock_irq(shost->host_lock);
4472 return stat;
4473}
4474
David Brazdil0f672f62019-12-10 10:32:29 +00004475static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
4476{
4477 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4478 struct lpfc_hba *phba = vport->phba;
4479
4480 fc_host_supported_speeds(shost) = 0;
4481 if (phba->lmt & LMT_128Gb)
4482 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
4483 if (phba->lmt & LMT_64Gb)
4484 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
4485 if (phba->lmt & LMT_32Gb)
4486 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
4487 if (phba->lmt & LMT_16Gb)
4488 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
4489 if (phba->lmt & LMT_10Gb)
4490 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
4491 if (phba->lmt & LMT_8Gb)
4492 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
4493 if (phba->lmt & LMT_4Gb)
4494 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4495 if (phba->lmt & LMT_2Gb)
4496 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4497 if (phba->lmt & LMT_1Gb)
4498 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
4499}
4500
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004501/**
4502 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
4503 * @shost: pointer to SCSI host data structure.
4504 *
4505 * This routine initializes a given SCSI host attributes on a FC port. The
4506 * SCSI host can be either on top of a physical port or a virtual port.
4507 **/
4508void lpfc_host_attrib_init(struct Scsi_Host *shost)
4509{
4510 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4511 struct lpfc_hba *phba = vport->phba;
4512 /*
4513 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
4514 */
4515
4516 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
4517 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
4518 fc_host_supported_classes(shost) = FC_COS_CLASS3;
4519
4520 memset(fc_host_supported_fc4s(shost), 0,
4521 sizeof(fc_host_supported_fc4s(shost)));
4522 fc_host_supported_fc4s(shost)[2] = 1;
4523 fc_host_supported_fc4s(shost)[7] = 1;
4524
4525 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
4526 sizeof fc_host_symbolic_name(shost));
4527
David Brazdil0f672f62019-12-10 10:32:29 +00004528 lpfc_host_supported_speeds_set(shost);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004529
4530 fc_host_maxframe_size(shost) =
4531 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
4532 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
4533
4534 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
4535
4536 /* This value is also unchanging */
4537 memset(fc_host_active_fc4s(shost), 0,
4538 sizeof(fc_host_active_fc4s(shost)));
4539 fc_host_active_fc4s(shost)[2] = 1;
4540 fc_host_active_fc4s(shost)[7] = 1;
4541
4542 fc_host_max_npiv_vports(shost) = phba->max_vpi;
4543 spin_lock_irq(shost->host_lock);
4544 vport->load_flag &= ~FC_LOADING;
4545 spin_unlock_irq(shost->host_lock);
4546}
4547
4548/**
4549 * lpfc_stop_port_s3 - Stop SLI3 device port
4550 * @phba: pointer to lpfc hba data structure.
4551 *
4552 * This routine is invoked to stop an SLI3 device port, it stops the device
4553 * from generating interrupts and stops the device driver's timers for the
4554 * device.
4555 **/
4556static void
4557lpfc_stop_port_s3(struct lpfc_hba *phba)
4558{
4559 /* Clear all interrupt enable conditions */
4560 writel(0, phba->HCregaddr);
4561 readl(phba->HCregaddr); /* flush */
4562 /* Clear all pending interrupts */
4563 writel(0xffffffff, phba->HAregaddr);
4564 readl(phba->HAregaddr); /* flush */
4565
4566 /* Reset some HBA SLI setup states */
4567 lpfc_stop_hba_timers(phba);
4568 phba->pport->work_port_events = 0;
4569}
4570
4571/**
4572 * lpfc_stop_port_s4 - Stop SLI4 device port
4573 * @phba: pointer to lpfc hba data structure.
4574 *
4575 * This routine is invoked to stop an SLI4 device port, it stops the device
4576 * from generating interrupts and stops the device driver's timers for the
4577 * device.
4578 **/
4579static void
4580lpfc_stop_port_s4(struct lpfc_hba *phba)
4581{
4582 /* Reset some HBA SLI4 setup states */
4583 lpfc_stop_hba_timers(phba);
David Brazdil0f672f62019-12-10 10:32:29 +00004584 if (phba->pport)
4585 phba->pport->work_port_events = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004586 phba->sli4_hba.intr_enable = 0;
4587}
4588
4589/**
4590 * lpfc_stop_port - Wrapper function for stopping hba port
4591 * @phba: Pointer to HBA context object.
4592 *
4593 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
4594 * the API jump table function pointer from the lpfc_hba struct.
4595 **/
4596void
4597lpfc_stop_port(struct lpfc_hba *phba)
4598{
4599 phba->lpfc_stop_port(phba);
4600
4601 if (phba->wq)
4602 flush_workqueue(phba->wq);
4603}
4604
4605/**
4606 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
4607 * @phba: Pointer to hba for which this call is being executed.
4608 *
4609 * This routine starts the timer waiting for the FCF rediscovery to complete.
4610 **/
4611void
4612lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
4613{
4614 unsigned long fcf_redisc_wait_tmo =
4615 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
4616 /* Start fcf rediscovery wait period timer */
4617 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
4618 spin_lock_irq(&phba->hbalock);
4619 /* Allow action to new fcf asynchronous event */
4620 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
4621 /* Mark the FCF rediscovery pending state */
4622 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
4623 spin_unlock_irq(&phba->hbalock);
4624}
4625
4626/**
4627 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
4628 * @ptr: Map to lpfc_hba data structure pointer.
4629 *
4630 * This routine is invoked when waiting for FCF table rediscover has been
4631 * timed out. If new FCF record(s) has (have) been discovered during the
4632 * wait period, a new FCF event shall be added to the FCOE async event
4633 * list, and then worker thread shall be waked up for processing from the
4634 * worker thread context.
4635 **/
4636static void
4637lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
4638{
4639 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
4640
4641 /* Don't send FCF rediscovery event if timer cancelled */
4642 spin_lock_irq(&phba->hbalock);
4643 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
4644 spin_unlock_irq(&phba->hbalock);
4645 return;
4646 }
4647 /* Clear FCF rediscovery timer pending flag */
4648 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
4649 /* FCF rediscovery event to worker thread */
4650 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
4651 spin_unlock_irq(&phba->hbalock);
4652 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
4653 "2776 FCF rediscover quiescent timer expired\n");
4654 /* wake up worker thread */
4655 lpfc_worker_wake_up(phba);
4656}
4657
4658/**
4659 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
4660 * @phba: pointer to lpfc hba data structure.
4661 * @acqe_link: pointer to the async link completion queue entry.
4662 *
4663 * This routine is to parse the SLI4 link-attention link fault code.
4664 **/
4665static void
4666lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
4667 struct lpfc_acqe_link *acqe_link)
4668{
4669 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
4670 case LPFC_ASYNC_LINK_FAULT_NONE:
4671 case LPFC_ASYNC_LINK_FAULT_LOCAL:
4672 case LPFC_ASYNC_LINK_FAULT_REMOTE:
4673 case LPFC_ASYNC_LINK_FAULT_LR_LRR:
4674 break;
4675 default:
4676 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4677 "0398 Unknown link fault code: x%x\n",
4678 bf_get(lpfc_acqe_link_fault, acqe_link));
4679 break;
4680 }
4681}
4682
4683/**
4684 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
4685 * @phba: pointer to lpfc hba data structure.
4686 * @acqe_link: pointer to the async link completion queue entry.
4687 *
4688 * This routine is to parse the SLI4 link attention type and translate it
4689 * into the base driver's link attention type coding.
4690 *
4691 * Return: Link attention type in terms of base driver's coding.
4692 **/
4693static uint8_t
4694lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
4695 struct lpfc_acqe_link *acqe_link)
4696{
4697 uint8_t att_type;
4698
4699 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
4700 case LPFC_ASYNC_LINK_STATUS_DOWN:
4701 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
4702 att_type = LPFC_ATT_LINK_DOWN;
4703 break;
4704 case LPFC_ASYNC_LINK_STATUS_UP:
4705 /* Ignore physical link up events - wait for logical link up */
4706 att_type = LPFC_ATT_RESERVED;
4707 break;
4708 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
4709 att_type = LPFC_ATT_LINK_UP;
4710 break;
4711 default:
4712 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
4713 "0399 Invalid link attention type: x%x\n",
4714 bf_get(lpfc_acqe_link_status, acqe_link));
4715 att_type = LPFC_ATT_RESERVED;
4716 break;
4717 }
4718 return att_type;
4719}
4720
4721/**
4722 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
4723 * @phba: pointer to lpfc hba data structure.
4724 *
4725 * This routine is to get an SLI3 FC port's link speed in Mbps.
4726 *
4727 * Return: link speed in terms of Mbps.
4728 **/
4729uint32_t
4730lpfc_sli_port_speed_get(struct lpfc_hba *phba)
4731{
4732 uint32_t link_speed;
4733
4734 if (!lpfc_is_link_up(phba))
4735 return 0;
4736
4737 if (phba->sli_rev <= LPFC_SLI_REV3) {
4738 switch (phba->fc_linkspeed) {
4739 case LPFC_LINK_SPEED_1GHZ:
4740 link_speed = 1000;
4741 break;
4742 case LPFC_LINK_SPEED_2GHZ:
4743 link_speed = 2000;
4744 break;
4745 case LPFC_LINK_SPEED_4GHZ:
4746 link_speed = 4000;
4747 break;
4748 case LPFC_LINK_SPEED_8GHZ:
4749 link_speed = 8000;
4750 break;
4751 case LPFC_LINK_SPEED_10GHZ:
4752 link_speed = 10000;
4753 break;
4754 case LPFC_LINK_SPEED_16GHZ:
4755 link_speed = 16000;
4756 break;
4757 default:
4758 link_speed = 0;
4759 }
4760 } else {
4761 if (phba->sli4_hba.link_state.logical_speed)
4762 link_speed =
4763 phba->sli4_hba.link_state.logical_speed;
4764 else
4765 link_speed = phba->sli4_hba.link_state.speed;
4766 }
4767 return link_speed;
4768}
4769
4770/**
4771 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
4772 * @phba: pointer to lpfc hba data structure.
4773 * @evt_code: asynchronous event code.
4774 * @speed_code: asynchronous event link speed code.
4775 *
4776 * This routine is to parse the giving SLI4 async event link speed code into
4777 * value of Mbps for the link speed.
4778 *
4779 * Return: link speed in terms of Mbps.
4780 **/
4781static uint32_t
4782lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
4783 uint8_t speed_code)
4784{
4785 uint32_t port_speed;
4786
4787 switch (evt_code) {
4788 case LPFC_TRAILER_CODE_LINK:
4789 switch (speed_code) {
4790 case LPFC_ASYNC_LINK_SPEED_ZERO:
4791 port_speed = 0;
4792 break;
4793 case LPFC_ASYNC_LINK_SPEED_10MBPS:
4794 port_speed = 10;
4795 break;
4796 case LPFC_ASYNC_LINK_SPEED_100MBPS:
4797 port_speed = 100;
4798 break;
4799 case LPFC_ASYNC_LINK_SPEED_1GBPS:
4800 port_speed = 1000;
4801 break;
4802 case LPFC_ASYNC_LINK_SPEED_10GBPS:
4803 port_speed = 10000;
4804 break;
4805 case LPFC_ASYNC_LINK_SPEED_20GBPS:
4806 port_speed = 20000;
4807 break;
4808 case LPFC_ASYNC_LINK_SPEED_25GBPS:
4809 port_speed = 25000;
4810 break;
4811 case LPFC_ASYNC_LINK_SPEED_40GBPS:
4812 port_speed = 40000;
4813 break;
4814 default:
4815 port_speed = 0;
4816 }
4817 break;
4818 case LPFC_TRAILER_CODE_FC:
4819 switch (speed_code) {
4820 case LPFC_FC_LA_SPEED_UNKNOWN:
4821 port_speed = 0;
4822 break;
4823 case LPFC_FC_LA_SPEED_1G:
4824 port_speed = 1000;
4825 break;
4826 case LPFC_FC_LA_SPEED_2G:
4827 port_speed = 2000;
4828 break;
4829 case LPFC_FC_LA_SPEED_4G:
4830 port_speed = 4000;
4831 break;
4832 case LPFC_FC_LA_SPEED_8G:
4833 port_speed = 8000;
4834 break;
4835 case LPFC_FC_LA_SPEED_10G:
4836 port_speed = 10000;
4837 break;
4838 case LPFC_FC_LA_SPEED_16G:
4839 port_speed = 16000;
4840 break;
4841 case LPFC_FC_LA_SPEED_32G:
4842 port_speed = 32000;
4843 break;
4844 case LPFC_FC_LA_SPEED_64G:
4845 port_speed = 64000;
4846 break;
David Brazdil0f672f62019-12-10 10:32:29 +00004847 case LPFC_FC_LA_SPEED_128G:
4848 port_speed = 128000;
4849 break;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004850 default:
4851 port_speed = 0;
4852 }
4853 break;
4854 default:
4855 port_speed = 0;
4856 }
4857 return port_speed;
4858}
4859
4860/**
4861 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
4862 * @phba: pointer to lpfc hba data structure.
4863 * @acqe_link: pointer to the async link completion queue entry.
4864 *
4865 * This routine is to handle the SLI4 asynchronous FCoE link event.
4866 **/
4867static void
4868lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
4869 struct lpfc_acqe_link *acqe_link)
4870{
4871 struct lpfc_dmabuf *mp;
4872 LPFC_MBOXQ_t *pmb;
4873 MAILBOX_t *mb;
4874 struct lpfc_mbx_read_top *la;
4875 uint8_t att_type;
4876 int rc;
4877
4878 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
4879 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
4880 return;
4881 phba->fcoe_eventtag = acqe_link->event_tag;
4882 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
4883 if (!pmb) {
4884 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4885 "0395 The mboxq allocation failed\n");
4886 return;
4887 }
4888 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
4889 if (!mp) {
4890 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4891 "0396 The lpfc_dmabuf allocation failed\n");
4892 goto out_free_pmb;
4893 }
4894 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
4895 if (!mp->virt) {
4896 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
4897 "0397 The mbuf allocation failed\n");
4898 goto out_free_dmabuf;
4899 }
4900
4901 /* Cleanup any outstanding ELS commands */
4902 lpfc_els_flush_all_cmd(phba);
4903
4904 /* Block ELS IOCBs until we have done process link event */
4905 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
4906
4907 /* Update link event statistics */
4908 phba->sli.slistat.link_event++;
4909
4910 /* Create lpfc_handle_latt mailbox command from link ACQE */
4911 lpfc_read_topology(phba, pmb, mp);
4912 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
4913 pmb->vport = phba->pport;
4914
4915 /* Keep the link status for extra SLI4 state machine reference */
4916 phba->sli4_hba.link_state.speed =
4917 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
4918 bf_get(lpfc_acqe_link_speed, acqe_link));
4919 phba->sli4_hba.link_state.duplex =
4920 bf_get(lpfc_acqe_link_duplex, acqe_link);
4921 phba->sli4_hba.link_state.status =
4922 bf_get(lpfc_acqe_link_status, acqe_link);
4923 phba->sli4_hba.link_state.type =
4924 bf_get(lpfc_acqe_link_type, acqe_link);
4925 phba->sli4_hba.link_state.number =
4926 bf_get(lpfc_acqe_link_number, acqe_link);
4927 phba->sli4_hba.link_state.fault =
4928 bf_get(lpfc_acqe_link_fault, acqe_link);
4929 phba->sli4_hba.link_state.logical_speed =
4930 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
4931
4932 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4933 "2900 Async FC/FCoE Link event - Speed:%dGBit "
4934 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
4935 "Logical speed:%dMbps Fault:%d\n",
4936 phba->sli4_hba.link_state.speed,
4937 phba->sli4_hba.link_state.topology,
4938 phba->sli4_hba.link_state.status,
4939 phba->sli4_hba.link_state.type,
4940 phba->sli4_hba.link_state.number,
4941 phba->sli4_hba.link_state.logical_speed,
4942 phba->sli4_hba.link_state.fault);
4943 /*
4944 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
4945 * topology info. Note: Optional for non FC-AL ports.
4946 */
4947 if (!(phba->hba_flag & HBA_FCOE_MODE)) {
4948 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
4949 if (rc == MBX_NOT_FINISHED)
4950 goto out_free_dmabuf;
4951 return;
4952 }
4953 /*
4954 * For FCoE Mode: fill in all the topology information we need and call
4955 * the READ_TOPOLOGY completion routine to continue without actually
4956 * sending the READ_TOPOLOGY mailbox command to the port.
4957 */
4958 /* Initialize completion status */
4959 mb = &pmb->u.mb;
4960 mb->mbxStatus = MBX_SUCCESS;
4961
4962 /* Parse port fault information field */
4963 lpfc_sli4_parse_latt_fault(phba, acqe_link);
4964
4965 /* Parse and translate link attention fields */
4966 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
4967 la->eventTag = acqe_link->event_tag;
4968 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
4969 bf_set(lpfc_mbx_read_top_link_spd, la,
4970 (bf_get(lpfc_acqe_link_speed, acqe_link)));
4971
4972 /* Fake the the following irrelvant fields */
4973 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
4974 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
4975 bf_set(lpfc_mbx_read_top_il, la, 0);
4976 bf_set(lpfc_mbx_read_top_pb, la, 0);
4977 bf_set(lpfc_mbx_read_top_fa, la, 0);
4978 bf_set(lpfc_mbx_read_top_mm, la, 0);
4979
4980 /* Invoke the lpfc_handle_latt mailbox command callback function */
4981 lpfc_mbx_cmpl_read_topology(phba, pmb);
4982
4983 return;
4984
4985out_free_dmabuf:
4986 kfree(mp);
4987out_free_pmb:
4988 mempool_free(pmb, phba->mbox_mem_pool);
4989}
4990
4991/**
David Brazdil0f672f62019-12-10 10:32:29 +00004992 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
4993 * topology.
4994 * @phba: pointer to lpfc hba data structure.
4995 * @evt_code: asynchronous event code.
4996 * @speed_code: asynchronous event link speed code.
4997 *
4998 * This routine is to parse the giving SLI4 async event link speed code into
4999 * value of Read topology link speed.
5000 *
5001 * Return: link speed in terms of Read topology.
5002 **/
5003static uint8_t
5004lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
5005{
5006 uint8_t port_speed;
5007
5008 switch (speed_code) {
5009 case LPFC_FC_LA_SPEED_1G:
5010 port_speed = LPFC_LINK_SPEED_1GHZ;
5011 break;
5012 case LPFC_FC_LA_SPEED_2G:
5013 port_speed = LPFC_LINK_SPEED_2GHZ;
5014 break;
5015 case LPFC_FC_LA_SPEED_4G:
5016 port_speed = LPFC_LINK_SPEED_4GHZ;
5017 break;
5018 case LPFC_FC_LA_SPEED_8G:
5019 port_speed = LPFC_LINK_SPEED_8GHZ;
5020 break;
5021 case LPFC_FC_LA_SPEED_16G:
5022 port_speed = LPFC_LINK_SPEED_16GHZ;
5023 break;
5024 case LPFC_FC_LA_SPEED_32G:
5025 port_speed = LPFC_LINK_SPEED_32GHZ;
5026 break;
5027 case LPFC_FC_LA_SPEED_64G:
5028 port_speed = LPFC_LINK_SPEED_64GHZ;
5029 break;
5030 case LPFC_FC_LA_SPEED_128G:
5031 port_speed = LPFC_LINK_SPEED_128GHZ;
5032 break;
5033 case LPFC_FC_LA_SPEED_256G:
5034 port_speed = LPFC_LINK_SPEED_256GHZ;
5035 break;
5036 default:
5037 port_speed = 0;
5038 break;
5039 }
5040
5041 return port_speed;
5042}
5043
5044#define trunk_link_status(__idx)\
5045 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
5046 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
5047 "Link up" : "Link down") : "NA"
5048/* Did port __idx reported an error */
5049#define trunk_port_fault(__idx)\
5050 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
5051 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
5052
5053static void
5054lpfc_update_trunk_link_status(struct lpfc_hba *phba,
5055 struct lpfc_acqe_fc_la *acqe_fc)
5056{
5057 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
5058 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
5059
5060 phba->sli4_hba.link_state.speed =
5061 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
5062 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
5063
5064 phba->sli4_hba.link_state.logical_speed =
5065 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
5066 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
5067 phba->fc_linkspeed =
5068 lpfc_async_link_speed_to_read_top(
5069 phba,
5070 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
5071
5072 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
5073 phba->trunk_link.link0.state =
5074 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
5075 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
5076 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
5077 }
5078 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
5079 phba->trunk_link.link1.state =
5080 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
5081 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
5082 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
5083 }
5084 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
5085 phba->trunk_link.link2.state =
5086 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
5087 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
5088 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
5089 }
5090 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
5091 phba->trunk_link.link3.state =
5092 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
5093 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
5094 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
5095 }
5096
5097 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5098 "2910 Async FC Trunking Event - Speed:%d\n"
5099 "\tLogical speed:%d "
5100 "port0: %s port1: %s port2: %s port3: %s\n",
5101 phba->sli4_hba.link_state.speed,
5102 phba->sli4_hba.link_state.logical_speed,
5103 trunk_link_status(0), trunk_link_status(1),
5104 trunk_link_status(2), trunk_link_status(3));
5105
5106 if (port_fault)
5107 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5108 "3202 trunk error:0x%x (%s) seen on port0:%s "
5109 /*
5110 * SLI-4: We have only 0xA error codes
5111 * defined as of now. print an appropriate
5112 * message in case driver needs to be updated.
5113 */
5114 "port1:%s port2:%s port3:%s\n", err, err > 0xA ?
5115 "UNDEFINED. update driver." : trunk_errmsg[err],
5116 trunk_port_fault(0), trunk_port_fault(1),
5117 trunk_port_fault(2), trunk_port_fault(3));
5118}
5119
5120
5121/**
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005122 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
5123 * @phba: pointer to lpfc hba data structure.
5124 * @acqe_fc: pointer to the async fc completion queue entry.
5125 *
5126 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
5127 * that the event was received and then issue a read_topology mailbox command so
5128 * that the rest of the driver will treat it the same as SLI3.
5129 **/
5130static void
5131lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
5132{
5133 struct lpfc_dmabuf *mp;
5134 LPFC_MBOXQ_t *pmb;
5135 MAILBOX_t *mb;
5136 struct lpfc_mbx_read_top *la;
5137 int rc;
5138
5139 if (bf_get(lpfc_trailer_type, acqe_fc) !=
5140 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
5141 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5142 "2895 Non FC link Event detected.(%d)\n",
5143 bf_get(lpfc_trailer_type, acqe_fc));
5144 return;
5145 }
David Brazdil0f672f62019-12-10 10:32:29 +00005146
5147 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
5148 LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
5149 lpfc_update_trunk_link_status(phba, acqe_fc);
5150 return;
5151 }
5152
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005153 /* Keep the link status for extra SLI4 state machine reference */
5154 phba->sli4_hba.link_state.speed =
5155 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
5156 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
5157 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
5158 phba->sli4_hba.link_state.topology =
5159 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
5160 phba->sli4_hba.link_state.status =
5161 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
5162 phba->sli4_hba.link_state.type =
5163 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
5164 phba->sli4_hba.link_state.number =
5165 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
5166 phba->sli4_hba.link_state.fault =
5167 bf_get(lpfc_acqe_link_fault, acqe_fc);
David Brazdil0f672f62019-12-10 10:32:29 +00005168
5169 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
5170 LPFC_FC_LA_TYPE_LINK_DOWN)
5171 phba->sli4_hba.link_state.logical_speed = 0;
5172 else if (!phba->sli4_hba.conf_trunk)
5173 phba->sli4_hba.link_state.logical_speed =
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005174 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
David Brazdil0f672f62019-12-10 10:32:29 +00005175
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005176 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5177 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
5178 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
5179 "%dMbps Fault:%d\n",
5180 phba->sli4_hba.link_state.speed,
5181 phba->sli4_hba.link_state.topology,
5182 phba->sli4_hba.link_state.status,
5183 phba->sli4_hba.link_state.type,
5184 phba->sli4_hba.link_state.number,
5185 phba->sli4_hba.link_state.logical_speed,
5186 phba->sli4_hba.link_state.fault);
5187 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5188 if (!pmb) {
5189 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5190 "2897 The mboxq allocation failed\n");
5191 return;
5192 }
5193 mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
5194 if (!mp) {
5195 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5196 "2898 The lpfc_dmabuf allocation failed\n");
5197 goto out_free_pmb;
5198 }
5199 mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
5200 if (!mp->virt) {
5201 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5202 "2899 The mbuf allocation failed\n");
5203 goto out_free_dmabuf;
5204 }
5205
5206 /* Cleanup any outstanding ELS commands */
5207 lpfc_els_flush_all_cmd(phba);
5208
5209 /* Block ELS IOCBs until we have done process link event */
5210 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5211
5212 /* Update link event statistics */
5213 phba->sli.slistat.link_event++;
5214
5215 /* Create lpfc_handle_latt mailbox command from link ACQE */
5216 lpfc_read_topology(phba, pmb, mp);
5217 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
5218 pmb->vport = phba->pport;
5219
5220 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
5221 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
5222
5223 switch (phba->sli4_hba.link_state.status) {
5224 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
5225 phba->link_flag |= LS_MDS_LINK_DOWN;
5226 break;
5227 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
5228 phba->link_flag |= LS_MDS_LOOPBACK;
5229 break;
5230 default:
5231 break;
5232 }
5233
5234 /* Initialize completion status */
5235 mb = &pmb->u.mb;
5236 mb->mbxStatus = MBX_SUCCESS;
5237
5238 /* Parse port fault information field */
5239 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
5240
5241 /* Parse and translate link attention fields */
5242 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
5243 la->eventTag = acqe_fc->event_tag;
5244
5245 if (phba->sli4_hba.link_state.status ==
5246 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
5247 bf_set(lpfc_mbx_read_top_att_type, la,
5248 LPFC_FC_LA_TYPE_UNEXP_WWPN);
5249 } else {
5250 bf_set(lpfc_mbx_read_top_att_type, la,
5251 LPFC_FC_LA_TYPE_LINK_DOWN);
5252 }
5253 /* Invoke the mailbox command callback function */
5254 lpfc_mbx_cmpl_read_topology(phba, pmb);
5255
5256 return;
5257 }
5258
5259 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5260 if (rc == MBX_NOT_FINISHED)
5261 goto out_free_dmabuf;
5262 return;
5263
5264out_free_dmabuf:
5265 kfree(mp);
5266out_free_pmb:
5267 mempool_free(pmb, phba->mbox_mem_pool);
5268}
5269
5270/**
5271 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
5272 * @phba: pointer to lpfc hba data structure.
5273 * @acqe_fc: pointer to the async SLI completion queue entry.
5274 *
5275 * This routine is to handle the SLI4 asynchronous SLI events.
5276 **/
5277static void
5278lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
5279{
5280 char port_name;
5281 char message[128];
5282 uint8_t status;
5283 uint8_t evt_type;
5284 uint8_t operational = 0;
5285 struct temp_event temp_event_data;
5286 struct lpfc_acqe_misconfigured_event *misconfigured;
5287 struct Scsi_Host *shost;
David Brazdil0f672f62019-12-10 10:32:29 +00005288 struct lpfc_vport **vports;
5289 int rc, i;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005290
5291 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
5292
5293 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5294 "2901 Async SLI event - Event Data1:x%08x Event Data2:"
5295 "x%08x SLI Event Type:%d\n",
5296 acqe_sli->event_data1, acqe_sli->event_data2,
5297 evt_type);
5298
5299 port_name = phba->Port[0];
5300 if (port_name == 0x00)
5301 port_name = '?'; /* get port name is empty */
5302
5303 switch (evt_type) {
5304 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
5305 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
5306 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
5307 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
5308
5309 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
5310 "3190 Over Temperature:%d Celsius- Port Name %c\n",
5311 acqe_sli->event_data1, port_name);
5312
5313 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
5314 shost = lpfc_shost_from_vport(phba->pport);
5315 fc_host_post_vendor_event(shost, fc_get_event_number(),
5316 sizeof(temp_event_data),
5317 (char *)&temp_event_data,
5318 SCSI_NL_VID_TYPE_PCI
5319 | PCI_VENDOR_ID_EMULEX);
5320 break;
5321 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
5322 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
5323 temp_event_data.event_code = LPFC_NORMAL_TEMP;
5324 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
5325
5326 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5327 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
5328 acqe_sli->event_data1, port_name);
5329
5330 shost = lpfc_shost_from_vport(phba->pport);
5331 fc_host_post_vendor_event(shost, fc_get_event_number(),
5332 sizeof(temp_event_data),
5333 (char *)&temp_event_data,
5334 SCSI_NL_VID_TYPE_PCI
5335 | PCI_VENDOR_ID_EMULEX);
5336 break;
5337 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
5338 misconfigured = (struct lpfc_acqe_misconfigured_event *)
5339 &acqe_sli->event_data1;
5340
5341 /* fetch the status for this port */
5342 switch (phba->sli4_hba.lnk_info.lnk_no) {
5343 case LPFC_LINK_NUMBER_0:
5344 status = bf_get(lpfc_sli_misconfigured_port0_state,
5345 &misconfigured->theEvent);
5346 operational = bf_get(lpfc_sli_misconfigured_port0_op,
5347 &misconfigured->theEvent);
5348 break;
5349 case LPFC_LINK_NUMBER_1:
5350 status = bf_get(lpfc_sli_misconfigured_port1_state,
5351 &misconfigured->theEvent);
5352 operational = bf_get(lpfc_sli_misconfigured_port1_op,
5353 &misconfigured->theEvent);
5354 break;
5355 case LPFC_LINK_NUMBER_2:
5356 status = bf_get(lpfc_sli_misconfigured_port2_state,
5357 &misconfigured->theEvent);
5358 operational = bf_get(lpfc_sli_misconfigured_port2_op,
5359 &misconfigured->theEvent);
5360 break;
5361 case LPFC_LINK_NUMBER_3:
5362 status = bf_get(lpfc_sli_misconfigured_port3_state,
5363 &misconfigured->theEvent);
5364 operational = bf_get(lpfc_sli_misconfigured_port3_op,
5365 &misconfigured->theEvent);
5366 break;
5367 default:
5368 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5369 "3296 "
5370 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
5371 "event: Invalid link %d",
5372 phba->sli4_hba.lnk_info.lnk_no);
5373 return;
5374 }
5375
5376 /* Skip if optic state unchanged */
5377 if (phba->sli4_hba.lnk_info.optic_state == status)
5378 return;
5379
5380 switch (status) {
5381 case LPFC_SLI_EVENT_STATUS_VALID:
5382 sprintf(message, "Physical Link is functional");
5383 break;
5384 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
5385 sprintf(message, "Optics faulted/incorrectly "
5386 "installed/not installed - Reseat optics, "
5387 "if issue not resolved, replace.");
5388 break;
5389 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
5390 sprintf(message,
5391 "Optics of two types installed - Remove one "
5392 "optic or install matching pair of optics.");
5393 break;
5394 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
5395 sprintf(message, "Incompatible optics - Replace with "
5396 "compatible optics for card to function.");
5397 break;
5398 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
5399 sprintf(message, "Unqualified optics - Replace with "
5400 "Avago optics for Warranty and Technical "
5401 "Support - Link is%s operational",
5402 (operational) ? " not" : "");
5403 break;
5404 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
5405 sprintf(message, "Uncertified optics - Replace with "
5406 "Avago-certified optics to enable link "
5407 "operation - Link is%s operational",
5408 (operational) ? " not" : "");
5409 break;
5410 default:
5411 /* firmware is reporting a status we don't know about */
5412 sprintf(message, "Unknown event status x%02x", status);
5413 break;
5414 }
David Brazdil0f672f62019-12-10 10:32:29 +00005415
5416 /* Issue READ_CONFIG mbox command to refresh supported speeds */
5417 rc = lpfc_sli4_read_config(phba);
5418 if (rc) {
5419 phba->lmt = 0;
5420 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5421 "3194 Unable to retrieve supported "
5422 "speeds, rc = 0x%x\n", rc);
5423 }
5424 vports = lpfc_create_vport_work_array(phba);
5425 if (vports != NULL) {
5426 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5427 i++) {
5428 shost = lpfc_shost_from_vport(vports[i]);
5429 lpfc_host_supported_speeds_set(shost);
5430 }
5431 }
5432 lpfc_destroy_vport_work_array(phba, vports);
5433
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005434 phba->sli4_hba.lnk_info.optic_state = status;
5435 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5436 "3176 Port Name %c %s\n", port_name, message);
5437 break;
5438 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
5439 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5440 "3192 Remote DPort Test Initiated - "
5441 "Event Data1:x%08x Event Data2: x%08x\n",
5442 acqe_sli->event_data1, acqe_sli->event_data2);
5443 break;
5444 default:
5445 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5446 "3193 Async SLI event - Event Data1:x%08x Event Data2:"
5447 "x%08x SLI Event Type:%d\n",
5448 acqe_sli->event_data1, acqe_sli->event_data2,
5449 evt_type);
5450 break;
5451 }
5452}
5453
5454/**
5455 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
5456 * @vport: pointer to vport data structure.
5457 *
5458 * This routine is to perform Clear Virtual Link (CVL) on a vport in
5459 * response to a CVL event.
5460 *
5461 * Return the pointer to the ndlp with the vport if successful, otherwise
5462 * return NULL.
5463 **/
5464static struct lpfc_nodelist *
5465lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
5466{
5467 struct lpfc_nodelist *ndlp;
5468 struct Scsi_Host *shost;
5469 struct lpfc_hba *phba;
5470
5471 if (!vport)
5472 return NULL;
5473 phba = vport->phba;
5474 if (!phba)
5475 return NULL;
5476 ndlp = lpfc_findnode_did(vport, Fabric_DID);
5477 if (!ndlp) {
5478 /* Cannot find existing Fabric ndlp, so allocate a new one */
5479 ndlp = lpfc_nlp_init(vport, Fabric_DID);
5480 if (!ndlp)
5481 return 0;
5482 /* Set the node type */
5483 ndlp->nlp_type |= NLP_FABRIC;
5484 /* Put ndlp onto node list */
5485 lpfc_enqueue_node(vport, ndlp);
5486 } else if (!NLP_CHK_NODE_ACT(ndlp)) {
5487 /* re-setup ndlp without removing from node list */
5488 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
5489 if (!ndlp)
5490 return 0;
5491 }
5492 if ((phba->pport->port_state < LPFC_FLOGI) &&
5493 (phba->pport->port_state != LPFC_VPORT_FAILED))
5494 return NULL;
5495 /* If virtual link is not yet instantiated ignore CVL */
5496 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
5497 && (vport->port_state != LPFC_VPORT_FAILED))
5498 return NULL;
5499 shost = lpfc_shost_from_vport(vport);
5500 if (!shost)
5501 return NULL;
5502 lpfc_linkdown_port(vport);
5503 lpfc_cleanup_pending_mbox(vport);
5504 spin_lock_irq(shost->host_lock);
5505 vport->fc_flag |= FC_VPORT_CVL_RCVD;
5506 spin_unlock_irq(shost->host_lock);
5507
5508 return ndlp;
5509}
5510
5511/**
5512 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
5513 * @vport: pointer to lpfc hba data structure.
5514 *
5515 * This routine is to perform Clear Virtual Link (CVL) on all vports in
5516 * response to a FCF dead event.
5517 **/
5518static void
5519lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
5520{
5521 struct lpfc_vport **vports;
5522 int i;
5523
5524 vports = lpfc_create_vport_work_array(phba);
5525 if (vports)
5526 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
5527 lpfc_sli4_perform_vport_cvl(vports[i]);
5528 lpfc_destroy_vport_work_array(phba, vports);
5529}
5530
5531/**
5532 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
5533 * @phba: pointer to lpfc hba data structure.
5534 * @acqe_link: pointer to the async fcoe completion queue entry.
5535 *
5536 * This routine is to handle the SLI4 asynchronous fcoe event.
5537 **/
5538static void
5539lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
5540 struct lpfc_acqe_fip *acqe_fip)
5541{
5542 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
5543 int rc;
5544 struct lpfc_vport *vport;
5545 struct lpfc_nodelist *ndlp;
5546 struct Scsi_Host *shost;
5547 int active_vlink_present;
5548 struct lpfc_vport **vports;
5549 int i;
5550
5551 phba->fc_eventTag = acqe_fip->event_tag;
5552 phba->fcoe_eventtag = acqe_fip->event_tag;
5553 switch (event_type) {
5554 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
5555 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
5556 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
5557 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5558 LOG_DISCOVERY,
5559 "2546 New FCF event, evt_tag:x%x, "
5560 "index:x%x\n",
5561 acqe_fip->event_tag,
5562 acqe_fip->index);
5563 else
5564 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
5565 LOG_DISCOVERY,
5566 "2788 FCF param modified event, "
5567 "evt_tag:x%x, index:x%x\n",
5568 acqe_fip->event_tag,
5569 acqe_fip->index);
5570 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
5571 /*
5572 * During period of FCF discovery, read the FCF
5573 * table record indexed by the event to update
5574 * FCF roundrobin failover eligible FCF bmask.
5575 */
5576 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5577 LOG_DISCOVERY,
5578 "2779 Read FCF (x%x) for updating "
5579 "roundrobin FCF failover bmask\n",
5580 acqe_fip->index);
5581 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
5582 }
5583
5584 /* If the FCF discovery is in progress, do nothing. */
5585 spin_lock_irq(&phba->hbalock);
5586 if (phba->hba_flag & FCF_TS_INPROG) {
5587 spin_unlock_irq(&phba->hbalock);
5588 break;
5589 }
5590 /* If fast FCF failover rescan event is pending, do nothing */
David Brazdil0f672f62019-12-10 10:32:29 +00005591 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005592 spin_unlock_irq(&phba->hbalock);
5593 break;
5594 }
5595
5596 /* If the FCF has been in discovered state, do nothing. */
5597 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
5598 spin_unlock_irq(&phba->hbalock);
5599 break;
5600 }
5601 spin_unlock_irq(&phba->hbalock);
5602
5603 /* Otherwise, scan the entire FCF table and re-discover SAN */
5604 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5605 "2770 Start FCF table scan per async FCF "
5606 "event, evt_tag:x%x, index:x%x\n",
5607 acqe_fip->event_tag, acqe_fip->index);
5608 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
5609 LPFC_FCOE_FCF_GET_FIRST);
5610 if (rc)
5611 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5612 "2547 Issue FCF scan read FCF mailbox "
5613 "command failed (x%x)\n", rc);
5614 break;
5615
5616 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
5617 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5618 "2548 FCF Table full count 0x%x tag 0x%x\n",
5619 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
5620 acqe_fip->event_tag);
5621 break;
5622
5623 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
5624 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
5625 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5626 "2549 FCF (x%x) disconnected from network, "
5627 "tag:x%x\n", acqe_fip->index, acqe_fip->event_tag);
5628 /*
5629 * If we are in the middle of FCF failover process, clear
5630 * the corresponding FCF bit in the roundrobin bitmap.
5631 */
5632 spin_lock_irq(&phba->hbalock);
5633 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
5634 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
5635 spin_unlock_irq(&phba->hbalock);
5636 /* Update FLOGI FCF failover eligible FCF bmask */
5637 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
5638 break;
5639 }
5640 spin_unlock_irq(&phba->hbalock);
5641
5642 /* If the event is not for currently used fcf do nothing */
5643 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
5644 break;
5645
5646 /*
5647 * Otherwise, request the port to rediscover the entire FCF
5648 * table for a fast recovery from case that the current FCF
5649 * is no longer valid as we are not in the middle of FCF
5650 * failover process already.
5651 */
5652 spin_lock_irq(&phba->hbalock);
5653 /* Mark the fast failover process in progress */
5654 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
5655 spin_unlock_irq(&phba->hbalock);
5656
5657 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5658 "2771 Start FCF fast failover process due to "
5659 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
5660 "\n", acqe_fip->event_tag, acqe_fip->index);
5661 rc = lpfc_sli4_redisc_fcf_table(phba);
5662 if (rc) {
5663 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5664 LOG_DISCOVERY,
5665 "2772 Issue FCF rediscover mailbox "
5666 "command failed, fail through to FCF "
5667 "dead event\n");
5668 spin_lock_irq(&phba->hbalock);
5669 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
5670 spin_unlock_irq(&phba->hbalock);
5671 /*
5672 * Last resort will fail over by treating this
5673 * as a link down to FCF registration.
5674 */
5675 lpfc_sli4_fcf_dead_failthrough(phba);
5676 } else {
5677 /* Reset FCF roundrobin bmask for new discovery */
5678 lpfc_sli4_clear_fcf_rr_bmask(phba);
5679 /*
5680 * Handling fast FCF failover to a DEAD FCF event is
5681 * considered equalivant to receiving CVL to all vports.
5682 */
5683 lpfc_sli4_perform_all_vport_cvl(phba);
5684 }
5685 break;
5686 case LPFC_FIP_EVENT_TYPE_CVL:
5687 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
5688 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5689 "2718 Clear Virtual Link Received for VPI 0x%x"
5690 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
5691
5692 vport = lpfc_find_vport_by_vpid(phba,
5693 acqe_fip->index);
5694 ndlp = lpfc_sli4_perform_vport_cvl(vport);
5695 if (!ndlp)
5696 break;
5697 active_vlink_present = 0;
5698
5699 vports = lpfc_create_vport_work_array(phba);
5700 if (vports) {
5701 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
5702 i++) {
5703 if ((!(vports[i]->fc_flag &
5704 FC_VPORT_CVL_RCVD)) &&
5705 (vports[i]->port_state > LPFC_FDISC)) {
5706 active_vlink_present = 1;
5707 break;
5708 }
5709 }
5710 lpfc_destroy_vport_work_array(phba, vports);
5711 }
5712
5713 /*
5714 * Don't re-instantiate if vport is marked for deletion.
5715 * If we are here first then vport_delete is going to wait
5716 * for discovery to complete.
5717 */
5718 if (!(vport->load_flag & FC_UNLOADING) &&
5719 active_vlink_present) {
5720 /*
5721 * If there are other active VLinks present,
5722 * re-instantiate the Vlink using FDISC.
5723 */
5724 mod_timer(&ndlp->nlp_delayfunc,
5725 jiffies + msecs_to_jiffies(1000));
5726 shost = lpfc_shost_from_vport(vport);
5727 spin_lock_irq(shost->host_lock);
5728 ndlp->nlp_flag |= NLP_DELAY_TMO;
5729 spin_unlock_irq(shost->host_lock);
5730 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
5731 vport->port_state = LPFC_FDISC;
5732 } else {
5733 /*
5734 * Otherwise, we request port to rediscover
5735 * the entire FCF table for a fast recovery
5736 * from possible case that the current FCF
5737 * is no longer valid if we are not already
5738 * in the FCF failover process.
5739 */
5740 spin_lock_irq(&phba->hbalock);
5741 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
5742 spin_unlock_irq(&phba->hbalock);
5743 break;
5744 }
5745 /* Mark the fast failover process in progress */
5746 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
5747 spin_unlock_irq(&phba->hbalock);
5748 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
5749 LOG_DISCOVERY,
5750 "2773 Start FCF failover per CVL, "
5751 "evt_tag:x%x\n", acqe_fip->event_tag);
5752 rc = lpfc_sli4_redisc_fcf_table(phba);
5753 if (rc) {
5754 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
5755 LOG_DISCOVERY,
5756 "2774 Issue FCF rediscover "
5757 "mailbox command failed, "
5758 "through to CVL event\n");
5759 spin_lock_irq(&phba->hbalock);
5760 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
5761 spin_unlock_irq(&phba->hbalock);
5762 /*
5763 * Last resort will be re-try on the
5764 * the current registered FCF entry.
5765 */
5766 lpfc_retry_pport_discovery(phba);
5767 } else
5768 /*
5769 * Reset FCF roundrobin bmask for new
5770 * discovery.
5771 */
5772 lpfc_sli4_clear_fcf_rr_bmask(phba);
5773 }
5774 break;
5775 default:
5776 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5777 "0288 Unknown FCoE event type 0x%x event tag "
5778 "0x%x\n", event_type, acqe_fip->event_tag);
5779 break;
5780 }
5781}
5782
5783/**
5784 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
5785 * @phba: pointer to lpfc hba data structure.
5786 * @acqe_link: pointer to the async dcbx completion queue entry.
5787 *
5788 * This routine is to handle the SLI4 asynchronous dcbx event.
5789 **/
5790static void
5791lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
5792 struct lpfc_acqe_dcbx *acqe_dcbx)
5793{
5794 phba->fc_eventTag = acqe_dcbx->event_tag;
5795 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5796 "0290 The SLI4 DCBX asynchronous event is not "
5797 "handled yet\n");
5798}
5799
5800/**
5801 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
5802 * @phba: pointer to lpfc hba data structure.
5803 * @acqe_link: pointer to the async grp5 completion queue entry.
5804 *
5805 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
5806 * is an asynchronous notified of a logical link speed change. The Port
5807 * reports the logical link speed in units of 10Mbps.
5808 **/
5809static void
5810lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
5811 struct lpfc_acqe_grp5 *acqe_grp5)
5812{
5813 uint16_t prev_ll_spd;
5814
5815 phba->fc_eventTag = acqe_grp5->event_tag;
5816 phba->fcoe_eventtag = acqe_grp5->event_tag;
5817 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5818 phba->sli4_hba.link_state.logical_speed =
5819 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
5820 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5821 "2789 GRP5 Async Event: Updating logical link speed "
5822 "from %dMbps to %dMbps\n", prev_ll_spd,
5823 phba->sli4_hba.link_state.logical_speed);
5824}
5825
5826/**
5827 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
5828 * @phba: pointer to lpfc hba data structure.
5829 *
5830 * This routine is invoked by the worker thread to process all the pending
5831 * SLI4 asynchronous events.
5832 **/
5833void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
5834{
5835 struct lpfc_cq_event *cq_event;
5836
5837 /* First, declare the async event has been handled */
5838 spin_lock_irq(&phba->hbalock);
5839 phba->hba_flag &= ~ASYNC_EVENT;
5840 spin_unlock_irq(&phba->hbalock);
5841 /* Now, handle all the async events */
5842 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5843 /* Get the first event from the head of the event queue */
5844 spin_lock_irq(&phba->hbalock);
5845 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5846 cq_event, struct lpfc_cq_event, list);
5847 spin_unlock_irq(&phba->hbalock);
5848 /* Process the asynchronous event */
5849 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
5850 case LPFC_TRAILER_CODE_LINK:
5851 lpfc_sli4_async_link_evt(phba,
5852 &cq_event->cqe.acqe_link);
5853 break;
5854 case LPFC_TRAILER_CODE_FCOE:
5855 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
5856 break;
5857 case LPFC_TRAILER_CODE_DCBX:
5858 lpfc_sli4_async_dcbx_evt(phba,
5859 &cq_event->cqe.acqe_dcbx);
5860 break;
5861 case LPFC_TRAILER_CODE_GRP5:
5862 lpfc_sli4_async_grp5_evt(phba,
5863 &cq_event->cqe.acqe_grp5);
5864 break;
5865 case LPFC_TRAILER_CODE_FC:
5866 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
5867 break;
5868 case LPFC_TRAILER_CODE_SLI:
5869 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
5870 break;
5871 default:
5872 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
5873 "1804 Invalid asynchrous event code: "
5874 "x%x\n", bf_get(lpfc_trailer_code,
5875 &cq_event->cqe.mcqe_cmpl));
5876 break;
5877 }
5878 /* Free the completion event processed to the free pool */
5879 lpfc_sli4_cq_event_release(phba, cq_event);
5880 }
5881}
5882
5883/**
5884 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
5885 * @phba: pointer to lpfc hba data structure.
5886 *
5887 * This routine is invoked by the worker thread to process FCF table
5888 * rediscovery pending completion event.
5889 **/
5890void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
5891{
5892 int rc;
5893
5894 spin_lock_irq(&phba->hbalock);
5895 /* Clear FCF rediscovery timeout event */
5896 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
5897 /* Clear driver fast failover FCF record flag */
5898 phba->fcf.failover_rec.flag = 0;
5899 /* Set state for FCF fast failover */
5900 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
5901 spin_unlock_irq(&phba->hbalock);
5902
5903 /* Scan FCF table from the first entry to re-discover SAN */
5904 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
5905 "2777 Start post-quiescent FCF table scan\n");
5906 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
5907 if (rc)
5908 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | LOG_DISCOVERY,
5909 "2747 Issue FCF scan read FCF mailbox "
5910 "command failed 0x%x\n", rc);
5911}
5912
5913/**
5914 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
5915 * @phba: pointer to lpfc hba data structure.
5916 * @dev_grp: The HBA PCI-Device group number.
5917 *
5918 * This routine is invoked to set up the per HBA PCI-Device group function
5919 * API jump table entries.
5920 *
5921 * Return: 0 if success, otherwise -ENODEV
5922 **/
5923int
5924lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
5925{
5926 int rc;
5927
5928 /* Set up lpfc PCI-device group */
5929 phba->pci_dev_grp = dev_grp;
5930
5931 /* The LPFC_PCI_DEV_OC uses SLI4 */
5932 if (dev_grp == LPFC_PCI_DEV_OC)
5933 phba->sli_rev = LPFC_SLI_REV4;
5934
5935 /* Set up device INIT API function jump table */
5936 rc = lpfc_init_api_table_setup(phba, dev_grp);
5937 if (rc)
5938 return -ENODEV;
5939 /* Set up SCSI API function jump table */
5940 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
5941 if (rc)
5942 return -ENODEV;
5943 /* Set up SLI API function jump table */
5944 rc = lpfc_sli_api_table_setup(phba, dev_grp);
5945 if (rc)
5946 return -ENODEV;
5947 /* Set up MBOX API function jump table */
5948 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
5949 if (rc)
5950 return -ENODEV;
5951
5952 return 0;
5953}
5954
5955/**
5956 * lpfc_log_intr_mode - Log the active interrupt mode
5957 * @phba: pointer to lpfc hba data structure.
5958 * @intr_mode: active interrupt mode adopted.
5959 *
5960 * This routine it invoked to log the currently used active interrupt mode
5961 * to the device.
5962 **/
5963static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
5964{
5965 switch (intr_mode) {
5966 case 0:
5967 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5968 "0470 Enable INTx interrupt mode.\n");
5969 break;
5970 case 1:
5971 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5972 "0481 Enabled MSI interrupt mode.\n");
5973 break;
5974 case 2:
5975 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
5976 "0480 Enabled MSI-X interrupt mode.\n");
5977 break;
5978 default:
5979 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
5980 "0482 Illegal interrupt mode.\n");
5981 break;
5982 }
5983 return;
5984}
5985
5986/**
5987 * lpfc_enable_pci_dev - Enable a generic PCI device.
5988 * @phba: pointer to lpfc hba data structure.
5989 *
5990 * This routine is invoked to enable the PCI device that is common to all
5991 * PCI devices.
5992 *
5993 * Return codes
5994 * 0 - successful
5995 * other values - error
5996 **/
5997static int
5998lpfc_enable_pci_dev(struct lpfc_hba *phba)
5999{
6000 struct pci_dev *pdev;
6001
6002 /* Obtain PCI device reference */
6003 if (!phba->pcidev)
6004 goto out_error;
6005 else
6006 pdev = phba->pcidev;
6007 /* Enable PCI device */
6008 if (pci_enable_device_mem(pdev))
6009 goto out_error;
6010 /* Request PCI resource for the device */
6011 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
6012 goto out_disable_device;
6013 /* Set up device as PCI master and save state for EEH */
6014 pci_set_master(pdev);
6015 pci_try_set_mwi(pdev);
6016 pci_save_state(pdev);
6017
6018 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
6019 if (pci_is_pcie(pdev))
6020 pdev->needs_freset = 1;
6021
6022 return 0;
6023
6024out_disable_device:
6025 pci_disable_device(pdev);
6026out_error:
6027 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6028 "1401 Failed to enable pci device\n");
6029 return -ENODEV;
6030}
6031
6032/**
6033 * lpfc_disable_pci_dev - Disable a generic PCI device.
6034 * @phba: pointer to lpfc hba data structure.
6035 *
6036 * This routine is invoked to disable the PCI device that is common to all
6037 * PCI devices.
6038 **/
6039static void
6040lpfc_disable_pci_dev(struct lpfc_hba *phba)
6041{
6042 struct pci_dev *pdev;
6043
6044 /* Obtain PCI device reference */
6045 if (!phba->pcidev)
6046 return;
6047 else
6048 pdev = phba->pcidev;
6049 /* Release PCI resource and disable PCI device */
6050 pci_release_mem_regions(pdev);
6051 pci_disable_device(pdev);
6052
6053 return;
6054}
6055
6056/**
6057 * lpfc_reset_hba - Reset a hba
6058 * @phba: pointer to lpfc hba data structure.
6059 *
6060 * This routine is invoked to reset a hba device. It brings the HBA
6061 * offline, performs a board restart, and then brings the board back
6062 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
6063 * on outstanding mailbox commands.
6064 **/
6065void
6066lpfc_reset_hba(struct lpfc_hba *phba)
6067{
6068 /* If resets are disabled then set error state and return. */
6069 if (!phba->cfg_enable_hba_reset) {
6070 phba->link_state = LPFC_HBA_ERROR;
6071 return;
6072 }
6073 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
6074 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
6075 else
6076 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
6077 lpfc_offline(phba);
6078 lpfc_sli_brdrestart(phba);
6079 lpfc_online(phba);
6080 lpfc_unblock_mgmt_io(phba);
6081}
6082
6083/**
6084 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
6085 * @phba: pointer to lpfc hba data structure.
6086 *
6087 * This function enables the PCI SR-IOV virtual functions to a physical
6088 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
6089 * enable the number of virtual functions to the physical function. As
6090 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
6091 * API call does not considered as an error condition for most of the device.
6092 **/
6093uint16_t
6094lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
6095{
6096 struct pci_dev *pdev = phba->pcidev;
6097 uint16_t nr_virtfn;
6098 int pos;
6099
6100 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6101 if (pos == 0)
6102 return 0;
6103
6104 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
6105 return nr_virtfn;
6106}
6107
6108/**
6109 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
6110 * @phba: pointer to lpfc hba data structure.
6111 * @nr_vfn: number of virtual functions to be enabled.
6112 *
6113 * This function enables the PCI SR-IOV virtual functions to a physical
6114 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
6115 * enable the number of virtual functions to the physical function. As
6116 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
6117 * API call does not considered as an error condition for most of the device.
6118 **/
6119int
6120lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
6121{
6122 struct pci_dev *pdev = phba->pcidev;
6123 uint16_t max_nr_vfn;
6124 int rc;
6125
6126 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
6127 if (nr_vfn > max_nr_vfn) {
6128 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6129 "3057 Requested vfs (%d) greater than "
6130 "supported vfs (%d)", nr_vfn, max_nr_vfn);
6131 return -EINVAL;
6132 }
6133
6134 rc = pci_enable_sriov(pdev, nr_vfn);
6135 if (rc) {
6136 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6137 "2806 Failed to enable sriov on this device "
6138 "with vfn number nr_vf:%d, rc:%d\n",
6139 nr_vfn, rc);
6140 } else
6141 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6142 "2807 Successful enable sriov on this device "
6143 "with vfn number nr_vf:%d\n", nr_vfn);
6144 return rc;
6145}
6146
6147/**
6148 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
6149 * @phba: pointer to lpfc hba data structure.
6150 *
6151 * This routine is invoked to set up the driver internal resources before the
6152 * device specific resource setup to support the HBA device it attached to.
6153 *
6154 * Return codes
6155 * 0 - successful
6156 * other values - error
6157 **/
6158static int
6159lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
6160{
6161 struct lpfc_sli *psli = &phba->sli;
6162
6163 /*
6164 * Driver resources common to all SLI revisions
6165 */
6166 atomic_set(&phba->fast_event_count, 0);
6167 spin_lock_init(&phba->hbalock);
6168
6169 /* Initialize ndlp management spinlock */
6170 spin_lock_init(&phba->ndlp_lock);
6171
David Brazdil0f672f62019-12-10 10:32:29 +00006172 /* Initialize port_list spinlock */
6173 spin_lock_init(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006174 INIT_LIST_HEAD(&phba->port_list);
David Brazdil0f672f62019-12-10 10:32:29 +00006175
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006176 INIT_LIST_HEAD(&phba->work_list);
6177 init_waitqueue_head(&phba->wait_4_mlo_m_q);
6178
6179 /* Initialize the wait queue head for the kernel thread */
6180 init_waitqueue_head(&phba->work_waitq);
6181
6182 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
6183 "1403 Protocols supported %s %s %s\n",
6184 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
6185 "SCSI" : " "),
6186 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
6187 "NVME" : " "),
6188 (phba->nvmet_support ? "NVMET" : " "));
6189
David Brazdil0f672f62019-12-10 10:32:29 +00006190 /* Initialize the IO buffer list used by driver for SLI3 SCSI */
6191 spin_lock_init(&phba->scsi_buf_list_get_lock);
6192 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
6193 spin_lock_init(&phba->scsi_buf_list_put_lock);
6194 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006195
6196 /* Initialize the fabric iocb list */
6197 INIT_LIST_HEAD(&phba->fabric_iocb_list);
6198
6199 /* Initialize list to save ELS buffers */
6200 INIT_LIST_HEAD(&phba->elsbuf);
6201
6202 /* Initialize FCF connection rec list */
6203 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
6204
6205 /* Initialize OAS configuration list */
6206 spin_lock_init(&phba->devicelock);
6207 INIT_LIST_HEAD(&phba->luns);
6208
6209 /* MBOX heartbeat timer */
6210 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
6211 /* Fabric block timer */
6212 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
6213 /* EA polling mode timer */
6214 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
6215 /* Heartbeat timer */
6216 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
6217
David Brazdil0f672f62019-12-10 10:32:29 +00006218 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
6219
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006220 return 0;
6221}
6222
6223/**
6224 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
6225 * @phba: pointer to lpfc hba data structure.
6226 *
6227 * This routine is invoked to set up the driver internal resources specific to
6228 * support the SLI-3 HBA device it attached to.
6229 *
6230 * Return codes
6231 * 0 - successful
6232 * other values - error
6233 **/
6234static int
6235lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
6236{
David Brazdil0f672f62019-12-10 10:32:29 +00006237 int rc, entry_sz;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006238
6239 /*
6240 * Initialize timers used by driver
6241 */
6242
6243 /* FCP polling mode timer */
6244 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
6245
6246 /* Host attention work mask setup */
6247 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
6248 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
6249
6250 /* Get all the module params for configuring this host */
6251 lpfc_get_cfgparam(phba);
6252 /* Set up phase-1 common device driver resources */
6253
6254 rc = lpfc_setup_driver_resource_phase1(phba);
6255 if (rc)
6256 return -ENODEV;
6257
6258 if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
6259 phba->menlo_flag |= HBA_MENLO_SUPPORT;
6260 /* check for menlo minimum sg count */
6261 if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
6262 phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
6263 }
6264
6265 if (!phba->sli.sli3_ring)
6266 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING,
6267 sizeof(struct lpfc_sli_ring),
6268 GFP_KERNEL);
6269 if (!phba->sli.sli3_ring)
6270 return -ENOMEM;
6271
6272 /*
6273 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
6274 * used to create the sg_dma_buf_pool must be dynamically calculated.
6275 */
6276
6277 /* Initialize the host templates the configured values. */
6278 lpfc_vport_template.sg_tablesize = phba->cfg_sg_seg_cnt;
6279 lpfc_template_no_hr.sg_tablesize = phba->cfg_sg_seg_cnt;
6280 lpfc_template.sg_tablesize = phba->cfg_sg_seg_cnt;
6281
David Brazdil0f672f62019-12-10 10:32:29 +00006282 if (phba->sli_rev == LPFC_SLI_REV4)
6283 entry_sz = sizeof(struct sli4_sge);
6284 else
6285 entry_sz = sizeof(struct ulp_bde64);
6286
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006287 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
6288 if (phba->cfg_enable_bg) {
6289 /*
6290 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
6291 * the FCP rsp, and a BDE for each. Sice we have no control
6292 * over how many protection data segments the SCSI Layer
6293 * will hand us (ie: there could be one for every block
6294 * in the IO), we just allocate enough BDEs to accomidate
6295 * our max amount and we need to limit lpfc_sg_seg_cnt to
6296 * minimize the risk of running out.
6297 */
6298 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
6299 sizeof(struct fcp_rsp) +
David Brazdil0f672f62019-12-10 10:32:29 +00006300 (LPFC_MAX_SG_SEG_CNT * entry_sz);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006301
6302 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
6303 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
6304
6305 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
6306 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
6307 } else {
6308 /*
6309 * The scsi_buf for a regular I/O will hold the FCP cmnd,
6310 * the FCP rsp, a BDE for each, and a BDE for up to
6311 * cfg_sg_seg_cnt data segments.
6312 */
6313 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
6314 sizeof(struct fcp_rsp) +
David Brazdil0f672f62019-12-10 10:32:29 +00006315 ((phba->cfg_sg_seg_cnt + 2) * entry_sz);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006316
6317 /* Total BDEs in BPL for scsi_sg_list */
6318 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
6319 }
6320
6321 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
6322 "9088 sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
6323 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
6324 phba->cfg_total_seg_cnt);
6325
6326 phba->max_vpi = LPFC_MAX_VPI;
6327 /* This will be set to correct value after config_port mbox */
6328 phba->max_vports = 0;
6329
6330 /*
6331 * Initialize the SLI Layer to run with lpfc HBAs.
6332 */
6333 lpfc_sli_setup(phba);
6334 lpfc_sli_queue_init(phba);
6335
6336 /* Allocate device driver memory */
6337 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
6338 return -ENOMEM;
6339
David Brazdil0f672f62019-12-10 10:32:29 +00006340 phba->lpfc_sg_dma_buf_pool =
6341 dma_pool_create("lpfc_sg_dma_buf_pool",
6342 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size,
6343 BPL_ALIGN_SZ, 0);
6344
6345 if (!phba->lpfc_sg_dma_buf_pool)
6346 goto fail_free_mem;
6347
6348 phba->lpfc_cmd_rsp_buf_pool =
6349 dma_pool_create("lpfc_cmd_rsp_buf_pool",
6350 &phba->pcidev->dev,
6351 sizeof(struct fcp_cmnd) +
6352 sizeof(struct fcp_rsp),
6353 BPL_ALIGN_SZ, 0);
6354
6355 if (!phba->lpfc_cmd_rsp_buf_pool)
6356 goto fail_free_dma_buf_pool;
6357
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006358 /*
6359 * Enable sr-iov virtual functions if supported and configured
6360 * through the module parameter.
6361 */
6362 if (phba->cfg_sriov_nr_virtfn > 0) {
6363 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6364 phba->cfg_sriov_nr_virtfn);
6365 if (rc) {
6366 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6367 "2808 Requested number of SR-IOV "
6368 "virtual functions (%d) is not "
6369 "supported\n",
6370 phba->cfg_sriov_nr_virtfn);
6371 phba->cfg_sriov_nr_virtfn = 0;
6372 }
6373 }
6374
6375 return 0;
David Brazdil0f672f62019-12-10 10:32:29 +00006376
6377fail_free_dma_buf_pool:
6378 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
6379 phba->lpfc_sg_dma_buf_pool = NULL;
6380fail_free_mem:
6381 lpfc_mem_free(phba);
6382 return -ENOMEM;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006383}
6384
6385/**
6386 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
6387 * @phba: pointer to lpfc hba data structure.
6388 *
6389 * This routine is invoked to unset the driver internal resources set up
6390 * specific for supporting the SLI-3 HBA device it attached to.
6391 **/
6392static void
6393lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
6394{
6395 /* Free device driver memory allocated */
6396 lpfc_mem_free_all(phba);
6397
6398 return;
6399}
6400
6401/**
6402 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
6403 * @phba: pointer to lpfc hba data structure.
6404 *
6405 * This routine is invoked to set up the driver internal resources specific to
6406 * support the SLI-4 HBA device it attached to.
6407 *
6408 * Return codes
6409 * 0 - successful
6410 * other values - error
6411 **/
6412static int
6413lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
6414{
6415 LPFC_MBOXQ_t *mboxq;
6416 MAILBOX_t *mb;
6417 int rc, i, max_buf_size;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006418 int longs;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006419 int extra;
6420 uint64_t wwn;
6421 u32 if_type;
6422 u32 if_fam;
6423
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006424 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
David Brazdil0f672f62019-12-10 10:32:29 +00006425 phba->sli4_hba.num_possible_cpu = num_possible_cpus();
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006426 phba->sli4_hba.curr_disp_cpu = 0;
6427
6428 /* Get all the module params for configuring this host */
6429 lpfc_get_cfgparam(phba);
6430
6431 /* Set up phase-1 common device driver resources */
6432 rc = lpfc_setup_driver_resource_phase1(phba);
6433 if (rc)
6434 return -ENODEV;
6435
6436 /* Before proceed, wait for POST done and device ready */
6437 rc = lpfc_sli4_post_status_check(phba);
6438 if (rc)
6439 return -ENODEV;
6440
David Brazdil0f672f62019-12-10 10:32:29 +00006441 /* Allocate all driver workqueues here */
6442
6443 /* The lpfc_wq workqueue for deferred irq use */
6444 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
6445
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006446 /*
6447 * Initialize timers used by driver
6448 */
6449
6450 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
6451
6452 /* FCF rediscover timer */
6453 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
6454
6455 /*
6456 * Control structure for handling external multi-buffer mailbox
6457 * command pass-through.
6458 */
6459 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
6460 sizeof(struct lpfc_mbox_ext_buf_ctx));
6461 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
6462
6463 phba->max_vpi = LPFC_MAX_VPI;
6464
6465 /* This will be set to correct value after the read_config mbox */
6466 phba->max_vports = 0;
6467
6468 /* Program the default value of vlan_id and fc_map */
6469 phba->valid_vlan = 0;
6470 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
6471 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
6472 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
6473
6474 /*
6475 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
6476 * we will associate a new ring, for each EQ/CQ/WQ tuple.
6477 * The WQ create will allocate the ring.
6478 */
6479
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006480 /* Initialize buffer queue management fields */
6481 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
6482 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
6483 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
6484
6485 /*
6486 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
6487 */
David Brazdil0f672f62019-12-10 10:32:29 +00006488 /* Initialize the Abort buffer list used by driver */
6489 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
6490 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006491
6492 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
6493 /* Initialize the Abort nvme buffer list used by driver */
David Brazdil0f672f62019-12-10 10:32:29 +00006494 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006495 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
6496 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
David Brazdil0f672f62019-12-10 10:32:29 +00006497 spin_lock_init(&phba->sli4_hba.t_active_list_lock);
6498 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006499 }
6500
6501 /* This abort list used by worker thread */
6502 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
6503 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
6504
6505 /*
6506 * Initialize driver internal slow-path work queues
6507 */
6508
6509 /* Driver internel slow-path CQ Event pool */
6510 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
6511 /* Response IOCB work queue list */
6512 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
6513 /* Asynchronous event CQ Event work queue list */
6514 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
6515 /* Fast-path XRI aborted CQ Event work queue list */
6516 INIT_LIST_HEAD(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue);
6517 /* Slow-path XRI aborted CQ Event work queue list */
6518 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
6519 /* Receive queue CQ Event work queue list */
6520 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
6521
6522 /* Initialize extent block lists. */
6523 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
6524 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
6525 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
6526 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
6527
6528 /* Initialize mboxq lists. If the early init routines fail
6529 * these lists need to be correctly initialized.
6530 */
6531 INIT_LIST_HEAD(&phba->sli.mboxq);
6532 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
6533
6534 /* initialize optic_state to 0xFF */
6535 phba->sli4_hba.lnk_info.optic_state = 0xff;
6536
6537 /* Allocate device driver memory */
6538 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
6539 if (rc)
6540 return -ENOMEM;
6541
6542 /* IF Type 2 ports get initialized now. */
6543 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
6544 LPFC_SLI_INTF_IF_TYPE_2) {
6545 rc = lpfc_pci_function_reset(phba);
6546 if (unlikely(rc)) {
6547 rc = -ENODEV;
6548 goto out_free_mem;
6549 }
6550 phba->temp_sensor_support = 1;
6551 }
6552
6553 /* Create the bootstrap mailbox command */
6554 rc = lpfc_create_bootstrap_mbox(phba);
6555 if (unlikely(rc))
6556 goto out_free_mem;
6557
6558 /* Set up the host's endian order with the device. */
6559 rc = lpfc_setup_endian_order(phba);
6560 if (unlikely(rc))
6561 goto out_free_bsmbx;
6562
6563 /* Set up the hba's configuration parameters. */
6564 rc = lpfc_sli4_read_config(phba);
6565 if (unlikely(rc))
6566 goto out_free_bsmbx;
6567 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
6568 if (unlikely(rc))
6569 goto out_free_bsmbx;
6570
6571 /* IF Type 0 ports get initialized now. */
6572 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6573 LPFC_SLI_INTF_IF_TYPE_0) {
6574 rc = lpfc_pci_function_reset(phba);
6575 if (unlikely(rc))
6576 goto out_free_bsmbx;
6577 }
6578
6579 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
6580 GFP_KERNEL);
6581 if (!mboxq) {
6582 rc = -ENOMEM;
6583 goto out_free_bsmbx;
6584 }
6585
6586 /* Check for NVMET being configured */
6587 phba->nvmet_support = 0;
6588 if (lpfc_enable_nvmet_cnt) {
6589
6590 /* First get WWN of HBA instance */
6591 lpfc_read_nv(phba, mboxq);
6592 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
6593 if (rc != MBX_SUCCESS) {
6594 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6595 "6016 Mailbox failed , mbxCmd x%x "
6596 "READ_NV, mbxStatus x%x\n",
6597 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
6598 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
6599 mempool_free(mboxq, phba->mbox_mem_pool);
6600 rc = -EIO;
6601 goto out_free_bsmbx;
6602 }
6603 mb = &mboxq->u.mb;
6604 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
6605 sizeof(uint64_t));
6606 wwn = cpu_to_be64(wwn);
6607 phba->sli4_hba.wwnn.u.name = wwn;
6608 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
6609 sizeof(uint64_t));
6610 /* wwn is WWPN of HBA instance */
6611 wwn = cpu_to_be64(wwn);
6612 phba->sli4_hba.wwpn.u.name = wwn;
6613
6614 /* Check to see if it matches any module parameter */
6615 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
6616 if (wwn == lpfc_enable_nvmet[i]) {
6617#if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
6618 if (lpfc_nvmet_mem_alloc(phba))
6619 break;
6620
6621 phba->nvmet_support = 1; /* a match */
6622
6623 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6624 "6017 NVME Target %016llx\n",
6625 wwn);
6626#else
6627 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6628 "6021 Can't enable NVME Target."
6629 " NVME_TARGET_FC infrastructure"
6630 " is not in kernel\n");
6631#endif
David Brazdil0f672f62019-12-10 10:32:29 +00006632 /* Not supported for NVMET */
6633 phba->cfg_xri_rebalancing = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006634 break;
6635 }
6636 }
6637 }
6638
6639 lpfc_nvme_mod_param_dep(phba);
6640
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006641 /*
6642 * Get sli4 parameters that override parameters from Port capabilities.
6643 * If this call fails, it isn't critical unless the SLI4 parameters come
6644 * back in conflict.
6645 */
6646 rc = lpfc_get_sli4_parameters(phba, mboxq);
6647 if (rc) {
6648 if_type = bf_get(lpfc_sli_intf_if_type,
6649 &phba->sli4_hba.sli_intf);
6650 if_fam = bf_get(lpfc_sli_intf_sli_family,
6651 &phba->sli4_hba.sli_intf);
6652 if (phba->sli4_hba.extents_in_use &&
6653 phba->sli4_hba.rpi_hdrs_in_use) {
6654 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6655 "2999 Unsupported SLI4 Parameters "
6656 "Extents and RPI headers enabled.\n");
6657 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
6658 if_fam == LPFC_SLI_INTF_FAMILY_BE2) {
6659 mempool_free(mboxq, phba->mbox_mem_pool);
6660 rc = -EIO;
6661 goto out_free_bsmbx;
6662 }
6663 }
6664 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
6665 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) {
6666 mempool_free(mboxq, phba->mbox_mem_pool);
6667 rc = -EIO;
6668 goto out_free_bsmbx;
6669 }
6670 }
6671
David Brazdil0f672f62019-12-10 10:32:29 +00006672 /*
6673 * 1 for cmd, 1 for rsp, NVME adds an extra one
6674 * for boundary conditions in its max_sgl_segment template.
6675 */
6676 extra = 2;
6677 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
6678 extra++;
6679
6680 /*
6681 * It doesn't matter what family our adapter is in, we are
6682 * limited to 2 Pages, 512 SGEs, for our SGL.
6683 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
6684 */
6685 max_buf_size = (2 * SLI4_PAGE_SIZE);
6686
6687 /*
6688 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
6689 * used to create the sg_dma_buf_pool must be calculated.
6690 */
6691 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
6692 /* Both cfg_enable_bg and cfg_external_dif code paths */
6693
6694 /*
6695 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
6696 * the FCP rsp, and a SGE. Sice we have no control
6697 * over how many protection segments the SCSI Layer
6698 * will hand us (ie: there could be one for every block
6699 * in the IO), just allocate enough SGEs to accomidate
6700 * our max amount and we need to limit lpfc_sg_seg_cnt
6701 * to minimize the risk of running out.
6702 */
6703 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
6704 sizeof(struct fcp_rsp) + max_buf_size;
6705
6706 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
6707 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
6708
6709 /*
6710 * If supporting DIF, reduce the seg count for scsi to
6711 * allow room for the DIF sges.
6712 */
6713 if (phba->cfg_enable_bg &&
6714 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
6715 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
6716 else
6717 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
6718
6719 } else {
6720 /*
6721 * The scsi_buf for a regular I/O holds the FCP cmnd,
6722 * the FCP rsp, a SGE for each, and a SGE for up to
6723 * cfg_sg_seg_cnt data segments.
6724 */
6725 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
6726 sizeof(struct fcp_rsp) +
6727 ((phba->cfg_sg_seg_cnt + extra) *
6728 sizeof(struct sli4_sge));
6729
6730 /* Total SGEs for scsi_sg_list */
6731 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
6732 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
6733
6734 /*
6735 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
6736 * need to post 1 page for the SGL.
6737 */
6738 }
6739
6740 if (phba->cfg_xpsgl && !phba->nvmet_support)
6741 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE;
6742 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
6743 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
6744 else
6745 phba->cfg_sg_dma_buf_size =
6746 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
6747
6748 phba->border_sge_num = phba->cfg_sg_dma_buf_size /
6749 sizeof(struct sli4_sge);
6750
6751 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
6752 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
6753 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
6754 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
6755 "6300 Reducing NVME sg segment "
6756 "cnt to %d\n",
6757 LPFC_MAX_NVME_SEG_CNT);
6758 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
6759 } else
6760 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
6761 }
6762
6763 /* Initialize the host templates with the updated values. */
6764 lpfc_vport_template.sg_tablesize = phba->cfg_scsi_seg_cnt;
6765 lpfc_template.sg_tablesize = phba->cfg_scsi_seg_cnt;
6766 lpfc_template_no_hr.sg_tablesize = phba->cfg_scsi_seg_cnt;
6767
6768 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
6769 "9087 sg_seg_cnt:%d dmabuf_size:%d "
6770 "total:%d scsi:%d nvme:%d\n",
6771 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
6772 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt,
6773 phba->cfg_nvme_seg_cnt);
6774
6775 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE)
6776 i = phba->cfg_sg_dma_buf_size;
6777 else
6778 i = SLI4_PAGE_SIZE;
6779
6780 phba->lpfc_sg_dma_buf_pool =
6781 dma_pool_create("lpfc_sg_dma_buf_pool",
6782 &phba->pcidev->dev,
6783 phba->cfg_sg_dma_buf_size,
6784 i, 0);
6785 if (!phba->lpfc_sg_dma_buf_pool)
6786 goto out_free_bsmbx;
6787
6788 phba->lpfc_cmd_rsp_buf_pool =
6789 dma_pool_create("lpfc_cmd_rsp_buf_pool",
6790 &phba->pcidev->dev,
6791 sizeof(struct fcp_cmnd) +
6792 sizeof(struct fcp_rsp),
6793 i, 0);
6794 if (!phba->lpfc_cmd_rsp_buf_pool)
6795 goto out_free_sg_dma_buf;
6796
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006797 mempool_free(mboxq, phba->mbox_mem_pool);
6798
6799 /* Verify OAS is supported */
6800 lpfc_sli4_oas_verify(phba);
David Brazdil0f672f62019-12-10 10:32:29 +00006801
6802 /* Verify RAS support on adapter */
6803 lpfc_sli4_ras_init(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006804
6805 /* Verify all the SLI4 queues */
6806 rc = lpfc_sli4_queue_verify(phba);
6807 if (rc)
David Brazdil0f672f62019-12-10 10:32:29 +00006808 goto out_free_cmd_rsp_buf;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006809
6810 /* Create driver internal CQE event pool */
6811 rc = lpfc_sli4_cq_event_pool_create(phba);
6812 if (rc)
David Brazdil0f672f62019-12-10 10:32:29 +00006813 goto out_free_cmd_rsp_buf;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006814
6815 /* Initialize sgl lists per host */
6816 lpfc_init_sgl_list(phba);
6817
6818 /* Allocate and initialize active sgl array */
6819 rc = lpfc_init_active_sgl_array(phba);
6820 if (rc) {
6821 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6822 "1430 Failed to initialize sgl list.\n");
6823 goto out_destroy_cq_event_pool;
6824 }
6825 rc = lpfc_sli4_init_rpi_hdrs(phba);
6826 if (rc) {
6827 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6828 "1432 Failed to initialize rpi headers.\n");
6829 goto out_free_active_sgl;
6830 }
6831
6832 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
6833 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
6834 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
6835 GFP_KERNEL);
6836 if (!phba->fcf.fcf_rr_bmask) {
6837 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6838 "2759 Failed allocate memory for FCF round "
6839 "robin failover bmask\n");
6840 rc = -ENOMEM;
6841 goto out_remove_rpi_hdrs;
6842 }
6843
David Brazdil0f672f62019-12-10 10:32:29 +00006844 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
6845 sizeof(struct lpfc_hba_eq_hdl),
6846 GFP_KERNEL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006847 if (!phba->sli4_hba.hba_eq_hdl) {
6848 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6849 "2572 Failed allocate memory for "
6850 "fast-path per-EQ handle array\n");
6851 rc = -ENOMEM;
6852 goto out_free_fcf_rr_bmask;
6853 }
6854
David Brazdil0f672f62019-12-10 10:32:29 +00006855 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006856 sizeof(struct lpfc_vector_map_info),
6857 GFP_KERNEL);
6858 if (!phba->sli4_hba.cpu_map) {
6859 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6860 "3327 Failed allocate memory for msi-x "
6861 "interrupt vector mapping\n");
6862 rc = -ENOMEM;
6863 goto out_free_hba_eq_hdl;
6864 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006865
David Brazdil0f672f62019-12-10 10:32:29 +00006866 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
6867 if (!phba->sli4_hba.eq_info) {
6868 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
6869 "3321 Failed allocation for per_cpu stats\n");
6870 rc = -ENOMEM;
6871 goto out_free_hba_cpu_map;
6872 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006873 /*
6874 * Enable sr-iov virtual functions if supported and configured
6875 * through the module parameter.
6876 */
6877 if (phba->cfg_sriov_nr_virtfn > 0) {
6878 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
6879 phba->cfg_sriov_nr_virtfn);
6880 if (rc) {
6881 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
6882 "3020 Requested number of SR-IOV "
6883 "virtual functions (%d) is not "
6884 "supported\n",
6885 phba->cfg_sriov_nr_virtfn);
6886 phba->cfg_sriov_nr_virtfn = 0;
6887 }
6888 }
6889
6890 return 0;
6891
David Brazdil0f672f62019-12-10 10:32:29 +00006892out_free_hba_cpu_map:
6893 kfree(phba->sli4_hba.cpu_map);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006894out_free_hba_eq_hdl:
6895 kfree(phba->sli4_hba.hba_eq_hdl);
6896out_free_fcf_rr_bmask:
6897 kfree(phba->fcf.fcf_rr_bmask);
6898out_remove_rpi_hdrs:
6899 lpfc_sli4_remove_rpi_hdrs(phba);
6900out_free_active_sgl:
6901 lpfc_free_active_sgl(phba);
6902out_destroy_cq_event_pool:
6903 lpfc_sli4_cq_event_pool_destroy(phba);
David Brazdil0f672f62019-12-10 10:32:29 +00006904out_free_cmd_rsp_buf:
6905 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool);
6906 phba->lpfc_cmd_rsp_buf_pool = NULL;
6907out_free_sg_dma_buf:
6908 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
6909 phba->lpfc_sg_dma_buf_pool = NULL;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006910out_free_bsmbx:
6911 lpfc_destroy_bootstrap_mbox(phba);
6912out_free_mem:
6913 lpfc_mem_free(phba);
6914 return rc;
6915}
6916
6917/**
6918 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
6919 * @phba: pointer to lpfc hba data structure.
6920 *
6921 * This routine is invoked to unset the driver internal resources set up
6922 * specific for supporting the SLI-4 HBA device it attached to.
6923 **/
6924static void
6925lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
6926{
6927 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
6928
David Brazdil0f672f62019-12-10 10:32:29 +00006929 free_percpu(phba->sli4_hba.eq_info);
6930
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006931 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
6932 kfree(phba->sli4_hba.cpu_map);
David Brazdil0f672f62019-12-10 10:32:29 +00006933 phba->sli4_hba.num_possible_cpu = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006934 phba->sli4_hba.num_present_cpu = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006935 phba->sli4_hba.curr_disp_cpu = 0;
6936
6937 /* Free memory allocated for fast-path work queue handles */
6938 kfree(phba->sli4_hba.hba_eq_hdl);
6939
6940 /* Free the allocated rpi headers. */
6941 lpfc_sli4_remove_rpi_hdrs(phba);
6942 lpfc_sli4_remove_rpis(phba);
6943
6944 /* Free eligible FCF index bmask */
6945 kfree(phba->fcf.fcf_rr_bmask);
6946
6947 /* Free the ELS sgl list */
6948 lpfc_free_active_sgl(phba);
6949 lpfc_free_els_sgl_list(phba);
6950 lpfc_free_nvmet_sgl_list(phba);
6951
6952 /* Free the completion queue EQ event pool */
6953 lpfc_sli4_cq_event_release_all(phba);
6954 lpfc_sli4_cq_event_pool_destroy(phba);
6955
6956 /* Release resource identifiers. */
6957 lpfc_sli4_dealloc_resource_identifiers(phba);
6958
6959 /* Free the bsmbx region. */
6960 lpfc_destroy_bootstrap_mbox(phba);
6961
6962 /* Free the SLI Layer memory with SLI4 HBAs */
6963 lpfc_mem_free_all(phba);
6964
6965 /* Free the current connect table */
6966 list_for_each_entry_safe(conn_entry, next_conn_entry,
6967 &phba->fcf_conn_rec_list, list) {
6968 list_del_init(&conn_entry->list);
6969 kfree(conn_entry);
6970 }
6971
6972 return;
6973}
6974
6975/**
6976 * lpfc_init_api_table_setup - Set up init api function jump table
6977 * @phba: The hba struct for which this call is being executed.
6978 * @dev_grp: The HBA PCI-Device group number.
6979 *
6980 * This routine sets up the device INIT interface API function jump table
6981 * in @phba struct.
6982 *
6983 * Returns: 0 - success, -ENODEV - failure.
6984 **/
6985int
6986lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
6987{
6988 phba->lpfc_hba_init_link = lpfc_hba_init_link;
6989 phba->lpfc_hba_down_link = lpfc_hba_down_link;
6990 phba->lpfc_selective_reset = lpfc_selective_reset;
6991 switch (dev_grp) {
6992 case LPFC_PCI_DEV_LP:
6993 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
6994 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
6995 phba->lpfc_stop_port = lpfc_stop_port_s3;
6996 break;
6997 case LPFC_PCI_DEV_OC:
6998 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
6999 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
7000 phba->lpfc_stop_port = lpfc_stop_port_s4;
7001 break;
7002 default:
7003 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7004 "1431 Invalid HBA PCI-device group: 0x%x\n",
7005 dev_grp);
7006 return -ENODEV;
7007 break;
7008 }
7009 return 0;
7010}
7011
7012/**
7013 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
7014 * @phba: pointer to lpfc hba data structure.
7015 *
7016 * This routine is invoked to set up the driver internal resources after the
7017 * device specific resource setup to support the HBA device it attached to.
7018 *
7019 * Return codes
7020 * 0 - successful
7021 * other values - error
7022 **/
7023static int
7024lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
7025{
7026 int error;
7027
7028 /* Startup the kernel thread for this host adapter. */
7029 phba->worker_thread = kthread_run(lpfc_do_work, phba,
7030 "lpfc_worker_%d", phba->brd_no);
7031 if (IS_ERR(phba->worker_thread)) {
7032 error = PTR_ERR(phba->worker_thread);
7033 return error;
7034 }
7035
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007036 return 0;
7037}
7038
7039/**
7040 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
7041 * @phba: pointer to lpfc hba data structure.
7042 *
7043 * This routine is invoked to unset the driver internal resources set up after
7044 * the device specific resource setup for supporting the HBA device it
7045 * attached to.
7046 **/
7047static void
7048lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
7049{
7050 if (phba->wq) {
7051 flush_workqueue(phba->wq);
7052 destroy_workqueue(phba->wq);
7053 phba->wq = NULL;
7054 }
7055
7056 /* Stop kernel worker thread */
7057 if (phba->worker_thread)
7058 kthread_stop(phba->worker_thread);
7059}
7060
7061/**
7062 * lpfc_free_iocb_list - Free iocb list.
7063 * @phba: pointer to lpfc hba data structure.
7064 *
7065 * This routine is invoked to free the driver's IOCB list and memory.
7066 **/
7067void
7068lpfc_free_iocb_list(struct lpfc_hba *phba)
7069{
7070 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
7071
7072 spin_lock_irq(&phba->hbalock);
7073 list_for_each_entry_safe(iocbq_entry, iocbq_next,
7074 &phba->lpfc_iocb_list, list) {
7075 list_del(&iocbq_entry->list);
7076 kfree(iocbq_entry);
7077 phba->total_iocbq_bufs--;
7078 }
7079 spin_unlock_irq(&phba->hbalock);
7080
7081 return;
7082}
7083
7084/**
7085 * lpfc_init_iocb_list - Allocate and initialize iocb list.
7086 * @phba: pointer to lpfc hba data structure.
7087 *
7088 * This routine is invoked to allocate and initizlize the driver's IOCB
7089 * list and set up the IOCB tag array accordingly.
7090 *
7091 * Return codes
7092 * 0 - successful
7093 * other values - error
7094 **/
7095int
7096lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
7097{
7098 struct lpfc_iocbq *iocbq_entry = NULL;
7099 uint16_t iotag;
7100 int i;
7101
7102 /* Initialize and populate the iocb list per host. */
7103 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
7104 for (i = 0; i < iocb_count; i++) {
7105 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
7106 if (iocbq_entry == NULL) {
7107 printk(KERN_ERR "%s: only allocated %d iocbs of "
7108 "expected %d count. Unloading driver.\n",
7109 __func__, i, LPFC_IOCB_LIST_CNT);
7110 goto out_free_iocbq;
7111 }
7112
7113 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
7114 if (iotag == 0) {
7115 kfree(iocbq_entry);
7116 printk(KERN_ERR "%s: failed to allocate IOTAG. "
7117 "Unloading driver.\n", __func__);
7118 goto out_free_iocbq;
7119 }
7120 iocbq_entry->sli4_lxritag = NO_XRI;
7121 iocbq_entry->sli4_xritag = NO_XRI;
7122
7123 spin_lock_irq(&phba->hbalock);
7124 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
7125 phba->total_iocbq_bufs++;
7126 spin_unlock_irq(&phba->hbalock);
7127 }
7128
7129 return 0;
7130
7131out_free_iocbq:
7132 lpfc_free_iocb_list(phba);
7133
7134 return -ENOMEM;
7135}
7136
7137/**
7138 * lpfc_free_sgl_list - Free a given sgl list.
7139 * @phba: pointer to lpfc hba data structure.
7140 * @sglq_list: pointer to the head of sgl list.
7141 *
7142 * This routine is invoked to free a give sgl list and memory.
7143 **/
7144void
7145lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
7146{
7147 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
7148
7149 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
7150 list_del(&sglq_entry->list);
7151 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
7152 kfree(sglq_entry);
7153 }
7154}
7155
7156/**
7157 * lpfc_free_els_sgl_list - Free els sgl list.
7158 * @phba: pointer to lpfc hba data structure.
7159 *
7160 * This routine is invoked to free the driver's els sgl list and memory.
7161 **/
7162static void
7163lpfc_free_els_sgl_list(struct lpfc_hba *phba)
7164{
7165 LIST_HEAD(sglq_list);
7166
7167 /* Retrieve all els sgls from driver list */
7168 spin_lock_irq(&phba->hbalock);
7169 spin_lock(&phba->sli4_hba.sgl_list_lock);
7170 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
7171 spin_unlock(&phba->sli4_hba.sgl_list_lock);
7172 spin_unlock_irq(&phba->hbalock);
7173
7174 /* Now free the sgl list */
7175 lpfc_free_sgl_list(phba, &sglq_list);
7176}
7177
7178/**
7179 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
7180 * @phba: pointer to lpfc hba data structure.
7181 *
7182 * This routine is invoked to free the driver's nvmet sgl list and memory.
7183 **/
7184static void
7185lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
7186{
7187 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
7188 LIST_HEAD(sglq_list);
7189
7190 /* Retrieve all nvmet sgls from driver list */
7191 spin_lock_irq(&phba->hbalock);
7192 spin_lock(&phba->sli4_hba.sgl_list_lock);
7193 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
7194 spin_unlock(&phba->sli4_hba.sgl_list_lock);
7195 spin_unlock_irq(&phba->hbalock);
7196
7197 /* Now free the sgl list */
7198 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
7199 list_del(&sglq_entry->list);
7200 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
7201 kfree(sglq_entry);
7202 }
7203
7204 /* Update the nvmet_xri_cnt to reflect no current sgls.
7205 * The next initialization cycle sets the count and allocates
7206 * the sgls over again.
7207 */
7208 phba->sli4_hba.nvmet_xri_cnt = 0;
7209}
7210
7211/**
7212 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
7213 * @phba: pointer to lpfc hba data structure.
7214 *
7215 * This routine is invoked to allocate the driver's active sgl memory.
7216 * This array will hold the sglq_entry's for active IOs.
7217 **/
7218static int
7219lpfc_init_active_sgl_array(struct lpfc_hba *phba)
7220{
7221 int size;
7222 size = sizeof(struct lpfc_sglq *);
7223 size *= phba->sli4_hba.max_cfg_param.max_xri;
7224
7225 phba->sli4_hba.lpfc_sglq_active_list =
7226 kzalloc(size, GFP_KERNEL);
7227 if (!phba->sli4_hba.lpfc_sglq_active_list)
7228 return -ENOMEM;
7229 return 0;
7230}
7231
7232/**
7233 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
7234 * @phba: pointer to lpfc hba data structure.
7235 *
7236 * This routine is invoked to walk through the array of active sglq entries
7237 * and free all of the resources.
7238 * This is just a place holder for now.
7239 **/
7240static void
7241lpfc_free_active_sgl(struct lpfc_hba *phba)
7242{
7243 kfree(phba->sli4_hba.lpfc_sglq_active_list);
7244}
7245
7246/**
7247 * lpfc_init_sgl_list - Allocate and initialize sgl list.
7248 * @phba: pointer to lpfc hba data structure.
7249 *
7250 * This routine is invoked to allocate and initizlize the driver's sgl
7251 * list and set up the sgl xritag tag array accordingly.
7252 *
7253 **/
7254static void
7255lpfc_init_sgl_list(struct lpfc_hba *phba)
7256{
7257 /* Initialize and populate the sglq list per host/VF. */
7258 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
7259 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
7260 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
7261 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
7262
7263 /* els xri-sgl book keeping */
7264 phba->sli4_hba.els_xri_cnt = 0;
7265
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007266 /* nvme xri-buffer book keeping */
David Brazdil0f672f62019-12-10 10:32:29 +00007267 phba->sli4_hba.io_xri_cnt = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007268}
7269
7270/**
7271 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
7272 * @phba: pointer to lpfc hba data structure.
7273 *
7274 * This routine is invoked to post rpi header templates to the
7275 * port for those SLI4 ports that do not support extents. This routine
7276 * posts a PAGE_SIZE memory region to the port to hold up to
7277 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
7278 * and should be called only when interrupts are disabled.
7279 *
7280 * Return codes
7281 * 0 - successful
7282 * -ERROR - otherwise.
7283 **/
7284int
7285lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
7286{
7287 int rc = 0;
7288 struct lpfc_rpi_hdr *rpi_hdr;
7289
7290 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
7291 if (!phba->sli4_hba.rpi_hdrs_in_use)
7292 return rc;
7293 if (phba->sli4_hba.extents_in_use)
7294 return -EIO;
7295
7296 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
7297 if (!rpi_hdr) {
7298 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
7299 "0391 Error during rpi post operation\n");
7300 lpfc_sli4_remove_rpis(phba);
7301 rc = -ENODEV;
7302 }
7303
7304 return rc;
7305}
7306
7307/**
7308 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
7309 * @phba: pointer to lpfc hba data structure.
7310 *
7311 * This routine is invoked to allocate a single 4KB memory region to
7312 * support rpis and stores them in the phba. This single region
7313 * provides support for up to 64 rpis. The region is used globally
7314 * by the device.
7315 *
7316 * Returns:
7317 * A valid rpi hdr on success.
7318 * A NULL pointer on any failure.
7319 **/
7320struct lpfc_rpi_hdr *
7321lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
7322{
7323 uint16_t rpi_limit, curr_rpi_range;
7324 struct lpfc_dmabuf *dmabuf;
7325 struct lpfc_rpi_hdr *rpi_hdr;
7326
7327 /*
7328 * If the SLI4 port supports extents, posting the rpi header isn't
7329 * required. Set the expected maximum count and let the actual value
7330 * get set when extents are fully allocated.
7331 */
7332 if (!phba->sli4_hba.rpi_hdrs_in_use)
7333 return NULL;
7334 if (phba->sli4_hba.extents_in_use)
7335 return NULL;
7336
7337 /* The limit on the logical index is just the max_rpi count. */
7338 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
7339
7340 spin_lock_irq(&phba->hbalock);
7341 /*
7342 * Establish the starting RPI in this header block. The starting
7343 * rpi is normalized to a zero base because the physical rpi is
7344 * port based.
7345 */
7346 curr_rpi_range = phba->sli4_hba.next_rpi;
7347 spin_unlock_irq(&phba->hbalock);
7348
7349 /* Reached full RPI range */
7350 if (curr_rpi_range == rpi_limit)
7351 return NULL;
7352
7353 /*
7354 * First allocate the protocol header region for the port. The
7355 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
7356 */
7357 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
7358 if (!dmabuf)
7359 return NULL;
7360
David Brazdil0f672f62019-12-10 10:32:29 +00007361 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
7362 LPFC_HDR_TEMPLATE_SIZE,
7363 &dmabuf->phys, GFP_KERNEL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007364 if (!dmabuf->virt) {
7365 rpi_hdr = NULL;
7366 goto err_free_dmabuf;
7367 }
7368
7369 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
7370 rpi_hdr = NULL;
7371 goto err_free_coherent;
7372 }
7373
7374 /* Save the rpi header data for cleanup later. */
7375 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
7376 if (!rpi_hdr)
7377 goto err_free_coherent;
7378
7379 rpi_hdr->dmabuf = dmabuf;
7380 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
7381 rpi_hdr->page_count = 1;
7382 spin_lock_irq(&phba->hbalock);
7383
7384 /* The rpi_hdr stores the logical index only. */
7385 rpi_hdr->start_rpi = curr_rpi_range;
7386 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
7387 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
7388
7389 spin_unlock_irq(&phba->hbalock);
7390 return rpi_hdr;
7391
7392 err_free_coherent:
7393 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
7394 dmabuf->virt, dmabuf->phys);
7395 err_free_dmabuf:
7396 kfree(dmabuf);
7397 return NULL;
7398}
7399
7400/**
7401 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
7402 * @phba: pointer to lpfc hba data structure.
7403 *
7404 * This routine is invoked to remove all memory resources allocated
7405 * to support rpis for SLI4 ports not supporting extents. This routine
7406 * presumes the caller has released all rpis consumed by fabric or port
7407 * logins and is prepared to have the header pages removed.
7408 **/
7409void
7410lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
7411{
7412 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
7413
7414 if (!phba->sli4_hba.rpi_hdrs_in_use)
7415 goto exit;
7416
7417 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
7418 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
7419 list_del(&rpi_hdr->list);
7420 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
7421 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
7422 kfree(rpi_hdr->dmabuf);
7423 kfree(rpi_hdr);
7424 }
7425 exit:
7426 /* There are no rpis available to the port now. */
7427 phba->sli4_hba.next_rpi = 0;
7428}
7429
7430/**
7431 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
7432 * @pdev: pointer to pci device data structure.
7433 *
7434 * This routine is invoked to allocate the driver hba data structure for an
7435 * HBA device. If the allocation is successful, the phba reference to the
7436 * PCI device data structure is set.
7437 *
7438 * Return codes
7439 * pointer to @phba - successful
7440 * NULL - error
7441 **/
7442static struct lpfc_hba *
7443lpfc_hba_alloc(struct pci_dev *pdev)
7444{
7445 struct lpfc_hba *phba;
7446
7447 /* Allocate memory for HBA structure */
7448 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
7449 if (!phba) {
7450 dev_err(&pdev->dev, "failed to allocate hba struct\n");
7451 return NULL;
7452 }
7453
7454 /* Set reference to PCI device in HBA structure */
7455 phba->pcidev = pdev;
7456
7457 /* Assign an unused board number */
7458 phba->brd_no = lpfc_get_instance();
7459 if (phba->brd_no < 0) {
7460 kfree(phba);
7461 return NULL;
7462 }
7463 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
7464
7465 spin_lock_init(&phba->ct_ev_lock);
7466 INIT_LIST_HEAD(&phba->ct_ev_waiters);
7467
7468 return phba;
7469}
7470
7471/**
7472 * lpfc_hba_free - Free driver hba data structure with a device.
7473 * @phba: pointer to lpfc hba data structure.
7474 *
7475 * This routine is invoked to free the driver hba data structure with an
7476 * HBA device.
7477 **/
7478static void
7479lpfc_hba_free(struct lpfc_hba *phba)
7480{
David Brazdil0f672f62019-12-10 10:32:29 +00007481 if (phba->sli_rev == LPFC_SLI_REV4)
7482 kfree(phba->sli4_hba.hdwq);
7483
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007484 /* Release the driver assigned board number */
7485 idr_remove(&lpfc_hba_index, phba->brd_no);
7486
7487 /* Free memory allocated with sli3 rings */
7488 kfree(phba->sli.sli3_ring);
7489 phba->sli.sli3_ring = NULL;
7490
7491 kfree(phba);
7492 return;
7493}
7494
7495/**
7496 * lpfc_create_shost - Create hba physical port with associated scsi host.
7497 * @phba: pointer to lpfc hba data structure.
7498 *
7499 * This routine is invoked to create HBA physical port and associate a SCSI
7500 * host with it.
7501 *
7502 * Return codes
7503 * 0 - successful
7504 * other values - error
7505 **/
7506static int
7507lpfc_create_shost(struct lpfc_hba *phba)
7508{
7509 struct lpfc_vport *vport;
7510 struct Scsi_Host *shost;
7511
7512 /* Initialize HBA FC structure */
7513 phba->fc_edtov = FF_DEF_EDTOV;
7514 phba->fc_ratov = FF_DEF_RATOV;
7515 phba->fc_altov = FF_DEF_ALTOV;
7516 phba->fc_arbtov = FF_DEF_ARBTOV;
7517
7518 atomic_set(&phba->sdev_cnt, 0);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007519 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
7520 if (!vport)
7521 return -ENODEV;
7522
7523 shost = lpfc_shost_from_vport(vport);
7524 phba->pport = vport;
7525
7526 if (phba->nvmet_support) {
7527 /* Only 1 vport (pport) will support NVME target */
7528 if (phba->txrdy_payload_pool == NULL) {
7529 phba->txrdy_payload_pool = dma_pool_create(
7530 "txrdy_pool", &phba->pcidev->dev,
7531 TXRDY_PAYLOAD_LEN, 16, 0);
7532 if (phba->txrdy_payload_pool) {
7533 phba->targetport = NULL;
7534 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
7535 lpfc_printf_log(phba, KERN_INFO,
7536 LOG_INIT | LOG_NVME_DISC,
7537 "6076 NVME Target Found\n");
7538 }
7539 }
7540 }
7541
7542 lpfc_debugfs_initialize(vport);
7543 /* Put reference to SCSI host to driver's device private data */
7544 pci_set_drvdata(phba->pcidev, shost);
7545
7546 /*
7547 * At this point we are fully registered with PSA. In addition,
7548 * any initial discovery should be completed.
7549 */
7550 vport->load_flag |= FC_ALLOW_FDMI;
7551 if (phba->cfg_enable_SmartSAN ||
7552 (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
7553
7554 /* Setup appropriate attribute masks */
7555 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
7556 if (phba->cfg_enable_SmartSAN)
7557 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
7558 else
7559 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
7560 }
7561 return 0;
7562}
7563
7564/**
7565 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
7566 * @phba: pointer to lpfc hba data structure.
7567 *
7568 * This routine is invoked to destroy HBA physical port and the associated
7569 * SCSI host.
7570 **/
7571static void
7572lpfc_destroy_shost(struct lpfc_hba *phba)
7573{
7574 struct lpfc_vport *vport = phba->pport;
7575
7576 /* Destroy physical port that associated with the SCSI host */
7577 destroy_port(vport);
7578
7579 return;
7580}
7581
7582/**
7583 * lpfc_setup_bg - Setup Block guard structures and debug areas.
7584 * @phba: pointer to lpfc hba data structure.
7585 * @shost: the shost to be used to detect Block guard settings.
7586 *
7587 * This routine sets up the local Block guard protocol settings for @shost.
7588 * This routine also allocates memory for debugging bg buffers.
7589 **/
7590static void
7591lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
7592{
7593 uint32_t old_mask;
7594 uint32_t old_guard;
7595
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007596 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
7597 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7598 "1478 Registering BlockGuard with the "
7599 "SCSI layer\n");
7600
7601 old_mask = phba->cfg_prot_mask;
7602 old_guard = phba->cfg_prot_guard;
7603
7604 /* Only allow supported values */
7605 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
7606 SHOST_DIX_TYPE0_PROTECTION |
7607 SHOST_DIX_TYPE1_PROTECTION);
7608 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
7609 SHOST_DIX_GUARD_CRC);
7610
7611 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
7612 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
7613 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
7614
7615 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
7616 if ((old_mask != phba->cfg_prot_mask) ||
7617 (old_guard != phba->cfg_prot_guard))
7618 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7619 "1475 Registering BlockGuard with the "
7620 "SCSI layer: mask %d guard %d\n",
7621 phba->cfg_prot_mask,
7622 phba->cfg_prot_guard);
7623
7624 scsi_host_set_prot(shost, phba->cfg_prot_mask);
7625 scsi_host_set_guard(shost, phba->cfg_prot_guard);
7626 } else
7627 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7628 "1479 Not Registering BlockGuard with the SCSI "
7629 "layer, Bad protection parameters: %d %d\n",
7630 old_mask, old_guard);
7631 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007632}
7633
7634/**
7635 * lpfc_post_init_setup - Perform necessary device post initialization setup.
7636 * @phba: pointer to lpfc hba data structure.
7637 *
7638 * This routine is invoked to perform all the necessary post initialization
7639 * setup for the device.
7640 **/
7641static void
7642lpfc_post_init_setup(struct lpfc_hba *phba)
7643{
7644 struct Scsi_Host *shost;
7645 struct lpfc_adapter_event_header adapter_event;
7646
7647 /* Get the default values for Model Name and Description */
7648 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
7649
7650 /*
7651 * hba setup may have changed the hba_queue_depth so we need to
7652 * adjust the value of can_queue.
7653 */
7654 shost = pci_get_drvdata(phba->pcidev);
7655 shost->can_queue = phba->cfg_hba_queue_depth - 10;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007656
7657 lpfc_host_attrib_init(shost);
7658
7659 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
7660 spin_lock_irq(shost->host_lock);
7661 lpfc_poll_start_timer(phba);
7662 spin_unlock_irq(shost->host_lock);
7663 }
7664
7665 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7666 "0428 Perform SCSI scan\n");
7667 /* Send board arrival event to upper layer */
7668 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
7669 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
7670 fc_host_post_vendor_event(shost, fc_get_event_number(),
7671 sizeof(adapter_event),
7672 (char *) &adapter_event,
7673 LPFC_NL_VENDOR_ID);
7674 return;
7675}
7676
7677/**
7678 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
7679 * @phba: pointer to lpfc hba data structure.
7680 *
7681 * This routine is invoked to set up the PCI device memory space for device
7682 * with SLI-3 interface spec.
7683 *
7684 * Return codes
7685 * 0 - successful
7686 * other values - error
7687 **/
7688static int
7689lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
7690{
David Brazdil0f672f62019-12-10 10:32:29 +00007691 struct pci_dev *pdev = phba->pcidev;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007692 unsigned long bar0map_len, bar2map_len;
7693 int i, hbq_count;
7694 void *ptr;
David Brazdil0f672f62019-12-10 10:32:29 +00007695 int error;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007696
David Brazdil0f672f62019-12-10 10:32:29 +00007697 if (!pdev)
7698 return -ENODEV;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007699
7700 /* Set the device DMA mask size */
David Brazdil0f672f62019-12-10 10:32:29 +00007701 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7702 if (error)
7703 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7704 if (error)
7705 return error;
7706 error = -ENODEV;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007707
7708 /* Get the bus address of Bar0 and Bar2 and the number of bytes
7709 * required by each mapping.
7710 */
7711 phba->pci_bar0_map = pci_resource_start(pdev, 0);
7712 bar0map_len = pci_resource_len(pdev, 0);
7713
7714 phba->pci_bar2_map = pci_resource_start(pdev, 2);
7715 bar2map_len = pci_resource_len(pdev, 2);
7716
7717 /* Map HBA SLIM to a kernel virtual address. */
7718 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
7719 if (!phba->slim_memmap_p) {
7720 dev_printk(KERN_ERR, &pdev->dev,
7721 "ioremap failed for SLIM memory.\n");
7722 goto out;
7723 }
7724
7725 /* Map HBA Control Registers to a kernel virtual address. */
7726 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
7727 if (!phba->ctrl_regs_memmap_p) {
7728 dev_printk(KERN_ERR, &pdev->dev,
7729 "ioremap failed for HBA control registers.\n");
7730 goto out_iounmap_slim;
7731 }
7732
7733 /* Allocate memory for SLI-2 structures */
David Brazdil0f672f62019-12-10 10:32:29 +00007734 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7735 &phba->slim2p.phys, GFP_KERNEL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007736 if (!phba->slim2p.virt)
7737 goto out_iounmap;
7738
7739 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
7740 phba->mbox_ext = (phba->slim2p.virt +
7741 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
7742 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
7743 phba->IOCBs = (phba->slim2p.virt +
7744 offsetof(struct lpfc_sli2_slim, IOCBs));
7745
7746 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
7747 lpfc_sli_hbq_size(),
7748 &phba->hbqslimp.phys,
7749 GFP_KERNEL);
7750 if (!phba->hbqslimp.virt)
7751 goto out_free_slim;
7752
7753 hbq_count = lpfc_sli_hbq_count();
7754 ptr = phba->hbqslimp.virt;
7755 for (i = 0; i < hbq_count; ++i) {
7756 phba->hbqs[i].hbq_virt = ptr;
7757 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
7758 ptr += (lpfc_hbq_defs[i]->entry_count *
7759 sizeof(struct lpfc_hbq_entry));
7760 }
7761 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
7762 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
7763
7764 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
7765
7766 phba->MBslimaddr = phba->slim_memmap_p;
7767 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
7768 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
7769 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
7770 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
7771
7772 return 0;
7773
7774out_free_slim:
7775 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7776 phba->slim2p.virt, phba->slim2p.phys);
7777out_iounmap:
7778 iounmap(phba->ctrl_regs_memmap_p);
7779out_iounmap_slim:
7780 iounmap(phba->slim_memmap_p);
7781out:
7782 return error;
7783}
7784
7785/**
7786 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
7787 * @phba: pointer to lpfc hba data structure.
7788 *
7789 * This routine is invoked to unset the PCI device memory space for device
7790 * with SLI-3 interface spec.
7791 **/
7792static void
7793lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
7794{
7795 struct pci_dev *pdev;
7796
7797 /* Obtain PCI device reference */
7798 if (!phba->pcidev)
7799 return;
7800 else
7801 pdev = phba->pcidev;
7802
7803 /* Free coherent DMA memory allocated */
7804 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
7805 phba->hbqslimp.virt, phba->hbqslimp.phys);
7806 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
7807 phba->slim2p.virt, phba->slim2p.phys);
7808
7809 /* I/O memory unmap */
7810 iounmap(phba->ctrl_regs_memmap_p);
7811 iounmap(phba->slim_memmap_p);
7812
7813 return;
7814}
7815
7816/**
7817 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
7818 * @phba: pointer to lpfc hba data structure.
7819 *
7820 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
7821 * done and check status.
7822 *
7823 * Return 0 if successful, otherwise -ENODEV.
7824 **/
7825int
7826lpfc_sli4_post_status_check(struct lpfc_hba *phba)
7827{
7828 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
7829 struct lpfc_register reg_data;
7830 int i, port_error = 0;
7831 uint32_t if_type;
7832
7833 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
7834 memset(&reg_data, 0, sizeof(reg_data));
7835 if (!phba->sli4_hba.PSMPHRregaddr)
7836 return -ENODEV;
7837
7838 /* Wait up to 30 seconds for the SLI Port POST done and ready */
7839 for (i = 0; i < 3000; i++) {
7840 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
7841 &portsmphr_reg.word0) ||
7842 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
7843 /* Port has a fatal POST error, break out */
7844 port_error = -ENODEV;
7845 break;
7846 }
7847 if (LPFC_POST_STAGE_PORT_READY ==
7848 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
7849 break;
7850 msleep(10);
7851 }
7852
7853 /*
7854 * If there was a port error during POST, then don't proceed with
7855 * other register reads as the data may not be valid. Just exit.
7856 */
7857 if (port_error) {
7858 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7859 "1408 Port Failed POST - portsmphr=0x%x, "
7860 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
7861 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
7862 portsmphr_reg.word0,
7863 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
7864 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
7865 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
7866 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
7867 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
7868 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
7869 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
7870 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
7871 } else {
7872 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7873 "2534 Device Info: SLIFamily=0x%x, "
7874 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
7875 "SLIHint_2=0x%x, FT=0x%x\n",
7876 bf_get(lpfc_sli_intf_sli_family,
7877 &phba->sli4_hba.sli_intf),
7878 bf_get(lpfc_sli_intf_slirev,
7879 &phba->sli4_hba.sli_intf),
7880 bf_get(lpfc_sli_intf_if_type,
7881 &phba->sli4_hba.sli_intf),
7882 bf_get(lpfc_sli_intf_sli_hint1,
7883 &phba->sli4_hba.sli_intf),
7884 bf_get(lpfc_sli_intf_sli_hint2,
7885 &phba->sli4_hba.sli_intf),
7886 bf_get(lpfc_sli_intf_func_type,
7887 &phba->sli4_hba.sli_intf));
7888 /*
7889 * Check for other Port errors during the initialization
7890 * process. Fail the load if the port did not come up
7891 * correctly.
7892 */
7893 if_type = bf_get(lpfc_sli_intf_if_type,
7894 &phba->sli4_hba.sli_intf);
7895 switch (if_type) {
7896 case LPFC_SLI_INTF_IF_TYPE_0:
7897 phba->sli4_hba.ue_mask_lo =
7898 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
7899 phba->sli4_hba.ue_mask_hi =
7900 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
7901 uerrlo_reg.word0 =
7902 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
7903 uerrhi_reg.word0 =
7904 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
7905 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
7906 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
7907 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7908 "1422 Unrecoverable Error "
7909 "Detected during POST "
7910 "uerr_lo_reg=0x%x, "
7911 "uerr_hi_reg=0x%x, "
7912 "ue_mask_lo_reg=0x%x, "
7913 "ue_mask_hi_reg=0x%x\n",
7914 uerrlo_reg.word0,
7915 uerrhi_reg.word0,
7916 phba->sli4_hba.ue_mask_lo,
7917 phba->sli4_hba.ue_mask_hi);
7918 port_error = -ENODEV;
7919 }
7920 break;
7921 case LPFC_SLI_INTF_IF_TYPE_2:
7922 case LPFC_SLI_INTF_IF_TYPE_6:
7923 /* Final checks. The port status should be clean. */
7924 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
7925 &reg_data.word0) ||
7926 (bf_get(lpfc_sliport_status_err, &reg_data) &&
7927 !bf_get(lpfc_sliport_status_rn, &reg_data))) {
7928 phba->work_status[0] =
7929 readl(phba->sli4_hba.u.if_type2.
7930 ERR1regaddr);
7931 phba->work_status[1] =
7932 readl(phba->sli4_hba.u.if_type2.
7933 ERR2regaddr);
7934 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7935 "2888 Unrecoverable port error "
7936 "following POST: port status reg "
7937 "0x%x, port_smphr reg 0x%x, "
7938 "error 1=0x%x, error 2=0x%x\n",
7939 reg_data.word0,
7940 portsmphr_reg.word0,
7941 phba->work_status[0],
7942 phba->work_status[1]);
7943 port_error = -ENODEV;
7944 }
7945 break;
7946 case LPFC_SLI_INTF_IF_TYPE_1:
7947 default:
7948 break;
7949 }
7950 }
7951 return port_error;
7952}
7953
7954/**
7955 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
7956 * @phba: pointer to lpfc hba data structure.
7957 * @if_type: The SLI4 interface type getting configured.
7958 *
7959 * This routine is invoked to set up SLI4 BAR0 PCI config space register
7960 * memory map.
7961 **/
7962static void
7963lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
7964{
7965 switch (if_type) {
7966 case LPFC_SLI_INTF_IF_TYPE_0:
7967 phba->sli4_hba.u.if_type0.UERRLOregaddr =
7968 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
7969 phba->sli4_hba.u.if_type0.UERRHIregaddr =
7970 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
7971 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
7972 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
7973 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
7974 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
7975 phba->sli4_hba.SLIINTFregaddr =
7976 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7977 break;
7978 case LPFC_SLI_INTF_IF_TYPE_2:
7979 phba->sli4_hba.u.if_type2.EQDregaddr =
7980 phba->sli4_hba.conf_regs_memmap_p +
7981 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
7982 phba->sli4_hba.u.if_type2.ERR1regaddr =
7983 phba->sli4_hba.conf_regs_memmap_p +
7984 LPFC_CTL_PORT_ER1_OFFSET;
7985 phba->sli4_hba.u.if_type2.ERR2regaddr =
7986 phba->sli4_hba.conf_regs_memmap_p +
7987 LPFC_CTL_PORT_ER2_OFFSET;
7988 phba->sli4_hba.u.if_type2.CTRLregaddr =
7989 phba->sli4_hba.conf_regs_memmap_p +
7990 LPFC_CTL_PORT_CTL_OFFSET;
7991 phba->sli4_hba.u.if_type2.STATUSregaddr =
7992 phba->sli4_hba.conf_regs_memmap_p +
7993 LPFC_CTL_PORT_STA_OFFSET;
7994 phba->sli4_hba.SLIINTFregaddr =
7995 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
7996 phba->sli4_hba.PSMPHRregaddr =
7997 phba->sli4_hba.conf_regs_memmap_p +
7998 LPFC_CTL_PORT_SEM_OFFSET;
7999 phba->sli4_hba.RQDBregaddr =
8000 phba->sli4_hba.conf_regs_memmap_p +
8001 LPFC_ULP0_RQ_DOORBELL;
8002 phba->sli4_hba.WQDBregaddr =
8003 phba->sli4_hba.conf_regs_memmap_p +
8004 LPFC_ULP0_WQ_DOORBELL;
8005 phba->sli4_hba.CQDBregaddr =
8006 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
8007 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
8008 phba->sli4_hba.MQDBregaddr =
8009 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
8010 phba->sli4_hba.BMBXregaddr =
8011 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
8012 break;
8013 case LPFC_SLI_INTF_IF_TYPE_6:
8014 phba->sli4_hba.u.if_type2.EQDregaddr =
8015 phba->sli4_hba.conf_regs_memmap_p +
8016 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
8017 phba->sli4_hba.u.if_type2.ERR1regaddr =
8018 phba->sli4_hba.conf_regs_memmap_p +
8019 LPFC_CTL_PORT_ER1_OFFSET;
8020 phba->sli4_hba.u.if_type2.ERR2regaddr =
8021 phba->sli4_hba.conf_regs_memmap_p +
8022 LPFC_CTL_PORT_ER2_OFFSET;
8023 phba->sli4_hba.u.if_type2.CTRLregaddr =
8024 phba->sli4_hba.conf_regs_memmap_p +
8025 LPFC_CTL_PORT_CTL_OFFSET;
8026 phba->sli4_hba.u.if_type2.STATUSregaddr =
8027 phba->sli4_hba.conf_regs_memmap_p +
8028 LPFC_CTL_PORT_STA_OFFSET;
8029 phba->sli4_hba.PSMPHRregaddr =
8030 phba->sli4_hba.conf_regs_memmap_p +
8031 LPFC_CTL_PORT_SEM_OFFSET;
8032 phba->sli4_hba.BMBXregaddr =
8033 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
8034 break;
8035 case LPFC_SLI_INTF_IF_TYPE_1:
8036 default:
8037 dev_printk(KERN_ERR, &phba->pcidev->dev,
8038 "FATAL - unsupported SLI4 interface type - %d\n",
8039 if_type);
8040 break;
8041 }
8042}
8043
8044/**
8045 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
8046 * @phba: pointer to lpfc hba data structure.
8047 *
8048 * This routine is invoked to set up SLI4 BAR1 register memory map.
8049 **/
8050static void
8051lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
8052{
8053 switch (if_type) {
8054 case LPFC_SLI_INTF_IF_TYPE_0:
8055 phba->sli4_hba.PSMPHRregaddr =
8056 phba->sli4_hba.ctrl_regs_memmap_p +
8057 LPFC_SLIPORT_IF0_SMPHR;
8058 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8059 LPFC_HST_ISR0;
8060 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8061 LPFC_HST_IMR0;
8062 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8063 LPFC_HST_ISCR0;
8064 break;
8065 case LPFC_SLI_INTF_IF_TYPE_6:
8066 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8067 LPFC_IF6_RQ_DOORBELL;
8068 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8069 LPFC_IF6_WQ_DOORBELL;
8070 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8071 LPFC_IF6_CQ_DOORBELL;
8072 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8073 LPFC_IF6_EQ_DOORBELL;
8074 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8075 LPFC_IF6_MQ_DOORBELL;
8076 break;
8077 case LPFC_SLI_INTF_IF_TYPE_2:
8078 case LPFC_SLI_INTF_IF_TYPE_1:
8079 default:
8080 dev_err(&phba->pcidev->dev,
8081 "FATAL - unsupported SLI4 interface type - %d\n",
8082 if_type);
8083 break;
8084 }
8085}
8086
8087/**
8088 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
8089 * @phba: pointer to lpfc hba data structure.
8090 * @vf: virtual function number
8091 *
8092 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
8093 * based on the given viftual function number, @vf.
8094 *
8095 * Return 0 if successful, otherwise -ENODEV.
8096 **/
8097static int
8098lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
8099{
8100 if (vf > LPFC_VIR_FUNC_MAX)
8101 return -ENODEV;
8102
8103 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8104 vf * LPFC_VFR_PAGE_SIZE +
8105 LPFC_ULP0_RQ_DOORBELL);
8106 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8107 vf * LPFC_VFR_PAGE_SIZE +
8108 LPFC_ULP0_WQ_DOORBELL);
8109 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8110 vf * LPFC_VFR_PAGE_SIZE +
8111 LPFC_EQCQ_DOORBELL);
8112 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
8113 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8114 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
8115 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8116 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
8117 return 0;
8118}
8119
8120/**
8121 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
8122 * @phba: pointer to lpfc hba data structure.
8123 *
8124 * This routine is invoked to create the bootstrap mailbox
8125 * region consistent with the SLI-4 interface spec. This
8126 * routine allocates all memory necessary to communicate
8127 * mailbox commands to the port and sets up all alignment
8128 * needs. No locks are expected to be held when calling
8129 * this routine.
8130 *
8131 * Return codes
8132 * 0 - successful
8133 * -ENOMEM - could not allocated memory.
8134 **/
8135static int
8136lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
8137{
8138 uint32_t bmbx_size;
8139 struct lpfc_dmabuf *dmabuf;
8140 struct dma_address *dma_address;
8141 uint32_t pa_addr;
8142 uint64_t phys_addr;
8143
8144 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
8145 if (!dmabuf)
8146 return -ENOMEM;
8147
8148 /*
8149 * The bootstrap mailbox region is comprised of 2 parts
8150 * plus an alignment restriction of 16 bytes.
8151 */
8152 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
David Brazdil0f672f62019-12-10 10:32:29 +00008153 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size,
8154 &dmabuf->phys, GFP_KERNEL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008155 if (!dmabuf->virt) {
8156 kfree(dmabuf);
8157 return -ENOMEM;
8158 }
8159
8160 /*
8161 * Initialize the bootstrap mailbox pointers now so that the register
8162 * operations are simple later. The mailbox dma address is required
8163 * to be 16-byte aligned. Also align the virtual memory as each
8164 * maibox is copied into the bmbx mailbox region before issuing the
8165 * command to the port.
8166 */
8167 phba->sli4_hba.bmbx.dmabuf = dmabuf;
8168 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
8169
8170 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
8171 LPFC_ALIGN_16_BYTE);
8172 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
8173 LPFC_ALIGN_16_BYTE);
8174
8175 /*
8176 * Set the high and low physical addresses now. The SLI4 alignment
8177 * requirement is 16 bytes and the mailbox is posted to the port
8178 * as two 30-bit addresses. The other data is a bit marking whether
8179 * the 30-bit address is the high or low address.
8180 * Upcast bmbx aphys to 64bits so shift instruction compiles
8181 * clean on 32 bit machines.
8182 */
8183 dma_address = &phba->sli4_hba.bmbx.dma_address;
8184 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
8185 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
8186 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
8187 LPFC_BMBX_BIT1_ADDR_HI);
8188
8189 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
8190 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
8191 LPFC_BMBX_BIT1_ADDR_LO);
8192 return 0;
8193}
8194
8195/**
8196 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
8197 * @phba: pointer to lpfc hba data structure.
8198 *
8199 * This routine is invoked to teardown the bootstrap mailbox
8200 * region and release all host resources. This routine requires
8201 * the caller to ensure all mailbox commands recovered, no
8202 * additional mailbox comands are sent, and interrupts are disabled
8203 * before calling this routine.
8204 *
8205 **/
8206static void
8207lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
8208{
8209 dma_free_coherent(&phba->pcidev->dev,
8210 phba->sli4_hba.bmbx.bmbx_size,
8211 phba->sli4_hba.bmbx.dmabuf->virt,
8212 phba->sli4_hba.bmbx.dmabuf->phys);
8213
8214 kfree(phba->sli4_hba.bmbx.dmabuf);
8215 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
8216}
8217
8218/**
8219 * lpfc_sli4_read_config - Get the config parameters.
8220 * @phba: pointer to lpfc hba data structure.
8221 *
8222 * This routine is invoked to read the configuration parameters from the HBA.
8223 * The configuration parameters are used to set the base and maximum values
8224 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
8225 * allocation for the port.
8226 *
8227 * Return codes
8228 * 0 - successful
8229 * -ENOMEM - No available memory
8230 * -EIO - The mailbox failed to complete successfully.
8231 **/
8232int
8233lpfc_sli4_read_config(struct lpfc_hba *phba)
8234{
8235 LPFC_MBOXQ_t *pmb;
8236 struct lpfc_mbx_read_config *rd_config;
8237 union lpfc_sli4_cfg_shdr *shdr;
8238 uint32_t shdr_status, shdr_add_status;
8239 struct lpfc_mbx_get_func_cfg *get_func_cfg;
8240 struct lpfc_rsrc_desc_fcfcoe *desc;
8241 char *pdesc_0;
8242 uint16_t forced_link_speed;
David Brazdil0f672f62019-12-10 10:32:29 +00008243 uint32_t if_type, qmin;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008244 int length, i, rc = 0, rc2;
8245
8246 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
8247 if (!pmb) {
8248 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8249 "2011 Unable to allocate memory for issuing "
8250 "SLI_CONFIG_SPECIAL mailbox command\n");
8251 return -ENOMEM;
8252 }
8253
8254 lpfc_read_config(phba, pmb);
8255
8256 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
8257 if (rc != MBX_SUCCESS) {
8258 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8259 "2012 Mailbox failed , mbxCmd x%x "
8260 "READ_CONFIG, mbxStatus x%x\n",
8261 bf_get(lpfc_mqe_command, &pmb->u.mqe),
8262 bf_get(lpfc_mqe_status, &pmb->u.mqe));
8263 rc = -EIO;
8264 } else {
8265 rd_config = &pmb->u.mqe.un.rd_config;
8266 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
8267 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
8268 phba->sli4_hba.lnk_info.lnk_tp =
8269 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
8270 phba->sli4_hba.lnk_info.lnk_no =
8271 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
8272 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8273 "3081 lnk_type:%d, lnk_numb:%d\n",
8274 phba->sli4_hba.lnk_info.lnk_tp,
8275 phba->sli4_hba.lnk_info.lnk_no);
8276 } else
8277 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
8278 "3082 Mailbox (x%x) returned ldv:x0\n",
8279 bf_get(lpfc_mqe_command, &pmb->u.mqe));
8280 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
8281 phba->bbcredit_support = 1;
8282 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
8283 }
8284
David Brazdil0f672f62019-12-10 10:32:29 +00008285 phba->sli4_hba.conf_trunk =
8286 bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008287 phba->sli4_hba.extents_in_use =
8288 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
8289 phba->sli4_hba.max_cfg_param.max_xri =
8290 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
David Brazdil0f672f62019-12-10 10:32:29 +00008291 /* Reduce resource usage in kdump environment */
8292 if (is_kdump_kernel() &&
8293 phba->sli4_hba.max_cfg_param.max_xri > 512)
8294 phba->sli4_hba.max_cfg_param.max_xri = 512;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008295 phba->sli4_hba.max_cfg_param.xri_base =
8296 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
8297 phba->sli4_hba.max_cfg_param.max_vpi =
8298 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
David Brazdil0f672f62019-12-10 10:32:29 +00008299 /* Limit the max we support */
8300 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
8301 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008302 phba->sli4_hba.max_cfg_param.vpi_base =
8303 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
8304 phba->sli4_hba.max_cfg_param.max_rpi =
8305 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
8306 phba->sli4_hba.max_cfg_param.rpi_base =
8307 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
8308 phba->sli4_hba.max_cfg_param.max_vfi =
8309 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
8310 phba->sli4_hba.max_cfg_param.vfi_base =
8311 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
8312 phba->sli4_hba.max_cfg_param.max_fcfi =
8313 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
8314 phba->sli4_hba.max_cfg_param.max_eq =
8315 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
8316 phba->sli4_hba.max_cfg_param.max_rq =
8317 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
8318 phba->sli4_hba.max_cfg_param.max_wq =
8319 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
8320 phba->sli4_hba.max_cfg_param.max_cq =
8321 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
8322 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
8323 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
8324 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
8325 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
8326 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
8327 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
8328 phba->max_vports = phba->max_vpi;
8329 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8330 "2003 cfg params Extents? %d "
8331 "XRI(B:%d M:%d), "
8332 "VPI(B:%d M:%d) "
8333 "VFI(B:%d M:%d) "
8334 "RPI(B:%d M:%d) "
8335 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d\n",
8336 phba->sli4_hba.extents_in_use,
8337 phba->sli4_hba.max_cfg_param.xri_base,
8338 phba->sli4_hba.max_cfg_param.max_xri,
8339 phba->sli4_hba.max_cfg_param.vpi_base,
8340 phba->sli4_hba.max_cfg_param.max_vpi,
8341 phba->sli4_hba.max_cfg_param.vfi_base,
8342 phba->sli4_hba.max_cfg_param.max_vfi,
8343 phba->sli4_hba.max_cfg_param.rpi_base,
8344 phba->sli4_hba.max_cfg_param.max_rpi,
8345 phba->sli4_hba.max_cfg_param.max_fcfi,
8346 phba->sli4_hba.max_cfg_param.max_eq,
8347 phba->sli4_hba.max_cfg_param.max_cq,
8348 phba->sli4_hba.max_cfg_param.max_wq,
8349 phba->sli4_hba.max_cfg_param.max_rq);
8350
8351 /*
David Brazdil0f672f62019-12-10 10:32:29 +00008352 * Calculate queue resources based on how
8353 * many WQ/CQ/EQs are available.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008354 */
David Brazdil0f672f62019-12-10 10:32:29 +00008355 qmin = phba->sli4_hba.max_cfg_param.max_wq;
8356 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
8357 qmin = phba->sli4_hba.max_cfg_param.max_cq;
8358 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
8359 qmin = phba->sli4_hba.max_cfg_param.max_eq;
8360 /*
8361 * Whats left after this can go toward NVME / FCP.
8362 * The minus 4 accounts for ELS, NVME LS, MBOX
8363 * plus one extra. When configured for
8364 * NVMET, FCP io channel WQs are not created.
8365 */
8366 qmin -= 4;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008367
David Brazdil0f672f62019-12-10 10:32:29 +00008368 /* Check to see if there is enough for NVME */
8369 if ((phba->cfg_irq_chann > qmin) ||
8370 (phba->cfg_hdw_queue > qmin)) {
8371 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8372 "2005 Reducing Queues: "
8373 "WQ %d CQ %d EQ %d: min %d: "
8374 "IRQ %d HDWQ %d\n",
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008375 phba->sli4_hba.max_cfg_param.max_wq,
8376 phba->sli4_hba.max_cfg_param.max_cq,
David Brazdil0f672f62019-12-10 10:32:29 +00008377 phba->sli4_hba.max_cfg_param.max_eq,
8378 qmin, phba->cfg_irq_chann,
8379 phba->cfg_hdw_queue);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008380
David Brazdil0f672f62019-12-10 10:32:29 +00008381 if (phba->cfg_irq_chann > qmin)
8382 phba->cfg_irq_chann = qmin;
8383 if (phba->cfg_hdw_queue > qmin)
8384 phba->cfg_hdw_queue = qmin;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008385 }
8386 }
8387
8388 if (rc)
8389 goto read_cfg_out;
8390
8391 /* Update link speed if forced link speed is supported */
8392 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8393 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
8394 forced_link_speed =
8395 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
8396 if (forced_link_speed) {
8397 phba->hba_flag |= HBA_FORCED_LINK_SPEED;
8398
8399 switch (forced_link_speed) {
8400 case LINK_SPEED_1G:
8401 phba->cfg_link_speed =
8402 LPFC_USER_LINK_SPEED_1G;
8403 break;
8404 case LINK_SPEED_2G:
8405 phba->cfg_link_speed =
8406 LPFC_USER_LINK_SPEED_2G;
8407 break;
8408 case LINK_SPEED_4G:
8409 phba->cfg_link_speed =
8410 LPFC_USER_LINK_SPEED_4G;
8411 break;
8412 case LINK_SPEED_8G:
8413 phba->cfg_link_speed =
8414 LPFC_USER_LINK_SPEED_8G;
8415 break;
8416 case LINK_SPEED_10G:
8417 phba->cfg_link_speed =
8418 LPFC_USER_LINK_SPEED_10G;
8419 break;
8420 case LINK_SPEED_16G:
8421 phba->cfg_link_speed =
8422 LPFC_USER_LINK_SPEED_16G;
8423 break;
8424 case LINK_SPEED_32G:
8425 phba->cfg_link_speed =
8426 LPFC_USER_LINK_SPEED_32G;
8427 break;
8428 case LINK_SPEED_64G:
8429 phba->cfg_link_speed =
8430 LPFC_USER_LINK_SPEED_64G;
8431 break;
8432 case 0xffff:
8433 phba->cfg_link_speed =
8434 LPFC_USER_LINK_SPEED_AUTO;
8435 break;
8436 default:
8437 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8438 "0047 Unrecognized link "
8439 "speed : %d\n",
8440 forced_link_speed);
8441 phba->cfg_link_speed =
8442 LPFC_USER_LINK_SPEED_AUTO;
8443 }
8444 }
8445 }
8446
8447 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
8448 length = phba->sli4_hba.max_cfg_param.max_xri -
8449 lpfc_sli4_get_els_iocb_cnt(phba);
8450 if (phba->cfg_hba_queue_depth > length) {
8451 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8452 "3361 HBA queue depth changed from %d to %d\n",
8453 phba->cfg_hba_queue_depth, length);
8454 phba->cfg_hba_queue_depth = length;
8455 }
8456
8457 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
8458 LPFC_SLI_INTF_IF_TYPE_2)
8459 goto read_cfg_out;
8460
8461 /* get the pf# and vf# for SLI4 if_type 2 port */
8462 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
8463 sizeof(struct lpfc_sli4_cfg_mhdr));
8464 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
8465 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
8466 length, LPFC_SLI4_MBX_EMBED);
8467
8468 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
8469 shdr = (union lpfc_sli4_cfg_shdr *)
8470 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
8471 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
8472 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
8473 if (rc2 || shdr_status || shdr_add_status) {
8474 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8475 "3026 Mailbox failed , mbxCmd x%x "
8476 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
8477 bf_get(lpfc_mqe_command, &pmb->u.mqe),
8478 bf_get(lpfc_mqe_status, &pmb->u.mqe));
8479 goto read_cfg_out;
8480 }
8481
8482 /* search for fc_fcoe resrouce descriptor */
8483 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
8484
8485 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
8486 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
8487 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
8488 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
8489 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
8490 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
8491 goto read_cfg_out;
8492
8493 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
8494 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
8495 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
8496 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
8497 phba->sli4_hba.iov.pf_number =
8498 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
8499 phba->sli4_hba.iov.vf_number =
8500 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
8501 break;
8502 }
8503 }
8504
8505 if (i < LPFC_RSRC_DESC_MAX_NUM)
8506 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
8507 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
8508 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
8509 phba->sli4_hba.iov.vf_number);
8510 else
8511 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
8512 "3028 GET_FUNCTION_CONFIG: failed to find "
David Brazdil0f672f62019-12-10 10:32:29 +00008513 "Resource Descriptor:x%x\n",
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008514 LPFC_RSRC_DESC_TYPE_FCFCOE);
8515
8516read_cfg_out:
8517 mempool_free(pmb, phba->mbox_mem_pool);
8518 return rc;
8519}
8520
8521/**
8522 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
8523 * @phba: pointer to lpfc hba data structure.
8524 *
8525 * This routine is invoked to setup the port-side endian order when
8526 * the port if_type is 0. This routine has no function for other
8527 * if_types.
8528 *
8529 * Return codes
8530 * 0 - successful
8531 * -ENOMEM - No available memory
8532 * -EIO - The mailbox failed to complete successfully.
8533 **/
8534static int
8535lpfc_setup_endian_order(struct lpfc_hba *phba)
8536{
8537 LPFC_MBOXQ_t *mboxq;
8538 uint32_t if_type, rc = 0;
8539 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
8540 HOST_ENDIAN_HIGH_WORD1};
8541
8542 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8543 switch (if_type) {
8544 case LPFC_SLI_INTF_IF_TYPE_0:
8545 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8546 GFP_KERNEL);
8547 if (!mboxq) {
8548 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8549 "0492 Unable to allocate memory for "
8550 "issuing SLI_CONFIG_SPECIAL mailbox "
8551 "command\n");
8552 return -ENOMEM;
8553 }
8554
8555 /*
8556 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
8557 * two words to contain special data values and no other data.
8558 */
8559 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
8560 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
8561 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8562 if (rc != MBX_SUCCESS) {
8563 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8564 "0493 SLI_CONFIG_SPECIAL mailbox "
8565 "failed with status x%x\n",
8566 rc);
8567 rc = -EIO;
8568 }
8569 mempool_free(mboxq, phba->mbox_mem_pool);
8570 break;
8571 case LPFC_SLI_INTF_IF_TYPE_6:
8572 case LPFC_SLI_INTF_IF_TYPE_2:
8573 case LPFC_SLI_INTF_IF_TYPE_1:
8574 default:
8575 break;
8576 }
8577 return rc;
8578}
8579
8580/**
8581 * lpfc_sli4_queue_verify - Verify and update EQ counts
8582 * @phba: pointer to lpfc hba data structure.
8583 *
8584 * This routine is invoked to check the user settable queue counts for EQs.
8585 * After this routine is called the counts will be set to valid values that
8586 * adhere to the constraints of the system's interrupt vectors and the port's
8587 * queue resources.
8588 *
8589 * Return codes
8590 * 0 - successful
8591 * -ENOMEM - No available memory
8592 **/
8593static int
8594lpfc_sli4_queue_verify(struct lpfc_hba *phba)
8595{
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008596 /*
8597 * Sanity check for configured queue parameters against the run-time
8598 * device parameters
8599 */
8600
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008601 if (phba->nvmet_support) {
David Brazdil0f672f62019-12-10 10:32:29 +00008602 if (phba->cfg_irq_chann < phba->cfg_nvmet_mrq)
8603 phba->cfg_nvmet_mrq = phba->cfg_irq_chann;
8604 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
8605 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008606 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008607
8608 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00008609 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
8610 phba->cfg_hdw_queue, phba->cfg_irq_chann,
8611 phba->cfg_nvmet_mrq);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008612
8613 /* Get EQ depth from module parameter, fake the default for now */
8614 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8615 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8616
8617 /* Get CQ depth from module parameter, fake the default for now */
8618 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8619 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
8620 return 0;
8621}
8622
8623static int
David Brazdil0f672f62019-12-10 10:32:29 +00008624lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008625{
8626 struct lpfc_queue *qdesc;
David Brazdil0f672f62019-12-10 10:32:29 +00008627 u32 wqesize;
8628 int cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008629
David Brazdil0f672f62019-12-10 10:32:29 +00008630 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ);
8631 /* Create Fast Path IO CQs */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008632 if (phba->enab_exp_wqcq_pages)
8633 /* Increase the CQ size when WQEs contain an embedded cdb */
8634 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
8635 phba->sli4_hba.cq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008636 LPFC_CQE_EXP_COUNT, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008637
8638 else
8639 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8640 phba->sli4_hba.cq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008641 phba->sli4_hba.cq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008642 if (!qdesc) {
8643 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00008644 "0499 Failed allocate fast-path IO CQ (%d)\n", idx);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008645 return 1;
8646 }
8647 qdesc->qe_valid = 1;
David Brazdil0f672f62019-12-10 10:32:29 +00008648 qdesc->hdwq = idx;
8649 qdesc->chann = cpu;
8650 phba->sli4_hba.hdwq[idx].io_cq = qdesc;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008651
David Brazdil0f672f62019-12-10 10:32:29 +00008652 /* Create Fast Path IO WQs */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008653 if (phba->enab_exp_wqcq_pages) {
8654 /* Increase the WQ size when WQEs contain an embedded cdb */
8655 wqesize = (phba->fcp_embed_io) ?
8656 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
8657 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
8658 wqesize,
David Brazdil0f672f62019-12-10 10:32:29 +00008659 LPFC_WQE_EXP_COUNT, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008660 } else
8661 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8662 phba->sli4_hba.wq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008663 phba->sli4_hba.wq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008664
8665 if (!qdesc) {
8666 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00008667 "0503 Failed allocate fast-path IO WQ (%d)\n",
8668 idx);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008669 return 1;
8670 }
David Brazdil0f672f62019-12-10 10:32:29 +00008671 qdesc->hdwq = idx;
8672 qdesc->chann = cpu;
8673 phba->sli4_hba.hdwq[idx].io_wq = qdesc;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008674 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8675 return 0;
8676}
8677
8678/**
8679 * lpfc_sli4_queue_create - Create all the SLI4 queues
8680 * @phba: pointer to lpfc hba data structure.
8681 *
8682 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
8683 * operation. For each SLI4 queue type, the parameters such as queue entry
8684 * count (queue depth) shall be taken from the module parameter. For now,
8685 * we just use some constant number as place holder.
8686 *
8687 * Return codes
8688 * 0 - successful
8689 * -ENOMEM - No availble memory
8690 * -EIO - The mailbox failed to complete successfully.
8691 **/
8692int
8693lpfc_sli4_queue_create(struct lpfc_hba *phba)
8694{
8695 struct lpfc_queue *qdesc;
David Brazdil0f672f62019-12-10 10:32:29 +00008696 int idx, cpu, eqcpu;
8697 struct lpfc_sli4_hdw_queue *qp;
8698 struct lpfc_vector_map_info *cpup;
8699 struct lpfc_vector_map_info *eqcpup;
8700 struct lpfc_eq_intr_info *eqi;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008701
8702 /*
8703 * Create HBA Record arrays.
8704 * Both NVME and FCP will share that same vectors / EQs
8705 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008706 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8707 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8708 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8709 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8710 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8711 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
8712 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8713 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8714 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8715 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
8716
David Brazdil0f672f62019-12-10 10:32:29 +00008717 if (!phba->sli4_hba.hdwq) {
8718 phba->sli4_hba.hdwq = kcalloc(
8719 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue),
8720 GFP_KERNEL);
8721 if (!phba->sli4_hba.hdwq) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008722 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00008723 "6427 Failed allocate memory for "
8724 "fast-path Hardware Queue array\n");
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008725 goto out_error;
8726 }
David Brazdil0f672f62019-12-10 10:32:29 +00008727 /* Prepare hardware queues to take IO buffers */
8728 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
8729 qp = &phba->sli4_hba.hdwq[idx];
8730 spin_lock_init(&qp->io_buf_list_get_lock);
8731 spin_lock_init(&qp->io_buf_list_put_lock);
8732 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
8733 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
8734 qp->get_io_bufs = 0;
8735 qp->put_io_bufs = 0;
8736 qp->total_io_bufs = 0;
8737 spin_lock_init(&qp->abts_io_buf_list_lock);
8738 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list);
8739 qp->abts_scsi_io_bufs = 0;
8740 qp->abts_nvme_io_bufs = 0;
8741 INIT_LIST_HEAD(&qp->sgl_list);
8742 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list);
8743 spin_lock_init(&qp->hdwq_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008744 }
8745 }
8746
David Brazdil0f672f62019-12-10 10:32:29 +00008747 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008748 if (phba->nvmet_support) {
8749 phba->sli4_hba.nvmet_cqset = kcalloc(
8750 phba->cfg_nvmet_mrq,
8751 sizeof(struct lpfc_queue *),
8752 GFP_KERNEL);
8753 if (!phba->sli4_hba.nvmet_cqset) {
8754 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8755 "3121 Fail allocate memory for "
8756 "fast-path CQ set array\n");
8757 goto out_error;
8758 }
8759 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
8760 phba->cfg_nvmet_mrq,
8761 sizeof(struct lpfc_queue *),
8762 GFP_KERNEL);
8763 if (!phba->sli4_hba.nvmet_mrq_hdr) {
8764 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8765 "3122 Fail allocate memory for "
8766 "fast-path RQ set hdr array\n");
8767 goto out_error;
8768 }
8769 phba->sli4_hba.nvmet_mrq_data = kcalloc(
8770 phba->cfg_nvmet_mrq,
8771 sizeof(struct lpfc_queue *),
8772 GFP_KERNEL);
8773 if (!phba->sli4_hba.nvmet_mrq_data) {
8774 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8775 "3124 Fail allocate memory for "
8776 "fast-path RQ set data array\n");
8777 goto out_error;
8778 }
8779 }
8780 }
8781
8782 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
8783
8784 /* Create HBA Event Queues (EQs) */
David Brazdil0f672f62019-12-10 10:32:29 +00008785 for_each_present_cpu(cpu) {
8786 /* We only want to create 1 EQ per vector, even though
8787 * multiple CPUs might be using that vector. so only
8788 * selects the CPUs that are LPFC_CPU_FIRST_IRQ.
8789 */
8790 cpup = &phba->sli4_hba.cpu_map[cpu];
8791 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
8792 continue;
8793
8794 /* Get a ptr to the Hardware Queue associated with this CPU */
8795 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
8796
8797 /* Allocate an EQ */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008798 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8799 phba->sli4_hba.eq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008800 phba->sli4_hba.eq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008801 if (!qdesc) {
8802 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00008803 "0497 Failed allocate EQ (%d)\n",
8804 cpup->hdwq);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008805 goto out_error;
8806 }
8807 qdesc->qe_valid = 1;
David Brazdil0f672f62019-12-10 10:32:29 +00008808 qdesc->hdwq = cpup->hdwq;
8809 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */
8810 qdesc->last_cpu = qdesc->chann;
8811
8812 /* Save the allocated EQ in the Hardware Queue */
8813 qp->hba_eq = qdesc;
8814
8815 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
8816 list_add(&qdesc->cpu_list, &eqi->list);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008817 }
8818
David Brazdil0f672f62019-12-10 10:32:29 +00008819 /* Now we need to populate the other Hardware Queues, that share
8820 * an IRQ vector, with the associated EQ ptr.
8821 */
8822 for_each_present_cpu(cpu) {
8823 cpup = &phba->sli4_hba.cpu_map[cpu];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008824
David Brazdil0f672f62019-12-10 10:32:29 +00008825 /* Check for EQ already allocated in previous loop */
8826 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
8827 continue;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008828
David Brazdil0f672f62019-12-10 10:32:29 +00008829 /* Check for multiple CPUs per hdwq */
8830 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
8831 if (qp->hba_eq)
8832 continue;
8833
8834 /* We need to share an EQ for this hdwq */
8835 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ);
8836 eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
8837 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
8838 }
8839
8840 /* Allocate IO Path SLI4 CQ/WQs */
8841 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
8842 if (lpfc_alloc_io_wq_cq(phba, idx))
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008843 goto out_error;
David Brazdil0f672f62019-12-10 10:32:29 +00008844 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008845
8846 if (phba->nvmet_support) {
8847 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
David Brazdil0f672f62019-12-10 10:32:29 +00008848 cpu = lpfc_find_cpu_handle(phba, idx,
8849 LPFC_FIND_BY_HDWQ);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008850 qdesc = lpfc_sli4_queue_alloc(phba,
8851 LPFC_DEFAULT_PAGE_SIZE,
8852 phba->sli4_hba.cq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008853 phba->sli4_hba.cq_ecount,
8854 cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008855 if (!qdesc) {
8856 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00008857 "3142 Failed allocate NVME "
8858 "CQ Set (%d)\n", idx);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008859 goto out_error;
8860 }
8861 qdesc->qe_valid = 1;
David Brazdil0f672f62019-12-10 10:32:29 +00008862 qdesc->hdwq = idx;
8863 qdesc->chann = cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008864 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
8865 }
8866 }
8867
8868 /*
8869 * Create Slow Path Completion Queues (CQs)
8870 */
8871
David Brazdil0f672f62019-12-10 10:32:29 +00008872 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008873 /* Create slow-path Mailbox Command Complete Queue */
8874 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8875 phba->sli4_hba.cq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008876 phba->sli4_hba.cq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008877 if (!qdesc) {
8878 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8879 "0500 Failed allocate slow-path mailbox CQ\n");
8880 goto out_error;
8881 }
8882 qdesc->qe_valid = 1;
8883 phba->sli4_hba.mbx_cq = qdesc;
8884
8885 /* Create slow-path ELS Complete Queue */
8886 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8887 phba->sli4_hba.cq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008888 phba->sli4_hba.cq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008889 if (!qdesc) {
8890 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8891 "0501 Failed allocate slow-path ELS CQ\n");
8892 goto out_error;
8893 }
8894 qdesc->qe_valid = 1;
David Brazdil0f672f62019-12-10 10:32:29 +00008895 qdesc->chann = cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008896 phba->sli4_hba.els_cq = qdesc;
8897
8898
8899 /*
8900 * Create Slow Path Work Queues (WQs)
8901 */
8902
8903 /* Create Mailbox Command Queue */
8904
8905 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8906 phba->sli4_hba.mq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008907 phba->sli4_hba.mq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008908 if (!qdesc) {
8909 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8910 "0505 Failed allocate slow-path MQ\n");
8911 goto out_error;
8912 }
David Brazdil0f672f62019-12-10 10:32:29 +00008913 qdesc->chann = cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008914 phba->sli4_hba.mbx_wq = qdesc;
8915
8916 /*
8917 * Create ELS Work Queues
8918 */
8919
8920 /* Create slow-path ELS Work Queue */
8921 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8922 phba->sli4_hba.wq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008923 phba->sli4_hba.wq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008924 if (!qdesc) {
8925 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8926 "0504 Failed allocate slow-path ELS WQ\n");
8927 goto out_error;
8928 }
David Brazdil0f672f62019-12-10 10:32:29 +00008929 qdesc->chann = cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008930 phba->sli4_hba.els_wq = qdesc;
8931 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8932
8933 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8934 /* Create NVME LS Complete Queue */
8935 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8936 phba->sli4_hba.cq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008937 phba->sli4_hba.cq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008938 if (!qdesc) {
8939 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8940 "6079 Failed allocate NVME LS CQ\n");
8941 goto out_error;
8942 }
David Brazdil0f672f62019-12-10 10:32:29 +00008943 qdesc->chann = cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008944 qdesc->qe_valid = 1;
8945 phba->sli4_hba.nvmels_cq = qdesc;
8946
8947 /* Create NVME LS Work Queue */
8948 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8949 phba->sli4_hba.wq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008950 phba->sli4_hba.wq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008951 if (!qdesc) {
8952 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8953 "6080 Failed allocate NVME LS WQ\n");
8954 goto out_error;
8955 }
David Brazdil0f672f62019-12-10 10:32:29 +00008956 qdesc->chann = cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008957 phba->sli4_hba.nvmels_wq = qdesc;
8958 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8959 }
8960
8961 /*
8962 * Create Receive Queue (RQ)
8963 */
8964
8965 /* Create Receive Queue for header */
8966 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8967 phba->sli4_hba.rq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008968 phba->sli4_hba.rq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008969 if (!qdesc) {
8970 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8971 "0506 Failed allocate receive HRQ\n");
8972 goto out_error;
8973 }
8974 phba->sli4_hba.hdr_rq = qdesc;
8975
8976 /* Create Receive Queue for data */
8977 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
8978 phba->sli4_hba.rq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008979 phba->sli4_hba.rq_ecount, cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008980 if (!qdesc) {
8981 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8982 "0507 Failed allocate receive DRQ\n");
8983 goto out_error;
8984 }
8985 phba->sli4_hba.dat_rq = qdesc;
8986
David Brazdil0f672f62019-12-10 10:32:29 +00008987 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
8988 phba->nvmet_support) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008989 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
David Brazdil0f672f62019-12-10 10:32:29 +00008990 cpu = lpfc_find_cpu_handle(phba, idx,
8991 LPFC_FIND_BY_HDWQ);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008992 /* Create NVMET Receive Queue for header */
8993 qdesc = lpfc_sli4_queue_alloc(phba,
8994 LPFC_DEFAULT_PAGE_SIZE,
8995 phba->sli4_hba.rq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00008996 LPFC_NVMET_RQE_DEF_COUNT,
8997 cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00008998 if (!qdesc) {
8999 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9000 "3146 Failed allocate "
9001 "receive HRQ\n");
9002 goto out_error;
9003 }
David Brazdil0f672f62019-12-10 10:32:29 +00009004 qdesc->hdwq = idx;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009005 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
9006
9007 /* Only needed for header of RQ pair */
David Brazdil0f672f62019-12-10 10:32:29 +00009008 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp),
9009 GFP_KERNEL,
9010 cpu_to_node(cpu));
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009011 if (qdesc->rqbp == NULL) {
9012 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9013 "6131 Failed allocate "
9014 "Header RQBP\n");
9015 goto out_error;
9016 }
9017
9018 /* Put list in known state in case driver load fails. */
9019 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
9020
9021 /* Create NVMET Receive Queue for data */
9022 qdesc = lpfc_sli4_queue_alloc(phba,
9023 LPFC_DEFAULT_PAGE_SIZE,
9024 phba->sli4_hba.rq_esize,
David Brazdil0f672f62019-12-10 10:32:29 +00009025 LPFC_NVMET_RQE_DEF_COUNT,
9026 cpu);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009027 if (!qdesc) {
9028 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9029 "3156 Failed allocate "
9030 "receive DRQ\n");
9031 goto out_error;
9032 }
David Brazdil0f672f62019-12-10 10:32:29 +00009033 qdesc->hdwq = idx;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009034 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
9035 }
9036 }
9037
David Brazdil0f672f62019-12-10 10:32:29 +00009038 /* Clear NVME stats */
9039 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
9040 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
9041 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
9042 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
9043 }
9044 }
9045
9046 /* Clear SCSI stats */
9047 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
9048 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
9049 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
9050 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
9051 }
9052 }
9053
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009054 return 0;
9055
9056out_error:
9057 lpfc_sli4_queue_destroy(phba);
9058 return -ENOMEM;
9059}
9060
9061static inline void
9062__lpfc_sli4_release_queue(struct lpfc_queue **qp)
9063{
9064 if (*qp != NULL) {
9065 lpfc_sli4_queue_free(*qp);
9066 *qp = NULL;
9067 }
9068}
9069
9070static inline void
9071lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
9072{
9073 int idx;
9074
9075 if (*qs == NULL)
9076 return;
9077
9078 for (idx = 0; idx < max; idx++)
9079 __lpfc_sli4_release_queue(&(*qs)[idx]);
9080
9081 kfree(*qs);
9082 *qs = NULL;
9083}
9084
9085static inline void
David Brazdil0f672f62019-12-10 10:32:29 +00009086lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009087{
David Brazdil0f672f62019-12-10 10:32:29 +00009088 struct lpfc_sli4_hdw_queue *hdwq;
9089 struct lpfc_queue *eq;
9090 uint32_t idx;
9091
9092 hdwq = phba->sli4_hba.hdwq;
9093
9094 /* Loop thru all Hardware Queues */
9095 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
9096 /* Free the CQ/WQ corresponding to the Hardware Queue */
9097 lpfc_sli4_queue_free(hdwq[idx].io_cq);
9098 lpfc_sli4_queue_free(hdwq[idx].io_wq);
Olivier Deprez0e641232021-09-23 10:07:05 +02009099 hdwq[idx].hba_eq = NULL;
David Brazdil0f672f62019-12-10 10:32:29 +00009100 hdwq[idx].io_cq = NULL;
9101 hdwq[idx].io_wq = NULL;
9102 if (phba->cfg_xpsgl && !phba->nvmet_support)
9103 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]);
9104 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]);
9105 }
9106 /* Loop thru all IRQ vectors */
9107 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
9108 /* Free the EQ corresponding to the IRQ vector */
9109 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
9110 lpfc_sli4_queue_free(eq);
9111 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009112 }
9113}
9114
9115/**
9116 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
9117 * @phba: pointer to lpfc hba data structure.
9118 *
9119 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
9120 * operation.
9121 *
9122 * Return codes
9123 * 0 - successful
9124 * -ENOMEM - No available memory
9125 * -EIO - The mailbox failed to complete successfully.
9126 **/
9127void
9128lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
9129{
David Brazdil0f672f62019-12-10 10:32:29 +00009130 /*
9131 * Set FREE_INIT before beginning to free the queues.
9132 * Wait until the users of queues to acknowledge to
9133 * release queues by clearing FREE_WAIT.
9134 */
9135 spin_lock_irq(&phba->hbalock);
9136 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT;
9137 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) {
9138 spin_unlock_irq(&phba->hbalock);
9139 msleep(20);
9140 spin_lock_irq(&phba->hbalock);
9141 }
9142 spin_unlock_irq(&phba->hbalock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009143
Olivier Deprez0e641232021-09-23 10:07:05 +02009144 lpfc_sli4_cleanup_poll_list(phba);
9145
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009146 /* Release HBA eqs */
David Brazdil0f672f62019-12-10 10:32:29 +00009147 if (phba->sli4_hba.hdwq)
9148 lpfc_sli4_release_hdwq(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009149
9150 if (phba->nvmet_support) {
9151 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
9152 phba->cfg_nvmet_mrq);
9153
9154 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
9155 phba->cfg_nvmet_mrq);
9156 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
9157 phba->cfg_nvmet_mrq);
9158 }
9159
9160 /* Release mailbox command work queue */
9161 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
9162
9163 /* Release ELS work queue */
9164 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
9165
9166 /* Release ELS work queue */
9167 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
9168
9169 /* Release unsolicited receive queue */
9170 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
9171 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
9172
9173 /* Release ELS complete queue */
9174 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
9175
9176 /* Release NVME LS complete queue */
9177 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
9178
9179 /* Release mailbox command complete queue */
9180 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
9181
9182 /* Everything on this list has been freed */
9183 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
David Brazdil0f672f62019-12-10 10:32:29 +00009184
9185 /* Done with freeing the queues */
9186 spin_lock_irq(&phba->hbalock);
9187 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT;
9188 spin_unlock_irq(&phba->hbalock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009189}
9190
9191int
9192lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
9193{
9194 struct lpfc_rqb *rqbp;
9195 struct lpfc_dmabuf *h_buf;
9196 struct rqb_dmabuf *rqb_buffer;
9197
9198 rqbp = rq->rqbp;
9199 while (!list_empty(&rqbp->rqb_buffer_list)) {
9200 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
9201 struct lpfc_dmabuf, list);
9202
9203 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
9204 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
9205 rqbp->buffer_count--;
9206 }
9207 return 1;
9208}
9209
9210static int
9211lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
9212 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
9213 int qidx, uint32_t qtype)
9214{
9215 struct lpfc_sli_ring *pring;
9216 int rc;
9217
9218 if (!eq || !cq || !wq) {
9219 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9220 "6085 Fast-path %s (%d) not allocated\n",
9221 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
9222 return -ENOMEM;
9223 }
9224
9225 /* create the Cq first */
9226 rc = lpfc_cq_create(phba, cq, eq,
9227 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
9228 if (rc) {
9229 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9230 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
9231 qidx, (uint32_t)rc);
9232 return rc;
9233 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009234
9235 if (qtype != LPFC_MBOX) {
David Brazdil0f672f62019-12-10 10:32:29 +00009236 /* Setup cq_map for fast lookup */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009237 if (cq_map)
9238 *cq_map = cq->queue_id;
9239
9240 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9241 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
9242 qidx, cq->queue_id, qidx, eq->queue_id);
9243
9244 /* create the wq */
9245 rc = lpfc_wq_create(phba, wq, cq, qtype);
9246 if (rc) {
9247 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00009248 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n",
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009249 qidx, (uint32_t)rc);
9250 /* no need to tear down cq - caller will do so */
9251 return rc;
9252 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009253
9254 /* Bind this CQ/WQ to the NVME ring */
9255 pring = wq->pring;
9256 pring->sli.sli4.wqp = (void *)wq;
9257 cq->pring = pring;
9258
9259 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9260 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
9261 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
9262 } else {
9263 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
9264 if (rc) {
9265 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9266 "0539 Failed setup of slow-path MQ: "
9267 "rc = 0x%x\n", rc);
9268 /* no need to tear down cq - caller will do so */
9269 return rc;
9270 }
9271
9272 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9273 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
9274 phba->sli4_hba.mbx_wq->queue_id,
9275 phba->sli4_hba.mbx_cq->queue_id);
9276 }
9277
9278 return 0;
9279}
9280
9281/**
David Brazdil0f672f62019-12-10 10:32:29 +00009282 * lpfc_setup_cq_lookup - Setup the CQ lookup table
9283 * @phba: pointer to lpfc hba data structure.
9284 *
9285 * This routine will populate the cq_lookup table by all
9286 * available CQ queue_id's.
9287 **/
9288static void
9289lpfc_setup_cq_lookup(struct lpfc_hba *phba)
9290{
9291 struct lpfc_queue *eq, *childq;
9292 int qidx;
9293
9294 memset(phba->sli4_hba.cq_lookup, 0,
9295 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
9296 /* Loop thru all IRQ vectors */
9297 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
9298 /* Get the EQ corresponding to the IRQ vector */
9299 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
9300 if (!eq)
9301 continue;
9302 /* Loop through all CQs associated with that EQ */
9303 list_for_each_entry(childq, &eq->child_list, list) {
9304 if (childq->queue_id > phba->sli4_hba.cq_max)
9305 continue;
9306 if (childq->subtype == LPFC_IO)
9307 phba->sli4_hba.cq_lookup[childq->queue_id] =
9308 childq;
9309 }
9310 }
9311}
9312
9313/**
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009314 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
9315 * @phba: pointer to lpfc hba data structure.
9316 *
9317 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
9318 * operation.
9319 *
9320 * Return codes
9321 * 0 - successful
9322 * -ENOMEM - No available memory
9323 * -EIO - The mailbox failed to complete successfully.
9324 **/
9325int
9326lpfc_sli4_queue_setup(struct lpfc_hba *phba)
9327{
9328 uint32_t shdr_status, shdr_add_status;
9329 union lpfc_sli4_cfg_shdr *shdr;
David Brazdil0f672f62019-12-10 10:32:29 +00009330 struct lpfc_vector_map_info *cpup;
9331 struct lpfc_sli4_hdw_queue *qp;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009332 LPFC_MBOXQ_t *mboxq;
David Brazdil0f672f62019-12-10 10:32:29 +00009333 int qidx, cpu;
9334 uint32_t length, usdelay;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009335 int rc = -ENOMEM;
9336
9337 /* Check for dual-ULP support */
9338 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9339 if (!mboxq) {
9340 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9341 "3249 Unable to allocate memory for "
9342 "QUERY_FW_CFG mailbox command\n");
9343 return -ENOMEM;
9344 }
9345 length = (sizeof(struct lpfc_mbx_query_fw_config) -
9346 sizeof(struct lpfc_sli4_cfg_mhdr));
9347 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9348 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
9349 length, LPFC_SLI4_MBX_EMBED);
9350
9351 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9352
9353 shdr = (union lpfc_sli4_cfg_shdr *)
9354 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9355 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9356 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
9357 if (shdr_status || shdr_add_status || rc) {
9358 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9359 "3250 QUERY_FW_CFG mailbox failed with status "
9360 "x%x add_status x%x, mbx status x%x\n",
9361 shdr_status, shdr_add_status, rc);
Olivier Deprez0e641232021-09-23 10:07:05 +02009362 mempool_free(mboxq, phba->mbox_mem_pool);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009363 rc = -ENXIO;
9364 goto out_error;
9365 }
9366
9367 phba->sli4_hba.fw_func_mode =
9368 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
9369 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
9370 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
9371 phba->sli4_hba.physical_port =
9372 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
9373 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9374 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
9375 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
9376 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
9377
Olivier Deprez0e641232021-09-23 10:07:05 +02009378 mempool_free(mboxq, phba->mbox_mem_pool);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009379
9380 /*
9381 * Set up HBA Event Queues (EQs)
9382 */
David Brazdil0f672f62019-12-10 10:32:29 +00009383 qp = phba->sli4_hba.hdwq;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009384
9385 /* Set up HBA event queue */
David Brazdil0f672f62019-12-10 10:32:29 +00009386 if (!qp) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009387 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9388 "3147 Fast-path EQs not allocated\n");
9389 rc = -ENOMEM;
9390 goto out_error;
9391 }
David Brazdil0f672f62019-12-10 10:32:29 +00009392
9393 /* Loop thru all IRQ vectors */
9394 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
9395 /* Create HBA Event Queues (EQs) in order */
9396 for_each_present_cpu(cpu) {
9397 cpup = &phba->sli4_hba.cpu_map[cpu];
9398
9399 /* Look for the CPU thats using that vector with
9400 * LPFC_CPU_FIRST_IRQ set.
9401 */
9402 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
9403 continue;
9404 if (qidx != cpup->eq)
9405 continue;
9406
9407 /* Create an EQ for that vector */
9408 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq,
9409 phba->cfg_fcp_imax);
9410 if (rc) {
9411 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9412 "0523 Failed setup of fast-path"
9413 " EQ (%d), rc = 0x%x\n",
9414 cpup->eq, (uint32_t)rc);
9415 goto out_destroy;
9416 }
9417
9418 /* Save the EQ for that vector in the hba_eq_hdl */
9419 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
9420 qp[cpup->hdwq].hba_eq;
9421
9422 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9423 "2584 HBA EQ setup: queue[%d]-id=%d\n",
9424 cpup->eq,
9425 qp[cpup->hdwq].hba_eq->queue_id);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009426 }
David Brazdil0f672f62019-12-10 10:32:29 +00009427 }
9428
9429 /* Loop thru all Hardware Queues */
9430 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
9431 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ);
9432 cpup = &phba->sli4_hba.cpu_map[cpu];
9433
9434 /* Create the CQ/WQ corresponding to the Hardware Queue */
9435 rc = lpfc_create_wq_cq(phba,
9436 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
9437 qp[qidx].io_cq,
9438 qp[qidx].io_wq,
9439 &phba->sli4_hba.hdwq[qidx].io_cq_map,
9440 qidx,
9441 LPFC_IO);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009442 if (rc) {
9443 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009444 "0535 Failed to setup fastpath "
David Brazdil0f672f62019-12-10 10:32:29 +00009445 "IO WQ/CQ (%d), rc = 0x%x\n",
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009446 qidx, (uint32_t)rc);
David Brazdil0f672f62019-12-10 10:32:29 +00009447 goto out_destroy;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009448 }
9449 }
9450
9451 /*
9452 * Set up Slow Path Complete Queues (CQs)
9453 */
9454
9455 /* Set up slow-path MBOX CQ/MQ */
9456
9457 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
9458 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9459 "0528 %s not allocated\n",
9460 phba->sli4_hba.mbx_cq ?
9461 "Mailbox WQ" : "Mailbox CQ");
9462 rc = -ENOMEM;
9463 goto out_destroy;
9464 }
9465
David Brazdil0f672f62019-12-10 10:32:29 +00009466 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009467 phba->sli4_hba.mbx_cq,
9468 phba->sli4_hba.mbx_wq,
9469 NULL, 0, LPFC_MBOX);
9470 if (rc) {
9471 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9472 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
9473 (uint32_t)rc);
9474 goto out_destroy;
9475 }
9476 if (phba->nvmet_support) {
9477 if (!phba->sli4_hba.nvmet_cqset) {
9478 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9479 "3165 Fast-path NVME CQ Set "
9480 "array not allocated\n");
9481 rc = -ENOMEM;
9482 goto out_destroy;
9483 }
9484 if (phba->cfg_nvmet_mrq > 1) {
9485 rc = lpfc_cq_create_set(phba,
9486 phba->sli4_hba.nvmet_cqset,
David Brazdil0f672f62019-12-10 10:32:29 +00009487 qp,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009488 LPFC_WCQ, LPFC_NVMET);
9489 if (rc) {
9490 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9491 "3164 Failed setup of NVME CQ "
9492 "Set, rc = 0x%x\n",
9493 (uint32_t)rc);
9494 goto out_destroy;
9495 }
9496 } else {
9497 /* Set up NVMET Receive Complete Queue */
9498 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
David Brazdil0f672f62019-12-10 10:32:29 +00009499 qp[0].hba_eq,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009500 LPFC_WCQ, LPFC_NVMET);
9501 if (rc) {
9502 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9503 "6089 Failed setup NVMET CQ: "
9504 "rc = 0x%x\n", (uint32_t)rc);
9505 goto out_destroy;
9506 }
9507 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
9508
9509 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9510 "6090 NVMET CQ setup: cq-id=%d, "
9511 "parent eq-id=%d\n",
9512 phba->sli4_hba.nvmet_cqset[0]->queue_id,
David Brazdil0f672f62019-12-10 10:32:29 +00009513 qp[0].hba_eq->queue_id);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009514 }
9515 }
9516
9517 /* Set up slow-path ELS WQ/CQ */
9518 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
9519 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9520 "0530 ELS %s not allocated\n",
9521 phba->sli4_hba.els_cq ? "WQ" : "CQ");
9522 rc = -ENOMEM;
9523 goto out_destroy;
9524 }
David Brazdil0f672f62019-12-10 10:32:29 +00009525 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
9526 phba->sli4_hba.els_cq,
9527 phba->sli4_hba.els_wq,
9528 NULL, 0, LPFC_ELS);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009529 if (rc) {
9530 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00009531 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
9532 (uint32_t)rc);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009533 goto out_destroy;
9534 }
9535 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9536 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
9537 phba->sli4_hba.els_wq->queue_id,
9538 phba->sli4_hba.els_cq->queue_id);
9539
David Brazdil0f672f62019-12-10 10:32:29 +00009540 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009541 /* Set up NVME LS Complete Queue */
9542 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
9543 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9544 "6091 LS %s not allocated\n",
9545 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
9546 rc = -ENOMEM;
9547 goto out_destroy;
9548 }
David Brazdil0f672f62019-12-10 10:32:29 +00009549 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
9550 phba->sli4_hba.nvmels_cq,
9551 phba->sli4_hba.nvmels_wq,
9552 NULL, 0, LPFC_NVME_LS);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009553 if (rc) {
9554 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00009555 "0526 Failed setup of NVVME LS WQ/CQ: "
9556 "rc = 0x%x\n", (uint32_t)rc);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009557 goto out_destroy;
9558 }
9559
9560 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9561 "6096 ELS WQ setup: wq-id=%d, "
9562 "parent cq-id=%d\n",
9563 phba->sli4_hba.nvmels_wq->queue_id,
9564 phba->sli4_hba.nvmels_cq->queue_id);
9565 }
9566
9567 /*
9568 * Create NVMET Receive Queue (RQ)
9569 */
9570 if (phba->nvmet_support) {
9571 if ((!phba->sli4_hba.nvmet_cqset) ||
9572 (!phba->sli4_hba.nvmet_mrq_hdr) ||
9573 (!phba->sli4_hba.nvmet_mrq_data)) {
9574 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9575 "6130 MRQ CQ Queues not "
9576 "allocated\n");
9577 rc = -ENOMEM;
9578 goto out_destroy;
9579 }
9580 if (phba->cfg_nvmet_mrq > 1) {
9581 rc = lpfc_mrq_create(phba,
9582 phba->sli4_hba.nvmet_mrq_hdr,
9583 phba->sli4_hba.nvmet_mrq_data,
9584 phba->sli4_hba.nvmet_cqset,
9585 LPFC_NVMET);
9586 if (rc) {
9587 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9588 "6098 Failed setup of NVMET "
9589 "MRQ: rc = 0x%x\n",
9590 (uint32_t)rc);
9591 goto out_destroy;
9592 }
9593
9594 } else {
9595 rc = lpfc_rq_create(phba,
9596 phba->sli4_hba.nvmet_mrq_hdr[0],
9597 phba->sli4_hba.nvmet_mrq_data[0],
9598 phba->sli4_hba.nvmet_cqset[0],
9599 LPFC_NVMET);
9600 if (rc) {
9601 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9602 "6057 Failed setup of NVMET "
9603 "Receive Queue: rc = 0x%x\n",
9604 (uint32_t)rc);
9605 goto out_destroy;
9606 }
9607
9608 lpfc_printf_log(
9609 phba, KERN_INFO, LOG_INIT,
9610 "6099 NVMET RQ setup: hdr-rq-id=%d, "
9611 "dat-rq-id=%d parent cq-id=%d\n",
9612 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
9613 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
9614 phba->sli4_hba.nvmet_cqset[0]->queue_id);
9615
9616 }
9617 }
9618
9619 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
9620 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9621 "0540 Receive Queue not allocated\n");
9622 rc = -ENOMEM;
9623 goto out_destroy;
9624 }
9625
9626 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
9627 phba->sli4_hba.els_cq, LPFC_USOL);
9628 if (rc) {
9629 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9630 "0541 Failed setup of Receive Queue: "
9631 "rc = 0x%x\n", (uint32_t)rc);
9632 goto out_destroy;
9633 }
9634
9635 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9636 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
9637 "parent cq-id=%d\n",
9638 phba->sli4_hba.hdr_rq->queue_id,
9639 phba->sli4_hba.dat_rq->queue_id,
9640 phba->sli4_hba.els_cq->queue_id);
9641
David Brazdil0f672f62019-12-10 10:32:29 +00009642 if (phba->cfg_fcp_imax)
9643 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
9644 else
9645 usdelay = 0;
9646
9647 for (qidx = 0; qidx < phba->cfg_irq_chann;
9648 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
9649 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
9650 usdelay);
9651
9652 if (phba->sli4_hba.cq_max) {
9653 kfree(phba->sli4_hba.cq_lookup);
9654 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
9655 sizeof(struct lpfc_queue *), GFP_KERNEL);
9656 if (!phba->sli4_hba.cq_lookup) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009657 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +00009658 "0549 Failed setup of CQ Lookup table: "
9659 "size 0x%x\n", phba->sli4_hba.cq_max);
9660 rc = -ENOMEM;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009661 goto out_destroy;
9662 }
David Brazdil0f672f62019-12-10 10:32:29 +00009663 lpfc_setup_cq_lookup(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009664 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009665 return 0;
9666
9667out_destroy:
9668 lpfc_sli4_queue_unset(phba);
9669out_error:
9670 return rc;
9671}
9672
9673/**
9674 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
9675 * @phba: pointer to lpfc hba data structure.
9676 *
9677 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
9678 * operation.
9679 *
9680 * Return codes
9681 * 0 - successful
9682 * -ENOMEM - No available memory
9683 * -EIO - The mailbox failed to complete successfully.
9684 **/
9685void
9686lpfc_sli4_queue_unset(struct lpfc_hba *phba)
9687{
David Brazdil0f672f62019-12-10 10:32:29 +00009688 struct lpfc_sli4_hdw_queue *qp;
9689 struct lpfc_queue *eq;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009690 int qidx;
9691
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009692 /* Unset mailbox command work queue */
9693 if (phba->sli4_hba.mbx_wq)
9694 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
9695
9696 /* Unset NVME LS work queue */
9697 if (phba->sli4_hba.nvmels_wq)
9698 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
9699
9700 /* Unset ELS work queue */
9701 if (phba->sli4_hba.els_wq)
9702 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
9703
9704 /* Unset unsolicited receive queue */
9705 if (phba->sli4_hba.hdr_rq)
9706 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
9707 phba->sli4_hba.dat_rq);
9708
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009709 /* Unset mailbox command complete queue */
9710 if (phba->sli4_hba.mbx_cq)
9711 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
9712
9713 /* Unset ELS complete queue */
9714 if (phba->sli4_hba.els_cq)
9715 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
9716
9717 /* Unset NVME LS complete queue */
9718 if (phba->sli4_hba.nvmels_cq)
9719 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
9720
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009721 if (phba->nvmet_support) {
9722 /* Unset NVMET MRQ queue */
9723 if (phba->sli4_hba.nvmet_mrq_hdr) {
9724 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9725 lpfc_rq_destroy(
9726 phba,
9727 phba->sli4_hba.nvmet_mrq_hdr[qidx],
9728 phba->sli4_hba.nvmet_mrq_data[qidx]);
9729 }
9730
9731 /* Unset NVMET CQ Set complete queue */
9732 if (phba->sli4_hba.nvmet_cqset) {
9733 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
9734 lpfc_cq_destroy(
9735 phba, phba->sli4_hba.nvmet_cqset[qidx]);
9736 }
9737 }
9738
David Brazdil0f672f62019-12-10 10:32:29 +00009739 /* Unset fast-path SLI4 queues */
9740 if (phba->sli4_hba.hdwq) {
9741 /* Loop thru all Hardware Queues */
9742 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
9743 /* Destroy the CQ/WQ corresponding to Hardware Queue */
9744 qp = &phba->sli4_hba.hdwq[qidx];
9745 lpfc_wq_destroy(phba, qp->io_wq);
9746 lpfc_cq_destroy(phba, qp->io_cq);
9747 }
9748 /* Loop thru all IRQ vectors */
9749 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
9750 /* Destroy the EQ corresponding to the IRQ vector */
9751 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
9752 lpfc_eq_destroy(phba, eq);
9753 }
9754 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009755
David Brazdil0f672f62019-12-10 10:32:29 +00009756 kfree(phba->sli4_hba.cq_lookup);
9757 phba->sli4_hba.cq_lookup = NULL;
9758 phba->sli4_hba.cq_max = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009759}
9760
9761/**
9762 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
9763 * @phba: pointer to lpfc hba data structure.
9764 *
9765 * This routine is invoked to allocate and set up a pool of completion queue
9766 * events. The body of the completion queue event is a completion queue entry
9767 * CQE. For now, this pool is used for the interrupt service routine to queue
9768 * the following HBA completion queue events for the worker thread to process:
9769 * - Mailbox asynchronous events
9770 * - Receive queue completion unsolicited events
9771 * Later, this can be used for all the slow-path events.
9772 *
9773 * Return codes
9774 * 0 - successful
9775 * -ENOMEM - No available memory
9776 **/
9777static int
9778lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
9779{
9780 struct lpfc_cq_event *cq_event;
9781 int i;
9782
9783 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
9784 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
9785 if (!cq_event)
9786 goto out_pool_create_fail;
9787 list_add_tail(&cq_event->list,
9788 &phba->sli4_hba.sp_cqe_event_pool);
9789 }
9790 return 0;
9791
9792out_pool_create_fail:
9793 lpfc_sli4_cq_event_pool_destroy(phba);
9794 return -ENOMEM;
9795}
9796
9797/**
9798 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
9799 * @phba: pointer to lpfc hba data structure.
9800 *
9801 * This routine is invoked to free the pool of completion queue events at
9802 * driver unload time. Note that, it is the responsibility of the driver
9803 * cleanup routine to free all the outstanding completion-queue events
9804 * allocated from this pool back into the pool before invoking this routine
9805 * to destroy the pool.
9806 **/
9807static void
9808lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
9809{
9810 struct lpfc_cq_event *cq_event, *next_cq_event;
9811
9812 list_for_each_entry_safe(cq_event, next_cq_event,
9813 &phba->sli4_hba.sp_cqe_event_pool, list) {
9814 list_del(&cq_event->list);
9815 kfree(cq_event);
9816 }
9817}
9818
9819/**
9820 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9821 * @phba: pointer to lpfc hba data structure.
9822 *
9823 * This routine is the lock free version of the API invoked to allocate a
9824 * completion-queue event from the free pool.
9825 *
9826 * Return: Pointer to the newly allocated completion-queue event if successful
9827 * NULL otherwise.
9828 **/
9829struct lpfc_cq_event *
9830__lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9831{
9832 struct lpfc_cq_event *cq_event = NULL;
9833
9834 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
9835 struct lpfc_cq_event, list);
9836 return cq_event;
9837}
9838
9839/**
9840 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
9841 * @phba: pointer to lpfc hba data structure.
9842 *
9843 * This routine is the lock version of the API invoked to allocate a
9844 * completion-queue event from the free pool.
9845 *
9846 * Return: Pointer to the newly allocated completion-queue event if successful
9847 * NULL otherwise.
9848 **/
9849struct lpfc_cq_event *
9850lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
9851{
9852 struct lpfc_cq_event *cq_event;
9853 unsigned long iflags;
9854
9855 spin_lock_irqsave(&phba->hbalock, iflags);
9856 cq_event = __lpfc_sli4_cq_event_alloc(phba);
9857 spin_unlock_irqrestore(&phba->hbalock, iflags);
9858 return cq_event;
9859}
9860
9861/**
9862 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9863 * @phba: pointer to lpfc hba data structure.
9864 * @cq_event: pointer to the completion queue event to be freed.
9865 *
9866 * This routine is the lock free version of the API invoked to release a
9867 * completion-queue event back into the free pool.
9868 **/
9869void
9870__lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9871 struct lpfc_cq_event *cq_event)
9872{
9873 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
9874}
9875
9876/**
9877 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
9878 * @phba: pointer to lpfc hba data structure.
9879 * @cq_event: pointer to the completion queue event to be freed.
9880 *
9881 * This routine is the lock version of the API invoked to release a
9882 * completion-queue event back into the free pool.
9883 **/
9884void
9885lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
9886 struct lpfc_cq_event *cq_event)
9887{
9888 unsigned long iflags;
9889 spin_lock_irqsave(&phba->hbalock, iflags);
9890 __lpfc_sli4_cq_event_release(phba, cq_event);
9891 spin_unlock_irqrestore(&phba->hbalock, iflags);
9892}
9893
9894/**
9895 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
9896 * @phba: pointer to lpfc hba data structure.
9897 *
9898 * This routine is to free all the pending completion-queue events to the
9899 * back into the free pool for device reset.
9900 **/
9901static void
9902lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
9903{
9904 LIST_HEAD(cqelist);
9905 struct lpfc_cq_event *cqe;
9906 unsigned long iflags;
9907
9908 /* Retrieve all the pending WCQEs from pending WCQE lists */
9909 spin_lock_irqsave(&phba->hbalock, iflags);
9910 /* Pending FCP XRI abort events */
9911 list_splice_init(&phba->sli4_hba.sp_fcp_xri_aborted_work_queue,
9912 &cqelist);
9913 /* Pending ELS XRI abort events */
9914 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
9915 &cqelist);
9916 /* Pending asynnc events */
9917 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
9918 &cqelist);
9919 spin_unlock_irqrestore(&phba->hbalock, iflags);
9920
9921 while (!list_empty(&cqelist)) {
9922 list_remove_head(&cqelist, cqe, struct lpfc_cq_event, list);
9923 lpfc_sli4_cq_event_release(phba, cqe);
9924 }
9925}
9926
9927/**
9928 * lpfc_pci_function_reset - Reset pci function.
9929 * @phba: pointer to lpfc hba data structure.
9930 *
9931 * This routine is invoked to request a PCI function reset. It will destroys
9932 * all resources assigned to the PCI function which originates this request.
9933 *
9934 * Return codes
9935 * 0 - successful
9936 * -ENOMEM - No available memory
9937 * -EIO - The mailbox failed to complete successfully.
9938 **/
9939int
9940lpfc_pci_function_reset(struct lpfc_hba *phba)
9941{
9942 LPFC_MBOXQ_t *mboxq;
9943 uint32_t rc = 0, if_type;
9944 uint32_t shdr_status, shdr_add_status;
9945 uint32_t rdy_chk;
9946 uint32_t port_reset = 0;
9947 union lpfc_sli4_cfg_shdr *shdr;
9948 struct lpfc_register reg_data;
9949 uint16_t devid;
9950
9951 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
9952 switch (if_type) {
9953 case LPFC_SLI_INTF_IF_TYPE_0:
9954 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
9955 GFP_KERNEL);
9956 if (!mboxq) {
9957 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9958 "0494 Unable to allocate memory for "
9959 "issuing SLI_FUNCTION_RESET mailbox "
9960 "command\n");
9961 return -ENOMEM;
9962 }
9963
9964 /* Setup PCI function reset mailbox-ioctl command */
9965 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
9966 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
9967 LPFC_SLI4_MBX_EMBED);
9968 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
9969 shdr = (union lpfc_sli4_cfg_shdr *)
9970 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
9971 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
9972 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
9973 &shdr->response);
Olivier Deprez0e641232021-09-23 10:07:05 +02009974 mempool_free(mboxq, phba->mbox_mem_pool);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00009975 if (shdr_status || shdr_add_status || rc) {
9976 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
9977 "0495 SLI_FUNCTION_RESET mailbox "
9978 "failed with status x%x add_status x%x,"
9979 " mbx status x%x\n",
9980 shdr_status, shdr_add_status, rc);
9981 rc = -ENXIO;
9982 }
9983 break;
9984 case LPFC_SLI_INTF_IF_TYPE_2:
9985 case LPFC_SLI_INTF_IF_TYPE_6:
9986wait:
9987 /*
9988 * Poll the Port Status Register and wait for RDY for
9989 * up to 30 seconds. If the port doesn't respond, treat
9990 * it as an error.
9991 */
9992 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
9993 if (lpfc_readl(phba->sli4_hba.u.if_type2.
9994 STATUSregaddr, &reg_data.word0)) {
9995 rc = -ENODEV;
9996 goto out;
9997 }
9998 if (bf_get(lpfc_sliport_status_rdy, &reg_data))
9999 break;
10000 msleep(20);
10001 }
10002
10003 if (!bf_get(lpfc_sliport_status_rdy, &reg_data)) {
10004 phba->work_status[0] = readl(
10005 phba->sli4_hba.u.if_type2.ERR1regaddr);
10006 phba->work_status[1] = readl(
10007 phba->sli4_hba.u.if_type2.ERR2regaddr);
10008 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10009 "2890 Port not ready, port status reg "
10010 "0x%x error 1=0x%x, error 2=0x%x\n",
10011 reg_data.word0,
10012 phba->work_status[0],
10013 phba->work_status[1]);
10014 rc = -ENODEV;
10015 goto out;
10016 }
10017
10018 if (!port_reset) {
10019 /*
10020 * Reset the port now
10021 */
10022 reg_data.word0 = 0;
10023 bf_set(lpfc_sliport_ctrl_end, &reg_data,
10024 LPFC_SLIPORT_LITTLE_ENDIAN);
10025 bf_set(lpfc_sliport_ctrl_ip, &reg_data,
10026 LPFC_SLIPORT_INIT_PORT);
10027 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
10028 CTRLregaddr);
10029 /* flush */
10030 pci_read_config_word(phba->pcidev,
10031 PCI_DEVICE_ID, &devid);
10032
10033 port_reset = 1;
10034 msleep(20);
10035 goto wait;
10036 } else if (bf_get(lpfc_sliport_status_rn, &reg_data)) {
10037 rc = -ENODEV;
10038 goto out;
10039 }
10040 break;
10041
10042 case LPFC_SLI_INTF_IF_TYPE_1:
10043 default:
10044 break;
10045 }
10046
10047out:
10048 /* Catch the not-ready port failure after a port reset. */
10049 if (rc) {
10050 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10051 "3317 HBA not functional: IP Reset Failed "
10052 "try: echo fw_reset > board_mode\n");
10053 rc = -ENODEV;
10054 }
10055
10056 return rc;
10057}
10058
10059/**
10060 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
10061 * @phba: pointer to lpfc hba data structure.
10062 *
10063 * This routine is invoked to set up the PCI device memory space for device
10064 * with SLI-4 interface spec.
10065 *
10066 * Return codes
10067 * 0 - successful
10068 * other values - error
10069 **/
10070static int
10071lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
10072{
David Brazdil0f672f62019-12-10 10:32:29 +000010073 struct pci_dev *pdev = phba->pcidev;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010074 unsigned long bar0map_len, bar1map_len, bar2map_len;
David Brazdil0f672f62019-12-10 10:32:29 +000010075 int error;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010076 uint32_t if_type;
10077
David Brazdil0f672f62019-12-10 10:32:29 +000010078 if (!pdev)
10079 return -ENODEV;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010080
10081 /* Set the device DMA mask size */
David Brazdil0f672f62019-12-10 10:32:29 +000010082 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10083 if (error)
10084 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10085 if (error)
10086 return error;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010087
10088 /*
10089 * The BARs and register set definitions and offset locations are
10090 * dependent on the if_type.
10091 */
10092 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
10093 &phba->sli4_hba.sli_intf.word0)) {
David Brazdil0f672f62019-12-10 10:32:29 +000010094 return -ENODEV;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010095 }
10096
10097 /* There is no SLI3 failback for SLI4 devices. */
10098 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
10099 LPFC_SLI_INTF_VALID) {
10100 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10101 "2894 SLI_INTF reg contents invalid "
10102 "sli_intf reg 0x%x\n",
10103 phba->sli4_hba.sli_intf.word0);
David Brazdil0f672f62019-12-10 10:32:29 +000010104 return -ENODEV;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010105 }
10106
10107 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10108 /*
10109 * Get the bus address of SLI4 device Bar regions and the
10110 * number of bytes required by each mapping. The mapping of the
10111 * particular PCI BARs regions is dependent on the type of
10112 * SLI4 device.
10113 */
10114 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
10115 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
10116 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
10117
10118 /*
10119 * Map SLI4 PCI Config Space Register base to a kernel virtual
10120 * addr
10121 */
10122 phba->sli4_hba.conf_regs_memmap_p =
10123 ioremap(phba->pci_bar0_map, bar0map_len);
10124 if (!phba->sli4_hba.conf_regs_memmap_p) {
10125 dev_printk(KERN_ERR, &pdev->dev,
10126 "ioremap failed for SLI4 PCI config "
10127 "registers.\n");
David Brazdil0f672f62019-12-10 10:32:29 +000010128 return -ENODEV;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010129 }
10130 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
10131 /* Set up BAR0 PCI config space register memory map */
10132 lpfc_sli4_bar0_register_memmap(phba, if_type);
10133 } else {
10134 phba->pci_bar0_map = pci_resource_start(pdev, 1);
10135 bar0map_len = pci_resource_len(pdev, 1);
10136 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
10137 dev_printk(KERN_ERR, &pdev->dev,
10138 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
David Brazdil0f672f62019-12-10 10:32:29 +000010139 return -ENODEV;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010140 }
10141 phba->sli4_hba.conf_regs_memmap_p =
10142 ioremap(phba->pci_bar0_map, bar0map_len);
10143 if (!phba->sli4_hba.conf_regs_memmap_p) {
10144 dev_printk(KERN_ERR, &pdev->dev,
10145 "ioremap failed for SLI4 PCI config "
10146 "registers.\n");
David Brazdil0f672f62019-12-10 10:32:29 +000010147 return -ENODEV;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010148 }
10149 lpfc_sli4_bar0_register_memmap(phba, if_type);
10150 }
10151
10152 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
10153 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
10154 /*
10155 * Map SLI4 if type 0 HBA Control Register base to a
10156 * kernel virtual address and setup the registers.
10157 */
10158 phba->pci_bar1_map = pci_resource_start(pdev,
10159 PCI_64BIT_BAR2);
10160 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
10161 phba->sli4_hba.ctrl_regs_memmap_p =
10162 ioremap(phba->pci_bar1_map,
10163 bar1map_len);
10164 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
10165 dev_err(&pdev->dev,
10166 "ioremap failed for SLI4 HBA "
10167 "control registers.\n");
10168 error = -ENOMEM;
10169 goto out_iounmap_conf;
10170 }
10171 phba->pci_bar2_memmap_p =
10172 phba->sli4_hba.ctrl_regs_memmap_p;
10173 lpfc_sli4_bar1_register_memmap(phba, if_type);
10174 } else {
10175 error = -ENOMEM;
10176 goto out_iounmap_conf;
10177 }
10178 }
10179
10180 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
10181 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
10182 /*
10183 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
10184 * virtual address and setup the registers.
10185 */
10186 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
10187 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
10188 phba->sli4_hba.drbl_regs_memmap_p =
10189 ioremap(phba->pci_bar1_map, bar1map_len);
10190 if (!phba->sli4_hba.drbl_regs_memmap_p) {
10191 dev_err(&pdev->dev,
10192 "ioremap failed for SLI4 HBA doorbell registers.\n");
David Brazdil0f672f62019-12-10 10:32:29 +000010193 error = -ENOMEM;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010194 goto out_iounmap_conf;
10195 }
10196 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
10197 lpfc_sli4_bar1_register_memmap(phba, if_type);
10198 }
10199
10200 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
10201 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
10202 /*
10203 * Map SLI4 if type 0 HBA Doorbell Register base to
10204 * a kernel virtual address and setup the registers.
10205 */
10206 phba->pci_bar2_map = pci_resource_start(pdev,
10207 PCI_64BIT_BAR4);
10208 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
10209 phba->sli4_hba.drbl_regs_memmap_p =
10210 ioremap(phba->pci_bar2_map,
10211 bar2map_len);
10212 if (!phba->sli4_hba.drbl_regs_memmap_p) {
10213 dev_err(&pdev->dev,
10214 "ioremap failed for SLI4 HBA"
10215 " doorbell registers.\n");
10216 error = -ENOMEM;
10217 goto out_iounmap_ctrl;
10218 }
10219 phba->pci_bar4_memmap_p =
10220 phba->sli4_hba.drbl_regs_memmap_p;
10221 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
10222 if (error)
10223 goto out_iounmap_all;
10224 } else {
10225 error = -ENOMEM;
10226 goto out_iounmap_all;
10227 }
10228 }
10229
10230 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
10231 pci_resource_start(pdev, PCI_64BIT_BAR4)) {
10232 /*
10233 * Map SLI4 if type 6 HBA DPP Register base to a kernel
10234 * virtual address and setup the registers.
10235 */
10236 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
10237 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
10238 phba->sli4_hba.dpp_regs_memmap_p =
10239 ioremap(phba->pci_bar2_map, bar2map_len);
10240 if (!phba->sli4_hba.dpp_regs_memmap_p) {
10241 dev_err(&pdev->dev,
10242 "ioremap failed for SLI4 HBA dpp registers.\n");
David Brazdil0f672f62019-12-10 10:32:29 +000010243 error = -ENOMEM;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010244 goto out_iounmap_ctrl;
10245 }
10246 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
10247 }
10248
10249 /* Set up the EQ/CQ register handeling functions now */
10250 switch (if_type) {
10251 case LPFC_SLI_INTF_IF_TYPE_0:
10252 case LPFC_SLI_INTF_IF_TYPE_2:
10253 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
David Brazdil0f672f62019-12-10 10:32:29 +000010254 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
10255 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010256 break;
10257 case LPFC_SLI_INTF_IF_TYPE_6:
10258 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
David Brazdil0f672f62019-12-10 10:32:29 +000010259 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
10260 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010261 break;
10262 default:
10263 break;
10264 }
10265
10266 return 0;
10267
10268out_iounmap_all:
10269 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10270out_iounmap_ctrl:
10271 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
10272out_iounmap_conf:
10273 iounmap(phba->sli4_hba.conf_regs_memmap_p);
David Brazdil0f672f62019-12-10 10:32:29 +000010274
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010275 return error;
10276}
10277
10278/**
10279 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
10280 * @phba: pointer to lpfc hba data structure.
10281 *
10282 * This routine is invoked to unset the PCI device memory space for device
10283 * with SLI-4 interface spec.
10284 **/
10285static void
10286lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
10287{
10288 uint32_t if_type;
10289 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10290
10291 switch (if_type) {
10292 case LPFC_SLI_INTF_IF_TYPE_0:
10293 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10294 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
10295 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10296 break;
10297 case LPFC_SLI_INTF_IF_TYPE_2:
10298 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10299 break;
10300 case LPFC_SLI_INTF_IF_TYPE_6:
10301 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10302 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10303 break;
10304 case LPFC_SLI_INTF_IF_TYPE_1:
10305 default:
10306 dev_printk(KERN_ERR, &phba->pcidev->dev,
10307 "FATAL - unsupported SLI4 interface type - %d\n",
10308 if_type);
10309 break;
10310 }
10311}
10312
10313/**
10314 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
10315 * @phba: pointer to lpfc hba data structure.
10316 *
10317 * This routine is invoked to enable the MSI-X interrupt vectors to device
10318 * with SLI-3 interface specs.
10319 *
10320 * Return codes
10321 * 0 - successful
10322 * other values - error
10323 **/
10324static int
10325lpfc_sli_enable_msix(struct lpfc_hba *phba)
10326{
10327 int rc;
10328 LPFC_MBOXQ_t *pmb;
10329
10330 /* Set up MSI-X multi-message vectors */
10331 rc = pci_alloc_irq_vectors(phba->pcidev,
10332 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
10333 if (rc < 0) {
10334 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10335 "0420 PCI enable MSI-X failed (%d)\n", rc);
10336 goto vec_fail_out;
10337 }
10338
10339 /*
10340 * Assign MSI-X vectors to interrupt handlers
10341 */
10342
10343 /* vector-0 is associated to slow-path handler */
10344 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
10345 &lpfc_sli_sp_intr_handler, 0,
10346 LPFC_SP_DRIVER_HANDLER_NAME, phba);
10347 if (rc) {
10348 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10349 "0421 MSI-X slow-path request_irq failed "
10350 "(%d)\n", rc);
10351 goto msi_fail_out;
10352 }
10353
10354 /* vector-1 is associated to fast-path handler */
10355 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
10356 &lpfc_sli_fp_intr_handler, 0,
10357 LPFC_FP_DRIVER_HANDLER_NAME, phba);
10358
10359 if (rc) {
10360 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10361 "0429 MSI-X fast-path request_irq failed "
10362 "(%d)\n", rc);
10363 goto irq_fail_out;
10364 }
10365
10366 /*
10367 * Configure HBA MSI-X attention conditions to messages
10368 */
10369 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
10370
10371 if (!pmb) {
10372 rc = -ENOMEM;
10373 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10374 "0474 Unable to allocate memory for issuing "
10375 "MBOX_CONFIG_MSI command\n");
10376 goto mem_fail_out;
10377 }
10378 rc = lpfc_config_msi(phba, pmb);
10379 if (rc)
10380 goto mbx_fail_out;
10381 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
10382 if (rc != MBX_SUCCESS) {
10383 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
10384 "0351 Config MSI mailbox command failed, "
10385 "mbxCmd x%x, mbxStatus x%x\n",
10386 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
10387 goto mbx_fail_out;
10388 }
10389
10390 /* Free memory allocated for mailbox command */
10391 mempool_free(pmb, phba->mbox_mem_pool);
10392 return rc;
10393
10394mbx_fail_out:
10395 /* Free memory allocated for mailbox command */
10396 mempool_free(pmb, phba->mbox_mem_pool);
10397
10398mem_fail_out:
10399 /* free the irq already requested */
10400 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
10401
10402irq_fail_out:
10403 /* free the irq already requested */
10404 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
10405
10406msi_fail_out:
10407 /* Unconfigure MSI-X capability structure */
10408 pci_free_irq_vectors(phba->pcidev);
10409
10410vec_fail_out:
10411 return rc;
10412}
10413
10414/**
10415 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
10416 * @phba: pointer to lpfc hba data structure.
10417 *
10418 * This routine is invoked to enable the MSI interrupt mode to device with
10419 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
10420 * enable the MSI vector. The device driver is responsible for calling the
10421 * request_irq() to register MSI vector with a interrupt the handler, which
10422 * is done in this function.
10423 *
10424 * Return codes
10425 * 0 - successful
10426 * other values - error
10427 */
10428static int
10429lpfc_sli_enable_msi(struct lpfc_hba *phba)
10430{
10431 int rc;
10432
10433 rc = pci_enable_msi(phba->pcidev);
10434 if (!rc)
10435 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10436 "0462 PCI enable MSI mode success.\n");
10437 else {
10438 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10439 "0471 PCI enable MSI mode failed (%d)\n", rc);
10440 return rc;
10441 }
10442
10443 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
10444 0, LPFC_DRIVER_NAME, phba);
10445 if (rc) {
10446 pci_disable_msi(phba->pcidev);
10447 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10448 "0478 MSI request_irq failed (%d)\n", rc);
10449 }
10450 return rc;
10451}
10452
10453/**
10454 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
10455 * @phba: pointer to lpfc hba data structure.
10456 *
10457 * This routine is invoked to enable device interrupt and associate driver's
10458 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
10459 * spec. Depends on the interrupt mode configured to the driver, the driver
10460 * will try to fallback from the configured interrupt mode to an interrupt
10461 * mode which is supported by the platform, kernel, and device in the order
10462 * of:
10463 * MSI-X -> MSI -> IRQ.
10464 *
10465 * Return codes
10466 * 0 - successful
10467 * other values - error
10468 **/
10469static uint32_t
10470lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
10471{
10472 uint32_t intr_mode = LPFC_INTR_ERROR;
10473 int retval;
10474
10475 if (cfg_mode == 2) {
10476 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
10477 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
10478 if (!retval) {
10479 /* Now, try to enable MSI-X interrupt mode */
10480 retval = lpfc_sli_enable_msix(phba);
10481 if (!retval) {
10482 /* Indicate initialization to MSI-X mode */
10483 phba->intr_type = MSIX;
10484 intr_mode = 2;
10485 }
10486 }
10487 }
10488
10489 /* Fallback to MSI if MSI-X initialization failed */
10490 if (cfg_mode >= 1 && phba->intr_type == NONE) {
10491 retval = lpfc_sli_enable_msi(phba);
10492 if (!retval) {
10493 /* Indicate initialization to MSI mode */
10494 phba->intr_type = MSI;
10495 intr_mode = 1;
10496 }
10497 }
10498
10499 /* Fallback to INTx if both MSI-X/MSI initalization failed */
10500 if (phba->intr_type == NONE) {
10501 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
10502 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
10503 if (!retval) {
10504 /* Indicate initialization to INTx mode */
10505 phba->intr_type = INTx;
10506 intr_mode = 0;
10507 }
10508 }
10509 return intr_mode;
10510}
10511
10512/**
10513 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
10514 * @phba: pointer to lpfc hba data structure.
10515 *
10516 * This routine is invoked to disable device interrupt and disassociate the
10517 * driver's interrupt handler(s) from interrupt vector(s) to device with
10518 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
10519 * release the interrupt vector(s) for the message signaled interrupt.
10520 **/
10521static void
10522lpfc_sli_disable_intr(struct lpfc_hba *phba)
10523{
10524 int nr_irqs, i;
10525
10526 if (phba->intr_type == MSIX)
10527 nr_irqs = LPFC_MSIX_VECTORS;
10528 else
10529 nr_irqs = 1;
10530
10531 for (i = 0; i < nr_irqs; i++)
10532 free_irq(pci_irq_vector(phba->pcidev, i), phba);
10533 pci_free_irq_vectors(phba->pcidev);
10534
10535 /* Reset interrupt management states */
10536 phba->intr_type = NONE;
10537 phba->sli.slistat.sli_intr = 0;
10538}
10539
10540/**
David Brazdil0f672f62019-12-10 10:32:29 +000010541 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue
10542 * @phba: pointer to lpfc hba data structure.
10543 * @id: EQ vector index or Hardware Queue index
10544 * @match: LPFC_FIND_BY_EQ = match by EQ
10545 * LPFC_FIND_BY_HDWQ = match by Hardware Queue
10546 * Return the CPU that matches the selection criteria
10547 */
10548static uint16_t
10549lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
10550{
10551 struct lpfc_vector_map_info *cpup;
10552 int cpu;
10553
10554 /* Loop through all CPUs */
10555 for_each_present_cpu(cpu) {
10556 cpup = &phba->sli4_hba.cpu_map[cpu];
10557
10558 /* If we are matching by EQ, there may be multiple CPUs using
10559 * using the same vector, so select the one with
10560 * LPFC_CPU_FIRST_IRQ set.
10561 */
10562 if ((match == LPFC_FIND_BY_EQ) &&
10563 (cpup->flag & LPFC_CPU_FIRST_IRQ) &&
10564 (cpup->irq != LPFC_VECTOR_MAP_EMPTY) &&
10565 (cpup->eq == id))
10566 return cpu;
10567
10568 /* If matching by HDWQ, select the first CPU that matches */
10569 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
10570 return cpu;
10571 }
10572 return 0;
10573}
10574
10575#ifdef CONFIG_X86
10576/**
10577 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
10578 * @phba: pointer to lpfc hba data structure.
10579 * @cpu: CPU map index
10580 * @phys_id: CPU package physical id
10581 * @core_id: CPU core id
10582 */
10583static int
10584lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
10585 uint16_t phys_id, uint16_t core_id)
10586{
10587 struct lpfc_vector_map_info *cpup;
10588 int idx;
10589
10590 for_each_present_cpu(idx) {
10591 cpup = &phba->sli4_hba.cpu_map[idx];
10592 /* Does the cpup match the one we are looking for */
10593 if ((cpup->phys_id == phys_id) &&
10594 (cpup->core_id == core_id) &&
10595 (cpu != idx))
10596 return 1;
10597 }
10598 return 0;
10599}
10600#endif
10601
10602/**
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010603 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
10604 * @phba: pointer to lpfc hba data structure.
10605 * @vectors: number of msix vectors allocated.
10606 *
10607 * The routine will figure out the CPU affinity assignment for every
David Brazdil0f672f62019-12-10 10:32:29 +000010608 * MSI-X vector allocated for the HBA.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010609 * In addition, the CPU to IO channel mapping will be calculated
10610 * and the phba->sli4_hba.cpu_map array will reflect this.
10611 */
10612static void
10613lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
10614{
David Brazdil0f672f62019-12-10 10:32:29 +000010615 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu;
10616 int max_phys_id, min_phys_id;
10617 int max_core_id, min_core_id;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010618 struct lpfc_vector_map_info *cpup;
David Brazdil0f672f62019-12-10 10:32:29 +000010619 struct lpfc_vector_map_info *new_cpup;
10620 const struct cpumask *maskp;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010621#ifdef CONFIG_X86
10622 struct cpuinfo_x86 *cpuinfo;
10623#endif
10624
10625 /* Init cpu_map array */
David Brazdil0f672f62019-12-10 10:32:29 +000010626 for_each_possible_cpu(cpu) {
10627 cpup = &phba->sli4_hba.cpu_map[cpu];
10628 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY;
10629 cpup->core_id = LPFC_VECTOR_MAP_EMPTY;
10630 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY;
10631 cpup->eq = LPFC_VECTOR_MAP_EMPTY;
10632 cpup->irq = LPFC_VECTOR_MAP_EMPTY;
10633 cpup->flag = 0;
10634 }
10635
10636 max_phys_id = 0;
10637 min_phys_id = LPFC_VECTOR_MAP_EMPTY;
10638 max_core_id = 0;
10639 min_core_id = LPFC_VECTOR_MAP_EMPTY;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010640
10641 /* Update CPU map with physical id and core id of each CPU */
David Brazdil0f672f62019-12-10 10:32:29 +000010642 for_each_present_cpu(cpu) {
10643 cpup = &phba->sli4_hba.cpu_map[cpu];
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010644#ifdef CONFIG_X86
10645 cpuinfo = &cpu_data(cpu);
10646 cpup->phys_id = cpuinfo->phys_proc_id;
10647 cpup->core_id = cpuinfo->cpu_core_id;
David Brazdil0f672f62019-12-10 10:32:29 +000010648 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id))
10649 cpup->flag |= LPFC_CPU_MAP_HYPER;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010650#else
10651 /* No distinction between CPUs for other platforms */
10652 cpup->phys_id = 0;
David Brazdil0f672f62019-12-10 10:32:29 +000010653 cpup->core_id = cpu;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010654#endif
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010655
David Brazdil0f672f62019-12-10 10:32:29 +000010656 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10657 "3328 CPU %d physid %d coreid %d flag x%x\n",
10658 cpu, cpup->phys_id, cpup->core_id, cpup->flag);
10659
10660 if (cpup->phys_id > max_phys_id)
10661 max_phys_id = cpup->phys_id;
10662 if (cpup->phys_id < min_phys_id)
10663 min_phys_id = cpup->phys_id;
10664
10665 if (cpup->core_id > max_core_id)
10666 max_core_id = cpup->core_id;
10667 if (cpup->core_id < min_core_id)
10668 min_core_id = cpup->core_id;
10669 }
10670
10671 for_each_possible_cpu(i) {
10672 struct lpfc_eq_intr_info *eqi =
10673 per_cpu_ptr(phba->sli4_hba.eq_info, i);
10674
10675 INIT_LIST_HEAD(&eqi->list);
10676 eqi->icnt = 0;
10677 }
10678
10679 /* This loop sets up all CPUs that are affinitized with a
10680 * irq vector assigned to the driver. All affinitized CPUs
10681 * will get a link to that vectors IRQ and EQ.
10682 *
10683 * NULL affinity mask handling:
10684 * If irq count is greater than one, log an error message.
10685 * If the null mask is received for the first irq, find the
10686 * first present cpu, and assign the eq index to ensure at
10687 * least one EQ is assigned.
10688 */
10689 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10690 /* Get a CPU mask for all CPUs affinitized to this vector */
10691 maskp = pci_irq_get_affinity(phba->pcidev, idx);
10692 if (!maskp) {
10693 if (phba->cfg_irq_chann > 1)
10694 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10695 "3329 No affinity mask found "
10696 "for vector %d (%d)\n",
10697 idx, phba->cfg_irq_chann);
10698 if (!idx) {
10699 cpu = cpumask_first(cpu_present_mask);
10700 cpup = &phba->sli4_hba.cpu_map[cpu];
10701 cpup->eq = idx;
10702 cpup->irq = pci_irq_vector(phba->pcidev, idx);
10703 cpup->flag |= LPFC_CPU_FIRST_IRQ;
10704 }
10705 break;
10706 }
10707
10708 i = 0;
10709 /* Loop through all CPUs associated with vector idx */
10710 for_each_cpu_and(cpu, maskp, cpu_present_mask) {
10711 /* Set the EQ index and IRQ for that vector */
10712 cpup = &phba->sli4_hba.cpu_map[cpu];
10713 cpup->eq = idx;
10714 cpup->irq = pci_irq_vector(phba->pcidev, idx);
10715
10716 /* If this is the first CPU thats assigned to this
10717 * vector, set LPFC_CPU_FIRST_IRQ.
10718 */
10719 if (!i)
10720 cpup->flag |= LPFC_CPU_FIRST_IRQ;
10721 i++;
10722
10723 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10724 "3336 Set Affinity: CPU %d "
10725 "irq %d eq %d flag x%x\n",
10726 cpu, cpup->irq, cpup->eq, cpup->flag);
10727 }
10728 }
10729
10730 /* After looking at each irq vector assigned to this pcidev, its
10731 * possible to see that not ALL CPUs have been accounted for.
10732 * Next we will set any unassigned (unaffinitized) cpu map
10733 * entries to a IRQ on the same phys_id.
10734 */
10735 first_cpu = cpumask_first(cpu_present_mask);
10736 start_cpu = first_cpu;
10737
10738 for_each_present_cpu(cpu) {
10739 cpup = &phba->sli4_hba.cpu_map[cpu];
10740
10741 /* Is this CPU entry unassigned */
10742 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
10743 /* Mark CPU as IRQ not assigned by the kernel */
10744 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
10745
10746 /* If so, find a new_cpup thats on the the SAME
10747 * phys_id as cpup. start_cpu will start where we
10748 * left off so all unassigned entries don't get assgined
10749 * the IRQ of the first entry.
10750 */
10751 new_cpu = start_cpu;
10752 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
10753 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
10754 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
10755 (new_cpup->irq != LPFC_VECTOR_MAP_EMPTY) &&
10756 (new_cpup->phys_id == cpup->phys_id))
10757 goto found_same;
10758 new_cpu = cpumask_next(
10759 new_cpu, cpu_present_mask);
10760 if (new_cpu == nr_cpumask_bits)
10761 new_cpu = first_cpu;
10762 }
10763 /* At this point, we leave the CPU as unassigned */
10764 continue;
10765found_same:
10766 /* We found a matching phys_id, so copy the IRQ info */
10767 cpup->eq = new_cpup->eq;
10768 cpup->irq = new_cpup->irq;
10769
10770 /* Bump start_cpu to the next slot to minmize the
10771 * chance of having multiple unassigned CPU entries
10772 * selecting the same IRQ.
10773 */
10774 start_cpu = cpumask_next(new_cpu, cpu_present_mask);
10775 if (start_cpu == nr_cpumask_bits)
10776 start_cpu = first_cpu;
10777
10778 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10779 "3337 Set Affinity: CPU %d "
10780 "irq %d from id %d same "
10781 "phys_id (%d)\n",
10782 cpu, cpup->irq, new_cpu, cpup->phys_id);
10783 }
10784 }
10785
10786 /* Set any unassigned cpu map entries to a IRQ on any phys_id */
10787 start_cpu = first_cpu;
10788
10789 for_each_present_cpu(cpu) {
10790 cpup = &phba->sli4_hba.cpu_map[cpu];
10791
10792 /* Is this entry unassigned */
10793 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
10794 /* Mark it as IRQ not assigned by the kernel */
10795 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
10796
10797 /* If so, find a new_cpup thats on ANY phys_id
10798 * as the cpup. start_cpu will start where we
10799 * left off so all unassigned entries don't get
10800 * assigned the IRQ of the first entry.
10801 */
10802 new_cpu = start_cpu;
10803 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
10804 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
10805 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
10806 (new_cpup->irq != LPFC_VECTOR_MAP_EMPTY))
10807 goto found_any;
10808 new_cpu = cpumask_next(
10809 new_cpu, cpu_present_mask);
10810 if (new_cpu == nr_cpumask_bits)
10811 new_cpu = first_cpu;
10812 }
10813 /* We should never leave an entry unassigned */
10814 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10815 "3339 Set Affinity: CPU %d "
10816 "irq %d UNASSIGNED\n",
10817 cpup->hdwq, cpup->irq);
10818 continue;
10819found_any:
10820 /* We found an available entry, copy the IRQ info */
10821 cpup->eq = new_cpup->eq;
10822 cpup->irq = new_cpup->irq;
10823
10824 /* Bump start_cpu to the next slot to minmize the
10825 * chance of having multiple unassigned CPU entries
10826 * selecting the same IRQ.
10827 */
10828 start_cpu = cpumask_next(new_cpu, cpu_present_mask);
10829 if (start_cpu == nr_cpumask_bits)
10830 start_cpu = first_cpu;
10831
10832 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10833 "3338 Set Affinity: CPU %d "
10834 "irq %d from id %d (%d/%d)\n",
10835 cpu, cpup->irq, new_cpu,
10836 new_cpup->phys_id, new_cpup->core_id);
10837 }
10838 }
10839
10840 /* Assign hdwq indices that are unique across all cpus in the map
10841 * that are also FIRST_CPUs.
10842 */
10843 idx = 0;
10844 for_each_present_cpu(cpu) {
10845 cpup = &phba->sli4_hba.cpu_map[cpu];
10846
10847 /* Only FIRST IRQs get a hdwq index assignment. */
10848 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
10849 continue;
10850
10851 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */
10852 cpup->hdwq = idx;
10853 idx++;
10854 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10855 "3333 Set Affinity: CPU %d (phys %d core %d): "
10856 "hdwq %d eq %d irq %d flg x%x\n",
10857 cpu, cpup->phys_id, cpup->core_id,
10858 cpup->hdwq, cpup->eq, cpup->irq, cpup->flag);
10859 }
10860 /* Finally we need to associate a hdwq with each cpu_map entry
10861 * This will be 1 to 1 - hdwq to cpu, unless there are less
10862 * hardware queues then CPUs. For that case we will just round-robin
10863 * the available hardware queues as they get assigned to CPUs.
10864 * The next_idx is the idx from the FIRST_CPU loop above to account
10865 * for irq_chann < hdwq. The idx is used for round-robin assignments
10866 * and needs to start at 0.
10867 */
10868 next_idx = idx;
10869 start_cpu = 0;
10870 idx = 0;
10871 for_each_present_cpu(cpu) {
10872 cpup = &phba->sli4_hba.cpu_map[cpu];
10873
10874 /* FIRST cpus are already mapped. */
10875 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
10876 continue;
10877
10878 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq
10879 * of the unassigned cpus to the next idx so that all
10880 * hdw queues are fully utilized.
10881 */
10882 if (next_idx < phba->cfg_hdw_queue) {
10883 cpup->hdwq = next_idx;
10884 next_idx++;
10885 continue;
10886 }
10887
10888 /* Not a First CPU and all hdw_queues are used. Reuse a
10889 * Hardware Queue for another CPU, so be smart about it
10890 * and pick one that has its IRQ/EQ mapped to the same phys_id
10891 * (CPU package) and core_id.
10892 */
10893 new_cpu = start_cpu;
10894 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
10895 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
10896 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
10897 new_cpup->phys_id == cpup->phys_id &&
10898 new_cpup->core_id == cpup->core_id) {
10899 goto found_hdwq;
10900 }
10901 new_cpu = cpumask_next(new_cpu, cpu_present_mask);
10902 if (new_cpu == nr_cpumask_bits)
10903 new_cpu = first_cpu;
10904 }
10905
10906 /* If we can't match both phys_id and core_id,
10907 * settle for just a phys_id match.
10908 */
10909 new_cpu = start_cpu;
10910 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
10911 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
10912 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
10913 new_cpup->phys_id == cpup->phys_id)
10914 goto found_hdwq;
10915
10916 new_cpu = cpumask_next(new_cpu, cpu_present_mask);
10917 if (new_cpu == nr_cpumask_bits)
10918 new_cpu = first_cpu;
10919 }
10920
10921 /* Otherwise just round robin on cfg_hdw_queue */
10922 cpup->hdwq = idx % phba->cfg_hdw_queue;
10923 idx++;
10924 goto logit;
10925 found_hdwq:
10926 /* We found an available entry, copy the IRQ info */
10927 start_cpu = cpumask_next(new_cpu, cpu_present_mask);
10928 if (start_cpu == nr_cpumask_bits)
10929 start_cpu = first_cpu;
10930 cpup->hdwq = new_cpup->hdwq;
10931 logit:
10932 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10933 "3335 Set Affinity: CPU %d (phys %d core %d): "
10934 "hdwq %d eq %d irq %d flg x%x\n",
10935 cpu, cpup->phys_id, cpup->core_id,
10936 cpup->hdwq, cpup->eq, cpup->irq, cpup->flag);
10937 }
10938
10939 /* The cpu_map array will be used later during initialization
10940 * when EQ / CQ / WQs are allocated and configured.
10941 */
10942 return;
10943}
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010944
10945/**
Olivier Deprez0e641232021-09-23 10:07:05 +020010946 * lpfc_cpuhp_get_eq
10947 *
10948 * @phba: pointer to lpfc hba data structure.
10949 * @cpu: cpu going offline
10950 * @eqlist:
10951 */
10952static void
10953lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu,
10954 struct list_head *eqlist)
10955{
10956 struct lpfc_vector_map_info *map;
10957 const struct cpumask *maskp;
10958 struct lpfc_queue *eq;
10959 unsigned int i;
10960 cpumask_t tmp;
10961 u16 idx;
10962
10963 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10964 maskp = pci_irq_get_affinity(phba->pcidev, idx);
10965 if (!maskp)
10966 continue;
10967 /*
10968 * if irq is not affinitized to the cpu going
10969 * then we don't need to poll the eq attached
10970 * to it.
10971 */
10972 if (!cpumask_and(&tmp, maskp, cpumask_of(cpu)))
10973 continue;
10974 /* get the cpus that are online and are affini-
10975 * tized to this irq vector. If the count is
10976 * more than 1 then cpuhp is not going to shut-
10977 * down this vector. Since this cpu has not
10978 * gone offline yet, we need >1.
10979 */
10980 cpumask_and(&tmp, maskp, cpu_online_mask);
10981 if (cpumask_weight(&tmp) > 1)
10982 continue;
10983
10984 /* Now that we have an irq to shutdown, get the eq
10985 * mapped to this irq. Note: multiple hdwq's in
10986 * the software can share an eq, but eventually
10987 * only eq will be mapped to this vector
10988 */
10989 for_each_possible_cpu(i) {
10990 map = &phba->sli4_hba.cpu_map[i];
10991 if (!(map->irq == pci_irq_vector(phba->pcidev, idx)))
10992 continue;
10993 eq = phba->sli4_hba.hdwq[map->hdwq].hba_eq;
10994 list_add(&eq->_poll_list, eqlist);
10995 /* 1 is good enough. others will be a copy of this */
10996 break;
10997 }
10998 }
10999}
11000
11001static void __lpfc_cpuhp_remove(struct lpfc_hba *phba)
11002{
11003 if (phba->sli_rev != LPFC_SLI_REV4)
11004 return;
11005
11006 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state,
11007 &phba->cpuhp);
11008 /*
11009 * unregistering the instance doesn't stop the polling
11010 * timer. Wait for the poll timer to retire.
11011 */
11012 synchronize_rcu();
11013 del_timer_sync(&phba->cpuhp_poll_timer);
11014}
11015
11016static void lpfc_cpuhp_remove(struct lpfc_hba *phba)
11017{
11018 if (phba->pport->fc_flag & FC_OFFLINE_MODE)
11019 return;
11020
11021 __lpfc_cpuhp_remove(phba);
11022}
11023
11024static void lpfc_cpuhp_add(struct lpfc_hba *phba)
11025{
11026 if (phba->sli_rev != LPFC_SLI_REV4)
11027 return;
11028
11029 rcu_read_lock();
11030
11031 if (!list_empty(&phba->poll_list)) {
11032 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
11033 mod_timer(&phba->cpuhp_poll_timer,
11034 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
11035 }
11036
11037 rcu_read_unlock();
11038
11039 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state,
11040 &phba->cpuhp);
11041}
11042
11043static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval)
11044{
11045 if (phba->pport->load_flag & FC_UNLOADING) {
11046 *retval = -EAGAIN;
11047 return true;
11048 }
11049
11050 if (phba->sli_rev != LPFC_SLI_REV4) {
11051 *retval = 0;
11052 return true;
11053 }
11054
11055 /* proceed with the hotplug */
11056 return false;
11057}
11058
11059static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node)
11060{
11061 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
11062 struct lpfc_queue *eq, *next;
11063 LIST_HEAD(eqlist);
11064 int retval;
11065
11066 if (!phba) {
11067 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
11068 return 0;
11069 }
11070
11071 if (__lpfc_cpuhp_checks(phba, &retval))
11072 return retval;
11073
11074 lpfc_cpuhp_get_eq(phba, cpu, &eqlist);
11075
11076 /* start polling on these eq's */
11077 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) {
11078 list_del_init(&eq->_poll_list);
11079 lpfc_sli4_start_polling(eq);
11080 }
11081
11082 return 0;
11083}
11084
11085static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node)
11086{
11087 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
11088 struct lpfc_queue *eq, *next;
11089 unsigned int n;
11090 int retval;
11091
11092 if (!phba) {
11093 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
11094 return 0;
11095 }
11096
11097 if (__lpfc_cpuhp_checks(phba, &retval))
11098 return retval;
11099
11100 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) {
11101 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ);
11102 if (n == cpu)
11103 lpfc_sli4_stop_polling(eq);
11104 }
11105
11106 return 0;
11107}
11108
11109/**
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011110 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
11111 * @phba: pointer to lpfc hba data structure.
11112 *
11113 * This routine is invoked to enable the MSI-X interrupt vectors to device
11114 * with SLI-4 interface spec.
11115 *
11116 * Return codes
11117 * 0 - successful
11118 * other values - error
11119 **/
11120static int
11121lpfc_sli4_enable_msix(struct lpfc_hba *phba)
11122{
11123 int vectors, rc, index;
11124 char *name;
11125
11126 /* Set up MSI-X multi-message vectors */
David Brazdil0f672f62019-12-10 10:32:29 +000011127 vectors = phba->cfg_irq_chann;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011128
11129 rc = pci_alloc_irq_vectors(phba->pcidev,
David Brazdil0f672f62019-12-10 10:32:29 +000011130 1,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011131 vectors, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
11132 if (rc < 0) {
11133 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11134 "0484 PCI enable MSI-X failed (%d)\n", rc);
11135 goto vec_fail_out;
11136 }
11137 vectors = rc;
11138
11139 /* Assign MSI-X vectors to interrupt handlers */
11140 for (index = 0; index < vectors; index++) {
11141 name = phba->sli4_hba.hba_eq_hdl[index].handler_name;
11142 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
11143 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
11144 LPFC_DRIVER_HANDLER_NAME"%d", index);
11145
11146 phba->sli4_hba.hba_eq_hdl[index].idx = index;
11147 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
David Brazdil0f672f62019-12-10 10:32:29 +000011148 rc = request_irq(pci_irq_vector(phba->pcidev, index),
11149 &lpfc_sli4_hba_intr_handler, 0,
11150 name,
11151 &phba->sli4_hba.hba_eq_hdl[index]);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011152 if (rc) {
11153 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
11154 "0486 MSI-X fast-path (%d) "
11155 "request_irq failed (%d)\n", index, rc);
11156 goto cfg_fail_out;
11157 }
11158 }
11159
David Brazdil0f672f62019-12-10 10:32:29 +000011160 if (vectors != phba->cfg_irq_chann) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011161 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11162 "3238 Reducing IO channels to match number of "
11163 "MSI-X vectors, requested %d got %d\n",
David Brazdil0f672f62019-12-10 10:32:29 +000011164 phba->cfg_irq_chann, vectors);
11165 if (phba->cfg_irq_chann > vectors)
11166 phba->cfg_irq_chann = vectors;
11167 if (phba->nvmet_support && (phba->cfg_nvmet_mrq > vectors))
11168 phba->cfg_nvmet_mrq = vectors;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011169 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011170
11171 return rc;
11172
11173cfg_fail_out:
11174 /* free the irq already requested */
11175 for (--index; index >= 0; index--)
11176 free_irq(pci_irq_vector(phba->pcidev, index),
11177 &phba->sli4_hba.hba_eq_hdl[index]);
11178
11179 /* Unconfigure MSI-X capability structure */
11180 pci_free_irq_vectors(phba->pcidev);
11181
11182vec_fail_out:
11183 return rc;
11184}
11185
11186/**
11187 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
11188 * @phba: pointer to lpfc hba data structure.
11189 *
11190 * This routine is invoked to enable the MSI interrupt mode to device with
David Brazdil0f672f62019-12-10 10:32:29 +000011191 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is
11192 * called to enable the MSI vector. The device driver is responsible for
11193 * calling the request_irq() to register MSI vector with a interrupt the
11194 * handler, which is done in this function.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011195 *
11196 * Return codes
11197 * 0 - successful
11198 * other values - error
11199 **/
11200static int
11201lpfc_sli4_enable_msi(struct lpfc_hba *phba)
11202{
11203 int rc, index;
11204
David Brazdil0f672f62019-12-10 10:32:29 +000011205 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1,
11206 PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
11207 if (rc > 0)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011208 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11209 "0487 PCI enable MSI mode success.\n");
11210 else {
11211 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11212 "0488 PCI enable MSI mode failed (%d)\n", rc);
David Brazdil0f672f62019-12-10 10:32:29 +000011213 return rc ? rc : -1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011214 }
11215
11216 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
11217 0, LPFC_DRIVER_NAME, phba);
11218 if (rc) {
David Brazdil0f672f62019-12-10 10:32:29 +000011219 pci_free_irq_vectors(phba->pcidev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011220 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
11221 "0490 MSI request_irq failed (%d)\n", rc);
11222 return rc;
11223 }
11224
David Brazdil0f672f62019-12-10 10:32:29 +000011225 for (index = 0; index < phba->cfg_irq_chann; index++) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011226 phba->sli4_hba.hba_eq_hdl[index].idx = index;
11227 phba->sli4_hba.hba_eq_hdl[index].phba = phba;
11228 }
11229
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011230 return 0;
11231}
11232
11233/**
11234 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
11235 * @phba: pointer to lpfc hba data structure.
11236 *
11237 * This routine is invoked to enable device interrupt and associate driver's
11238 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
11239 * interface spec. Depends on the interrupt mode configured to the driver,
11240 * the driver will try to fallback from the configured interrupt mode to an
11241 * interrupt mode which is supported by the platform, kernel, and device in
11242 * the order of:
11243 * MSI-X -> MSI -> IRQ.
11244 *
11245 * Return codes
11246 * 0 - successful
11247 * other values - error
11248 **/
11249static uint32_t
11250lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
11251{
11252 uint32_t intr_mode = LPFC_INTR_ERROR;
11253 int retval, idx;
11254
11255 if (cfg_mode == 2) {
11256 /* Preparation before conf_msi mbox cmd */
11257 retval = 0;
11258 if (!retval) {
11259 /* Now, try to enable MSI-X interrupt mode */
11260 retval = lpfc_sli4_enable_msix(phba);
11261 if (!retval) {
11262 /* Indicate initialization to MSI-X mode */
11263 phba->intr_type = MSIX;
11264 intr_mode = 2;
11265 }
11266 }
11267 }
11268
11269 /* Fallback to MSI if MSI-X initialization failed */
11270 if (cfg_mode >= 1 && phba->intr_type == NONE) {
11271 retval = lpfc_sli4_enable_msi(phba);
11272 if (!retval) {
11273 /* Indicate initialization to MSI mode */
11274 phba->intr_type = MSI;
11275 intr_mode = 1;
11276 }
11277 }
11278
11279 /* Fallback to INTx if both MSI-X/MSI initalization failed */
11280 if (phba->intr_type == NONE) {
11281 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
11282 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
11283 if (!retval) {
11284 struct lpfc_hba_eq_hdl *eqhdl;
11285
11286 /* Indicate initialization to INTx mode */
11287 phba->intr_type = INTx;
11288 intr_mode = 0;
11289
David Brazdil0f672f62019-12-10 10:32:29 +000011290 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011291 eqhdl = &phba->sli4_hba.hba_eq_hdl[idx];
11292 eqhdl->idx = idx;
11293 eqhdl->phba = phba;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011294 }
11295 }
11296 }
11297 return intr_mode;
11298}
11299
11300/**
11301 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
11302 * @phba: pointer to lpfc hba data structure.
11303 *
11304 * This routine is invoked to disable device interrupt and disassociate
11305 * the driver's interrupt handler(s) from interrupt vector(s) to device
11306 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
11307 * will release the interrupt vector(s) for the message signaled interrupt.
11308 **/
11309static void
11310lpfc_sli4_disable_intr(struct lpfc_hba *phba)
11311{
11312 /* Disable the currently initialized interrupt mode */
11313 if (phba->intr_type == MSIX) {
11314 int index;
11315
11316 /* Free up MSI-X multi-message vectors */
David Brazdil0f672f62019-12-10 10:32:29 +000011317 for (index = 0; index < phba->cfg_irq_chann; index++) {
11318 irq_set_affinity_hint(
11319 pci_irq_vector(phba->pcidev, index),
11320 NULL);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011321 free_irq(pci_irq_vector(phba->pcidev, index),
11322 &phba->sli4_hba.hba_eq_hdl[index]);
David Brazdil0f672f62019-12-10 10:32:29 +000011323 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011324 } else {
11325 free_irq(phba->pcidev->irq, phba);
11326 }
11327
11328 pci_free_irq_vectors(phba->pcidev);
11329
11330 /* Reset interrupt management states */
11331 phba->intr_type = NONE;
11332 phba->sli.slistat.sli_intr = 0;
11333}
11334
11335/**
11336 * lpfc_unset_hba - Unset SLI3 hba device initialization
11337 * @phba: pointer to lpfc hba data structure.
11338 *
11339 * This routine is invoked to unset the HBA device initialization steps to
11340 * a device with SLI-3 interface spec.
11341 **/
11342static void
11343lpfc_unset_hba(struct lpfc_hba *phba)
11344{
11345 struct lpfc_vport *vport = phba->pport;
11346 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
11347
11348 spin_lock_irq(shost->host_lock);
11349 vport->load_flag |= FC_UNLOADING;
11350 spin_unlock_irq(shost->host_lock);
11351
11352 kfree(phba->vpi_bmask);
11353 kfree(phba->vpi_ids);
11354
11355 lpfc_stop_hba_timers(phba);
11356
11357 phba->pport->work_port_events = 0;
11358
11359 lpfc_sli_hba_down(phba);
11360
11361 lpfc_sli_brdrestart(phba);
11362
11363 lpfc_sli_disable_intr(phba);
11364
11365 return;
11366}
11367
11368/**
11369 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
11370 * @phba: Pointer to HBA context object.
11371 *
11372 * This function is called in the SLI4 code path to wait for completion
11373 * of device's XRIs exchange busy. It will check the XRI exchange busy
11374 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
11375 * that, it will check the XRI exchange busy on outstanding FCP and ELS
11376 * I/Os every 30 seconds, log error message, and wait forever. Only when
11377 * all XRI exchange busy complete, the driver unload shall proceed with
11378 * invoking the function reset ioctl mailbox command to the CNA and the
11379 * the rest of the driver unload resource release.
11380 **/
11381static void
11382lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
11383{
David Brazdil0f672f62019-12-10 10:32:29 +000011384 struct lpfc_sli4_hdw_queue *qp;
11385 int idx, ccnt;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011386 int wait_time = 0;
David Brazdil0f672f62019-12-10 10:32:29 +000011387 int io_xri_cmpl = 1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011388 int nvmet_xri_cmpl = 1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011389 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
11390
11391 /* Driver just aborted IOs during the hba_unset process. Pause
11392 * here to give the HBA time to complete the IO and get entries
11393 * into the abts lists.
11394 */
11395 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
11396
11397 /* Wait for NVME pending IO to flush back to transport. */
11398 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
11399 lpfc_nvme_wait_for_io_drain(phba);
11400
David Brazdil0f672f62019-12-10 10:32:29 +000011401 ccnt = 0;
11402 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
11403 qp = &phba->sli4_hba.hdwq[idx];
11404 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list);
11405 if (!io_xri_cmpl) /* if list is NOT empty */
11406 ccnt++;
11407 }
11408 if (ccnt)
11409 io_xri_cmpl = 0;
11410
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011411 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011412 nvmet_xri_cmpl =
11413 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
11414 }
11415
David Brazdil0f672f62019-12-10 10:32:29 +000011416 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011417 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
11418 if (!nvmet_xri_cmpl)
11419 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11420 "6424 NVMET XRI exchange busy "
11421 "wait time: %d seconds.\n",
11422 wait_time/1000);
David Brazdil0f672f62019-12-10 10:32:29 +000011423 if (!io_xri_cmpl)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011424 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
David Brazdil0f672f62019-12-10 10:32:29 +000011425 "6100 IO XRI exchange busy "
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011426 "wait time: %d seconds.\n",
11427 wait_time/1000);
11428 if (!els_xri_cmpl)
11429 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11430 "2878 ELS XRI exchange busy "
11431 "wait time: %d seconds.\n",
11432 wait_time/1000);
11433 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
11434 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
11435 } else {
11436 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
11437 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
11438 }
David Brazdil0f672f62019-12-10 10:32:29 +000011439
11440 ccnt = 0;
11441 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
11442 qp = &phba->sli4_hba.hdwq[idx];
11443 io_xri_cmpl = list_empty(
11444 &qp->lpfc_abts_io_buf_list);
11445 if (!io_xri_cmpl) /* if list is NOT empty */
11446 ccnt++;
11447 }
11448 if (ccnt)
11449 io_xri_cmpl = 0;
11450
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011451 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011452 nvmet_xri_cmpl = list_empty(
11453 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
11454 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011455 els_xri_cmpl =
11456 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
11457
11458 }
11459}
11460
11461/**
11462 * lpfc_sli4_hba_unset - Unset the fcoe hba
11463 * @phba: Pointer to HBA context object.
11464 *
11465 * This function is called in the SLI4 code path to reset the HBA's FCoE
11466 * function. The caller is not required to hold any lock. This routine
11467 * issues PCI function reset mailbox command to reset the FCoE function.
11468 * At the end of the function, it calls lpfc_hba_down_post function to
11469 * free any pending commands.
11470 **/
11471static void
11472lpfc_sli4_hba_unset(struct lpfc_hba *phba)
11473{
11474 int wait_cnt = 0;
11475 LPFC_MBOXQ_t *mboxq;
11476 struct pci_dev *pdev = phba->pcidev;
11477
11478 lpfc_stop_hba_timers(phba);
David Brazdil0f672f62019-12-10 10:32:29 +000011479 if (phba->pport)
11480 phba->sli4_hba.intr_enable = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011481
11482 /*
11483 * Gracefully wait out the potential current outstanding asynchronous
11484 * mailbox command.
11485 */
11486
11487 /* First, block any pending async mailbox command from posted */
11488 spin_lock_irq(&phba->hbalock);
11489 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
11490 spin_unlock_irq(&phba->hbalock);
11491 /* Now, trying to wait it out if we can */
11492 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
11493 msleep(10);
11494 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
11495 break;
11496 }
11497 /* Forcefully release the outstanding mailbox command if timed out */
11498 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
11499 spin_lock_irq(&phba->hbalock);
11500 mboxq = phba->sli.mbox_active;
11501 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
11502 __lpfc_mbox_cmpl_put(phba, mboxq);
11503 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
11504 phba->sli.mbox_active = NULL;
11505 spin_unlock_irq(&phba->hbalock);
11506 }
11507
11508 /* Abort all iocbs associated with the hba */
11509 lpfc_sli_hba_iocb_abort(phba);
11510
11511 /* Wait for completion of device XRI exchange busy */
11512 lpfc_sli4_xri_exchange_busy_wait(phba);
11513
Olivier Deprez0e641232021-09-23 10:07:05 +020011514 /* per-phba callback de-registration for hotplug event */
11515 if (phba->pport)
11516 lpfc_cpuhp_remove(phba);
11517
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011518 /* Disable PCI subsystem interrupt */
11519 lpfc_sli4_disable_intr(phba);
11520
11521 /* Disable SR-IOV if enabled */
11522 if (phba->cfg_sriov_nr_virtfn)
11523 pci_disable_sriov(pdev);
11524
11525 /* Stop kthread signal shall trigger work_done one more time */
11526 kthread_stop(phba->worker_thread);
11527
David Brazdil0f672f62019-12-10 10:32:29 +000011528 /* Disable FW logging to host memory */
11529 lpfc_ras_stop_fwlog(phba);
11530
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011531 /* Unset the queues shared with the hardware then release all
11532 * allocated resources.
11533 */
11534 lpfc_sli4_queue_unset(phba);
11535 lpfc_sli4_queue_destroy(phba);
11536
11537 /* Reset SLI4 HBA FCoE function */
11538 lpfc_pci_function_reset(phba);
11539
David Brazdil0f672f62019-12-10 10:32:29 +000011540 /* Free RAS DMA memory */
11541 if (phba->ras_fwlog.ras_enabled)
11542 lpfc_sli4_ras_dma_free(phba);
11543
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011544 /* Stop the SLI4 device port */
David Brazdil0f672f62019-12-10 10:32:29 +000011545 if (phba->pport)
11546 phba->pport->work_port_events = 0;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011547}
11548
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011549/**
11550 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
11551 * @phba: Pointer to HBA context object.
11552 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
11553 *
11554 * This function is called in the SLI4 code path to read the port's
11555 * sli4 capabilities.
11556 *
11557 * This function may be be called from any context that can block-wait
11558 * for the completion. The expectation is that this routine is called
11559 * typically from probe_one or from the online routine.
11560 **/
11561int
11562lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
11563{
11564 int rc;
11565 struct lpfc_mqe *mqe = &mboxq->u.mqe;
11566 struct lpfc_pc_sli4_params *sli4_params;
11567 uint32_t mbox_tmo;
11568 int length;
11569 bool exp_wqcq_pages = true;
11570 struct lpfc_sli4_parameters *mbx_sli4_parameters;
11571
11572 /*
11573 * By default, the driver assumes the SLI4 port requires RPI
11574 * header postings. The SLI4_PARAM response will correct this
11575 * assumption.
11576 */
11577 phba->sli4_hba.rpi_hdrs_in_use = 1;
11578
11579 /* Read the port's SLI4 Config Parameters */
11580 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
11581 sizeof(struct lpfc_sli4_cfg_mhdr));
11582 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11583 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
11584 length, LPFC_SLI4_MBX_EMBED);
11585 if (!phba->sli4_hba.intr_enable)
11586 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11587 else {
11588 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
11589 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
11590 }
11591 if (unlikely(rc))
11592 return rc;
11593 sli4_params = &phba->sli4_hba.pc_sli4_params;
11594 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
11595 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
11596 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
11597 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
11598 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
11599 mbx_sli4_parameters);
11600 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
11601 mbx_sli4_parameters);
11602 if (bf_get(cfg_phwq, mbx_sli4_parameters))
11603 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
11604 else
11605 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
11606 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
Olivier Deprez0e641232021-09-23 10:07:05 +020011607 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope,
11608 mbx_sli4_parameters);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011609 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
11610 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
11611 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
11612 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
11613 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
11614 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
11615 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
11616 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
11617 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
11618 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
11619 mbx_sli4_parameters);
11620 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
11621 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
11622 mbx_sli4_parameters);
11623 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
11624 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011625
David Brazdil0f672f62019-12-10 10:32:29 +000011626 /* Check for Extended Pre-Registered SGL support */
11627 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011628
David Brazdil0f672f62019-12-10 10:32:29 +000011629 /* Check for firmware nvme support */
11630 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
11631 bf_get(cfg_xib, mbx_sli4_parameters));
11632
11633 if (rc) {
11634 /* Save this to indicate the Firmware supports NVME */
11635 sli4_params->nvme = 1;
11636
11637 /* Firmware NVME support, check driver FC4 NVME support */
11638 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) {
11639 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
11640 "6133 Disabling NVME support: "
11641 "FC4 type not supported: x%x\n",
11642 phba->cfg_enable_fc4_type);
11643 goto fcponly;
11644 }
11645 } else {
11646 /* No firmware NVME support, check driver FC4 NVME support */
11647 sli4_params->nvme = 0;
11648 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11649 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
11650 "6101 Disabling NVME support: Not "
11651 "supported by firmware (%d %d) x%x\n",
11652 bf_get(cfg_nvme, mbx_sli4_parameters),
11653 bf_get(cfg_xib, mbx_sli4_parameters),
11654 phba->cfg_enable_fc4_type);
11655fcponly:
11656 phba->nvme_support = 0;
11657 phba->nvmet_support = 0;
11658 phba->cfg_nvmet_mrq = 0;
11659 phba->cfg_nvme_seg_cnt = 0;
11660
11661 /* If no FC4 type support, move to just SCSI support */
11662 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
11663 return -ENODEV;
11664 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
11665 }
11666 }
11667
11668 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to
11669 * accommodate 512K and 1M IOs in a single nvme buf and supply
11670 * enough NVME LS iocb buffers for larger connectivity counts.
11671 */
11672 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11673 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
11674 phba->cfg_iocb_cnt = 5;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011675 }
11676
11677 /* Only embed PBDE for if_type 6, PBDE support requires xib be set */
11678 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
11679 LPFC_SLI_INTF_IF_TYPE_6) || (!bf_get(cfg_xib, mbx_sli4_parameters)))
11680 phba->cfg_enable_pbde = 0;
11681
11682 /*
11683 * To support Suppress Response feature we must satisfy 3 conditions.
11684 * lpfc_suppress_rsp module parameter must be set (default).
11685 * In SLI4-Parameters Descriptor:
11686 * Extended Inline Buffers (XIB) must be supported.
11687 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
11688 * (double negative).
11689 */
11690 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
11691 !(bf_get(cfg_nosr, mbx_sli4_parameters)))
11692 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
11693 else
11694 phba->cfg_suppress_rsp = 0;
11695
11696 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
11697 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
11698
11699 /* Make sure that sge_supp_len can be handled by the driver */
11700 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
11701 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
11702
11703 /*
11704 * Check whether the adapter supports an embedded copy of the
11705 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
11706 * to use this option, 128-byte WQEs must be used.
11707 */
11708 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
11709 phba->fcp_embed_io = 1;
11710 else
11711 phba->fcp_embed_io = 0;
11712
11713 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
11714 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
11715 bf_get(cfg_xib, mbx_sli4_parameters),
11716 phba->cfg_enable_pbde,
11717 phba->fcp_embed_io, phba->nvme_support,
11718 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
11719
11720 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
11721 LPFC_SLI_INTF_IF_TYPE_2) &&
11722 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
11723 LPFC_SLI_INTF_FAMILY_LNCR_A0))
11724 exp_wqcq_pages = false;
11725
11726 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
11727 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
11728 exp_wqcq_pages &&
11729 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
11730 phba->enab_exp_wqcq_pages = 1;
11731 else
11732 phba->enab_exp_wqcq_pages = 0;
11733 /*
11734 * Check if the SLI port supports MDS Diagnostics
11735 */
11736 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
11737 phba->mds_diags_support = 1;
11738 else
11739 phba->mds_diags_support = 0;
David Brazdil0f672f62019-12-10 10:32:29 +000011740
11741 /*
11742 * Check if the SLI port supports NSLER
11743 */
11744 if (bf_get(cfg_nsler, mbx_sli4_parameters))
11745 phba->nsler = 1;
11746 else
11747 phba->nsler = 0;
11748
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011749 return 0;
11750}
11751
11752/**
11753 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
11754 * @pdev: pointer to PCI device
11755 * @pid: pointer to PCI device identifier
11756 *
11757 * This routine is to be called to attach a device with SLI-3 interface spec
11758 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
11759 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
11760 * information of the device and driver to see if the driver state that it can
11761 * support this kind of device. If the match is successful, the driver core
11762 * invokes this routine. If this routine determines it can claim the HBA, it
11763 * does all the initialization that it needs to do to handle the HBA properly.
11764 *
11765 * Return code
11766 * 0 - driver can claim the device
11767 * negative value - driver can not claim the device
11768 **/
11769static int
11770lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
11771{
11772 struct lpfc_hba *phba;
11773 struct lpfc_vport *vport = NULL;
11774 struct Scsi_Host *shost = NULL;
11775 int error;
11776 uint32_t cfg_mode, intr_mode;
11777
11778 /* Allocate memory for HBA structure */
11779 phba = lpfc_hba_alloc(pdev);
11780 if (!phba)
11781 return -ENOMEM;
11782
11783 /* Perform generic PCI device enabling operation */
11784 error = lpfc_enable_pci_dev(phba);
11785 if (error)
11786 goto out_free_phba;
11787
11788 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
11789 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
11790 if (error)
11791 goto out_disable_pci_dev;
11792
11793 /* Set up SLI-3 specific device PCI memory space */
11794 error = lpfc_sli_pci_mem_setup(phba);
11795 if (error) {
11796 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11797 "1402 Failed to set up pci memory space.\n");
11798 goto out_disable_pci_dev;
11799 }
11800
11801 /* Set up SLI-3 specific device driver resources */
11802 error = lpfc_sli_driver_resource_setup(phba);
11803 if (error) {
11804 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11805 "1404 Failed to set up driver resource.\n");
11806 goto out_unset_pci_mem_s3;
11807 }
11808
11809 /* Initialize and populate the iocb list per host */
11810
11811 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
11812 if (error) {
11813 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11814 "1405 Failed to initialize iocb list.\n");
11815 goto out_unset_driver_resource_s3;
11816 }
11817
11818 /* Set up common device driver resources */
11819 error = lpfc_setup_driver_resource_phase2(phba);
11820 if (error) {
11821 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11822 "1406 Failed to set up driver resource.\n");
11823 goto out_free_iocb_list;
11824 }
11825
11826 /* Get the default values for Model Name and Description */
11827 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
11828
11829 /* Create SCSI host to the physical port */
11830 error = lpfc_create_shost(phba);
11831 if (error) {
11832 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11833 "1407 Failed to create scsi host.\n");
11834 goto out_unset_driver_resource;
11835 }
11836
11837 /* Configure sysfs attributes */
11838 vport = phba->pport;
11839 error = lpfc_alloc_sysfs_attr(vport);
11840 if (error) {
11841 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11842 "1476 Failed to allocate sysfs attr\n");
11843 goto out_destroy_shost;
11844 }
11845
11846 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
11847 /* Now, trying to enable interrupt and bring up the device */
11848 cfg_mode = phba->cfg_use_msi;
11849 while (true) {
11850 /* Put device to a known state before enabling interrupt */
11851 lpfc_stop_port(phba);
11852 /* Configure and enable interrupt */
11853 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
11854 if (intr_mode == LPFC_INTR_ERROR) {
11855 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11856 "0431 Failed to enable interrupt.\n");
11857 error = -ENODEV;
11858 goto out_free_sysfs_attr;
11859 }
11860 /* SLI-3 HBA setup */
11861 if (lpfc_sli_hba_setup(phba)) {
11862 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11863 "1477 Failed to set up hba\n");
11864 error = -ENODEV;
11865 goto out_remove_device;
11866 }
11867
11868 /* Wait 50ms for the interrupts of previous mailbox commands */
11869 msleep(50);
11870 /* Check active interrupts on message signaled interrupts */
11871 if (intr_mode == 0 ||
11872 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
11873 /* Log the current active interrupt mode */
11874 phba->intr_mode = intr_mode;
11875 lpfc_log_intr_mode(phba, intr_mode);
11876 break;
11877 } else {
11878 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11879 "0447 Configure interrupt mode (%d) "
11880 "failed active interrupt test.\n",
11881 intr_mode);
11882 /* Disable the current interrupt mode */
11883 lpfc_sli_disable_intr(phba);
11884 /* Try next level of interrupt mode */
11885 cfg_mode = --intr_mode;
11886 }
11887 }
11888
11889 /* Perform post initialization setup */
11890 lpfc_post_init_setup(phba);
11891
11892 /* Check if there are static vports to be created. */
11893 lpfc_create_static_vport(phba);
11894
11895 return 0;
11896
11897out_remove_device:
11898 lpfc_unset_hba(phba);
11899out_free_sysfs_attr:
11900 lpfc_free_sysfs_attr(vport);
11901out_destroy_shost:
11902 lpfc_destroy_shost(phba);
11903out_unset_driver_resource:
11904 lpfc_unset_driver_resource_phase2(phba);
11905out_free_iocb_list:
11906 lpfc_free_iocb_list(phba);
11907out_unset_driver_resource_s3:
11908 lpfc_sli_driver_resource_unset(phba);
11909out_unset_pci_mem_s3:
11910 lpfc_sli_pci_mem_unset(phba);
11911out_disable_pci_dev:
11912 lpfc_disable_pci_dev(phba);
11913 if (shost)
11914 scsi_host_put(shost);
11915out_free_phba:
11916 lpfc_hba_free(phba);
11917 return error;
11918}
11919
11920/**
11921 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
11922 * @pdev: pointer to PCI device
11923 *
11924 * This routine is to be called to disattach a device with SLI-3 interface
11925 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
11926 * removed from PCI bus, it performs all the necessary cleanup for the HBA
11927 * device to be removed from the PCI subsystem properly.
11928 **/
11929static void
11930lpfc_pci_remove_one_s3(struct pci_dev *pdev)
11931{
11932 struct Scsi_Host *shost = pci_get_drvdata(pdev);
11933 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
11934 struct lpfc_vport **vports;
11935 struct lpfc_hba *phba = vport->phba;
11936 int i;
11937
11938 spin_lock_irq(&phba->hbalock);
11939 vport->load_flag |= FC_UNLOADING;
11940 spin_unlock_irq(&phba->hbalock);
11941
11942 lpfc_free_sysfs_attr(vport);
11943
11944 /* Release all the vports against this physical port */
11945 vports = lpfc_create_vport_work_array(phba);
11946 if (vports != NULL)
11947 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
11948 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
11949 continue;
11950 fc_vport_terminate(vports[i]->fc_vport);
11951 }
11952 lpfc_destroy_vport_work_array(phba, vports);
11953
11954 /* Remove FC host and then SCSI host with the physical port */
11955 fc_remove_host(shost);
11956 scsi_remove_host(shost);
11957
11958 lpfc_cleanup(vport);
11959
11960 /*
11961 * Bring down the SLI Layer. This step disable all interrupts,
11962 * clears the rings, discards all mailbox commands, and resets
11963 * the HBA.
11964 */
11965
11966 /* HBA interrupt will be disabled after this call */
11967 lpfc_sli_hba_down(phba);
11968 /* Stop kthread signal shall trigger work_done one more time */
11969 kthread_stop(phba->worker_thread);
11970 /* Final cleanup of txcmplq and reset the HBA */
11971 lpfc_sli_brdrestart(phba);
11972
11973 kfree(phba->vpi_bmask);
11974 kfree(phba->vpi_ids);
11975
11976 lpfc_stop_hba_timers(phba);
David Brazdil0f672f62019-12-10 10:32:29 +000011977 spin_lock_irq(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011978 list_del_init(&vport->listentry);
David Brazdil0f672f62019-12-10 10:32:29 +000011979 spin_unlock_irq(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011980
11981 lpfc_debugfs_terminate(vport);
11982
11983 /* Disable SR-IOV if enabled */
11984 if (phba->cfg_sriov_nr_virtfn)
11985 pci_disable_sriov(pdev);
11986
11987 /* Disable interrupt */
11988 lpfc_sli_disable_intr(phba);
11989
11990 scsi_host_put(shost);
11991
11992 /*
11993 * Call scsi_free before mem_free since scsi bufs are released to their
11994 * corresponding pools here.
11995 */
11996 lpfc_scsi_free(phba);
David Brazdil0f672f62019-12-10 10:32:29 +000011997 lpfc_free_iocb_list(phba);
11998
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000011999 lpfc_mem_free_all(phba);
12000
12001 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
12002 phba->hbqslimp.virt, phba->hbqslimp.phys);
12003
12004 /* Free resources associated with SLI2 interface */
12005 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
12006 phba->slim2p.virt, phba->slim2p.phys);
12007
12008 /* unmap adapter SLIM and Control Registers */
12009 iounmap(phba->ctrl_regs_memmap_p);
12010 iounmap(phba->slim_memmap_p);
12011
12012 lpfc_hba_free(phba);
12013
12014 pci_release_mem_regions(pdev);
12015 pci_disable_device(pdev);
12016}
12017
12018/**
12019 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
12020 * @pdev: pointer to PCI device
12021 * @msg: power management message
12022 *
12023 * This routine is to be called from the kernel's PCI subsystem to support
12024 * system Power Management (PM) to device with SLI-3 interface spec. When
12025 * PM invokes this method, it quiesces the device by stopping the driver's
12026 * worker thread for the device, turning off device's interrupt and DMA,
12027 * and bring the device offline. Note that as the driver implements the
12028 * minimum PM requirements to a power-aware driver's PM support for the
12029 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
12030 * to the suspend() method call will be treated as SUSPEND and the driver will
12031 * fully reinitialize its device during resume() method call, the driver will
12032 * set device to PCI_D3hot state in PCI config space instead of setting it
12033 * according to the @msg provided by the PM.
12034 *
12035 * Return code
12036 * 0 - driver suspended the device
12037 * Error otherwise
12038 **/
12039static int
12040lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
12041{
12042 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12043 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12044
12045 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12046 "0473 PCI device Power Management suspend.\n");
12047
12048 /* Bring down the device */
12049 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
12050 lpfc_offline(phba);
12051 kthread_stop(phba->worker_thread);
12052
12053 /* Disable interrupt from device */
12054 lpfc_sli_disable_intr(phba);
12055
12056 /* Save device state to PCI config space */
12057 pci_save_state(pdev);
12058 pci_set_power_state(pdev, PCI_D3hot);
12059
12060 return 0;
12061}
12062
12063/**
12064 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
12065 * @pdev: pointer to PCI device
12066 *
12067 * This routine is to be called from the kernel's PCI subsystem to support
12068 * system Power Management (PM) to device with SLI-3 interface spec. When PM
12069 * invokes this method, it restores the device's PCI config space state and
12070 * fully reinitializes the device and brings it online. Note that as the
12071 * driver implements the minimum PM requirements to a power-aware driver's
12072 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
12073 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
12074 * driver will fully reinitialize its device during resume() method call,
12075 * the device will be set to PCI_D0 directly in PCI config space before
12076 * restoring the state.
12077 *
12078 * Return code
12079 * 0 - driver suspended the device
12080 * Error otherwise
12081 **/
12082static int
12083lpfc_pci_resume_one_s3(struct pci_dev *pdev)
12084{
12085 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12086 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12087 uint32_t intr_mode;
12088 int error;
12089
12090 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12091 "0452 PCI device Power Management resume.\n");
12092
12093 /* Restore device state from PCI config space */
12094 pci_set_power_state(pdev, PCI_D0);
12095 pci_restore_state(pdev);
12096
12097 /*
12098 * As the new kernel behavior of pci_restore_state() API call clears
12099 * device saved_state flag, need to save the restored state again.
12100 */
12101 pci_save_state(pdev);
12102
12103 if (pdev->is_busmaster)
12104 pci_set_master(pdev);
12105
12106 /* Startup the kernel thread for this host adapter. */
12107 phba->worker_thread = kthread_run(lpfc_do_work, phba,
12108 "lpfc_worker_%d", phba->brd_no);
12109 if (IS_ERR(phba->worker_thread)) {
12110 error = PTR_ERR(phba->worker_thread);
12111 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12112 "0434 PM resume failed to start worker "
12113 "thread: error=x%x.\n", error);
12114 return error;
12115 }
12116
12117 /* Configure and enable interrupt */
12118 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
12119 if (intr_mode == LPFC_INTR_ERROR) {
12120 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12121 "0430 PM resume Failed to enable interrupt\n");
12122 return -EIO;
12123 } else
12124 phba->intr_mode = intr_mode;
12125
12126 /* Restart HBA and bring it online */
12127 lpfc_sli_brdrestart(phba);
12128 lpfc_online(phba);
12129
12130 /* Log the current active interrupt mode */
12131 lpfc_log_intr_mode(phba, phba->intr_mode);
12132
12133 return 0;
12134}
12135
12136/**
12137 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
12138 * @phba: pointer to lpfc hba data structure.
12139 *
12140 * This routine is called to prepare the SLI3 device for PCI slot recover. It
12141 * aborts all the outstanding SCSI I/Os to the pci device.
12142 **/
12143static void
12144lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
12145{
12146 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12147 "2723 PCI channel I/O abort preparing for recovery\n");
12148
12149 /*
12150 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
12151 * and let the SCSI mid-layer to retry them to recover.
12152 */
12153 lpfc_sli_abort_fcp_rings(phba);
12154}
12155
12156/**
12157 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
12158 * @phba: pointer to lpfc hba data structure.
12159 *
12160 * This routine is called to prepare the SLI3 device for PCI slot reset. It
12161 * disables the device interrupt and pci device, and aborts the internal FCP
12162 * pending I/Os.
12163 **/
12164static void
12165lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
12166{
12167 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12168 "2710 PCI channel disable preparing for reset\n");
12169
12170 /* Block any management I/Os to the device */
12171 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
12172
12173 /* Block all SCSI devices' I/Os on the host */
12174 lpfc_scsi_dev_block(phba);
12175
12176 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
David Brazdil0f672f62019-12-10 10:32:29 +000012177 lpfc_sli_flush_io_rings(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012178
12179 /* stop all timers */
12180 lpfc_stop_hba_timers(phba);
12181
12182 /* Disable interrupt and pci device */
12183 lpfc_sli_disable_intr(phba);
12184 pci_disable_device(phba->pcidev);
12185}
12186
12187/**
12188 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
12189 * @phba: pointer to lpfc hba data structure.
12190 *
12191 * This routine is called to prepare the SLI3 device for PCI slot permanently
12192 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
12193 * pending I/Os.
12194 **/
12195static void
12196lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
12197{
12198 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12199 "2711 PCI channel permanent disable for failure\n");
12200 /* Block all SCSI devices' I/Os on the host */
12201 lpfc_scsi_dev_block(phba);
12202
12203 /* stop all timers */
12204 lpfc_stop_hba_timers(phba);
12205
12206 /* Clean up all driver's outstanding SCSI I/Os */
David Brazdil0f672f62019-12-10 10:32:29 +000012207 lpfc_sli_flush_io_rings(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012208}
12209
12210/**
12211 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
12212 * @pdev: pointer to PCI device.
12213 * @state: the current PCI connection state.
12214 *
12215 * This routine is called from the PCI subsystem for I/O error handling to
12216 * device with SLI-3 interface spec. This function is called by the PCI
12217 * subsystem after a PCI bus error affecting this device has been detected.
12218 * When this function is invoked, it will need to stop all the I/Os and
12219 * interrupt(s) to the device. Once that is done, it will return
12220 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
12221 * as desired.
12222 *
12223 * Return codes
12224 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
12225 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
12226 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12227 **/
12228static pci_ers_result_t
12229lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
12230{
12231 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12232 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12233
12234 switch (state) {
12235 case pci_channel_io_normal:
12236 /* Non-fatal error, prepare for recovery */
12237 lpfc_sli_prep_dev_for_recover(phba);
12238 return PCI_ERS_RESULT_CAN_RECOVER;
12239 case pci_channel_io_frozen:
12240 /* Fatal error, prepare for slot reset */
12241 lpfc_sli_prep_dev_for_reset(phba);
12242 return PCI_ERS_RESULT_NEED_RESET;
12243 case pci_channel_io_perm_failure:
12244 /* Permanent failure, prepare for device down */
12245 lpfc_sli_prep_dev_for_perm_failure(phba);
12246 return PCI_ERS_RESULT_DISCONNECT;
12247 default:
12248 /* Unknown state, prepare and request slot reset */
12249 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12250 "0472 Unknown PCI error state: x%x\n", state);
12251 lpfc_sli_prep_dev_for_reset(phba);
12252 return PCI_ERS_RESULT_NEED_RESET;
12253 }
12254}
12255
12256/**
12257 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
12258 * @pdev: pointer to PCI device.
12259 *
12260 * This routine is called from the PCI subsystem for error handling to
12261 * device with SLI-3 interface spec. This is called after PCI bus has been
12262 * reset to restart the PCI card from scratch, as if from a cold-boot.
12263 * During the PCI subsystem error recovery, after driver returns
12264 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
12265 * recovery and then call this routine before calling the .resume method
12266 * to recover the device. This function will initialize the HBA device,
12267 * enable the interrupt, but it will just put the HBA to offline state
12268 * without passing any I/O traffic.
12269 *
12270 * Return codes
12271 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
12272 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
12273 */
12274static pci_ers_result_t
12275lpfc_io_slot_reset_s3(struct pci_dev *pdev)
12276{
12277 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12278 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12279 struct lpfc_sli *psli = &phba->sli;
12280 uint32_t intr_mode;
12281
12282 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
12283 if (pci_enable_device_mem(pdev)) {
12284 printk(KERN_ERR "lpfc: Cannot re-enable "
12285 "PCI device after reset.\n");
12286 return PCI_ERS_RESULT_DISCONNECT;
12287 }
12288
12289 pci_restore_state(pdev);
12290
12291 /*
12292 * As the new kernel behavior of pci_restore_state() API call clears
12293 * device saved_state flag, need to save the restored state again.
12294 */
12295 pci_save_state(pdev);
12296
12297 if (pdev->is_busmaster)
12298 pci_set_master(pdev);
12299
12300 spin_lock_irq(&phba->hbalock);
12301 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
12302 spin_unlock_irq(&phba->hbalock);
12303
12304 /* Configure and enable interrupt */
12305 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
12306 if (intr_mode == LPFC_INTR_ERROR) {
12307 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12308 "0427 Cannot re-enable interrupt after "
12309 "slot reset.\n");
12310 return PCI_ERS_RESULT_DISCONNECT;
12311 } else
12312 phba->intr_mode = intr_mode;
12313
12314 /* Take device offline, it will perform cleanup */
12315 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
12316 lpfc_offline(phba);
12317 lpfc_sli_brdrestart(phba);
12318
12319 /* Log the current active interrupt mode */
12320 lpfc_log_intr_mode(phba, phba->intr_mode);
12321
12322 return PCI_ERS_RESULT_RECOVERED;
12323}
12324
12325/**
12326 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
12327 * @pdev: pointer to PCI device
12328 *
12329 * This routine is called from the PCI subsystem for error handling to device
12330 * with SLI-3 interface spec. It is called when kernel error recovery tells
12331 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
12332 * error recovery. After this call, traffic can start to flow from this device
12333 * again.
12334 */
12335static void
12336lpfc_io_resume_s3(struct pci_dev *pdev)
12337{
12338 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12339 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12340
12341 /* Bring device online, it will be no-op for non-fatal error resume */
12342 lpfc_online(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012343}
12344
12345/**
12346 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
12347 * @phba: pointer to lpfc hba data structure.
12348 *
12349 * returns the number of ELS/CT IOCBs to reserve
12350 **/
12351int
12352lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
12353{
12354 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
12355
12356 if (phba->sli_rev == LPFC_SLI_REV4) {
12357 if (max_xri <= 100)
12358 return 10;
12359 else if (max_xri <= 256)
12360 return 25;
12361 else if (max_xri <= 512)
12362 return 50;
12363 else if (max_xri <= 1024)
12364 return 100;
12365 else if (max_xri <= 1536)
12366 return 150;
12367 else if (max_xri <= 2048)
12368 return 200;
12369 else
12370 return 250;
12371 } else
12372 return 0;
12373}
12374
12375/**
12376 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
12377 * @phba: pointer to lpfc hba data structure.
12378 *
12379 * returns the number of ELS/CT + NVMET IOCBs to reserve
12380 **/
12381int
12382lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
12383{
12384 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
12385
12386 if (phba->nvmet_support)
12387 max_xri += LPFC_NVMET_BUF_POST;
12388 return max_xri;
12389}
12390
12391
12392static void
12393lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
12394 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
12395 const struct firmware *fw)
12396{
12397 if ((offset == ADD_STATUS_FW_NOT_SUPPORTED) ||
12398 (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G6_FC &&
12399 magic_number != MAGIC_NUMER_G6) ||
12400 (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G7_FC &&
12401 magic_number != MAGIC_NUMER_G7))
12402 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12403 "3030 This firmware version is not supported on "
12404 "this HBA model. Device:%x Magic:%x Type:%x "
12405 "ID:%x Size %d %zd\n",
12406 phba->pcidev->device, magic_number, ftype, fid,
12407 fsize, fw->size);
12408 else
12409 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12410 "3022 FW Download failed. Device:%x Magic:%x Type:%x "
12411 "ID:%x Size %d %zd\n",
12412 phba->pcidev->device, magic_number, ftype, fid,
12413 fsize, fw->size);
12414}
12415
12416
12417/**
12418 * lpfc_write_firmware - attempt to write a firmware image to the port
12419 * @fw: pointer to firmware image returned from request_firmware.
12420 * @phba: pointer to lpfc hba data structure.
12421 *
12422 **/
12423static void
12424lpfc_write_firmware(const struct firmware *fw, void *context)
12425{
12426 struct lpfc_hba *phba = (struct lpfc_hba *)context;
12427 char fwrev[FW_REV_STR_SIZE];
12428 struct lpfc_grp_hdr *image;
12429 struct list_head dma_buffer_list;
12430 int i, rc = 0;
12431 struct lpfc_dmabuf *dmabuf, *next;
12432 uint32_t offset = 0, temp_offset = 0;
12433 uint32_t magic_number, ftype, fid, fsize;
12434
12435 /* It can be null in no-wait mode, sanity check */
12436 if (!fw) {
12437 rc = -ENXIO;
12438 goto out;
12439 }
12440 image = (struct lpfc_grp_hdr *)fw->data;
12441
12442 magic_number = be32_to_cpu(image->magic_number);
12443 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
12444 fid = bf_get_be32(lpfc_grp_hdr_id, image);
12445 fsize = be32_to_cpu(image->size);
12446
12447 INIT_LIST_HEAD(&dma_buffer_list);
12448 lpfc_decode_firmware_rev(phba, fwrev, 1);
12449 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
12450 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12451 "3023 Updating Firmware, Current Version:%s "
12452 "New Version:%s\n",
12453 fwrev, image->revision);
12454 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
12455 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
12456 GFP_KERNEL);
12457 if (!dmabuf) {
12458 rc = -ENOMEM;
12459 goto release_out;
12460 }
12461 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
12462 SLI4_PAGE_SIZE,
12463 &dmabuf->phys,
12464 GFP_KERNEL);
12465 if (!dmabuf->virt) {
12466 kfree(dmabuf);
12467 rc = -ENOMEM;
12468 goto release_out;
12469 }
12470 list_add_tail(&dmabuf->list, &dma_buffer_list);
12471 }
12472 while (offset < fw->size) {
12473 temp_offset = offset;
12474 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
12475 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
12476 memcpy(dmabuf->virt,
12477 fw->data + temp_offset,
12478 fw->size - temp_offset);
12479 temp_offset = fw->size;
12480 break;
12481 }
12482 memcpy(dmabuf->virt, fw->data + temp_offset,
12483 SLI4_PAGE_SIZE);
12484 temp_offset += SLI4_PAGE_SIZE;
12485 }
12486 rc = lpfc_wr_object(phba, &dma_buffer_list,
12487 (fw->size - offset), &offset);
12488 if (rc) {
12489 lpfc_log_write_firmware_error(phba, offset,
12490 magic_number, ftype, fid, fsize, fw);
12491 goto release_out;
12492 }
12493 }
12494 rc = offset;
12495 } else
12496 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12497 "3029 Skipped Firmware update, Current "
12498 "Version:%s New Version:%s\n",
12499 fwrev, image->revision);
12500
12501release_out:
12502 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
12503 list_del(&dmabuf->list);
12504 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
12505 dmabuf->virt, dmabuf->phys);
12506 kfree(dmabuf);
12507 }
12508 release_firmware(fw);
12509out:
12510 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12511 "3024 Firmware update done: %d.\n", rc);
12512 return;
12513}
12514
12515/**
12516 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
12517 * @phba: pointer to lpfc hba data structure.
12518 *
12519 * This routine is called to perform Linux generic firmware upgrade on device
12520 * that supports such feature.
12521 **/
12522int
12523lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
12524{
12525 uint8_t file_name[ELX_MODEL_NAME_SIZE];
12526 int ret;
12527 const struct firmware *fw;
12528
12529 /* Only supported on SLI4 interface type 2 for now */
12530 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
12531 LPFC_SLI_INTF_IF_TYPE_2)
12532 return -EPERM;
12533
12534 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
12535
12536 if (fw_upgrade == INT_FW_UPGRADE) {
12537 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
12538 file_name, &phba->pcidev->dev,
12539 GFP_KERNEL, (void *)phba,
12540 lpfc_write_firmware);
12541 } else if (fw_upgrade == RUN_FW_UPGRADE) {
12542 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
12543 if (!ret)
12544 lpfc_write_firmware(fw, (void *)phba);
12545 } else {
12546 ret = -EINVAL;
12547 }
12548
12549 return ret;
12550}
12551
12552/**
12553 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
12554 * @pdev: pointer to PCI device
12555 * @pid: pointer to PCI device identifier
12556 *
12557 * This routine is called from the kernel's PCI subsystem to device with
12558 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
12559 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
12560 * information of the device and driver to see if the driver state that it
12561 * can support this kind of device. If the match is successful, the driver
12562 * core invokes this routine. If this routine determines it can claim the HBA,
12563 * it does all the initialization that it needs to do to handle the HBA
12564 * properly.
12565 *
12566 * Return code
12567 * 0 - driver can claim the device
12568 * negative value - driver can not claim the device
12569 **/
12570static int
12571lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
12572{
12573 struct lpfc_hba *phba;
12574 struct lpfc_vport *vport = NULL;
12575 struct Scsi_Host *shost = NULL;
12576 int error;
12577 uint32_t cfg_mode, intr_mode;
12578
12579 /* Allocate memory for HBA structure */
12580 phba = lpfc_hba_alloc(pdev);
12581 if (!phba)
12582 return -ENOMEM;
12583
12584 /* Perform generic PCI device enabling operation */
12585 error = lpfc_enable_pci_dev(phba);
12586 if (error)
12587 goto out_free_phba;
12588
12589 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
12590 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
12591 if (error)
12592 goto out_disable_pci_dev;
12593
12594 /* Set up SLI-4 specific device PCI memory space */
12595 error = lpfc_sli4_pci_mem_setup(phba);
12596 if (error) {
12597 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12598 "1410 Failed to set up pci memory space.\n");
12599 goto out_disable_pci_dev;
12600 }
12601
12602 /* Set up SLI-4 Specific device driver resources */
12603 error = lpfc_sli4_driver_resource_setup(phba);
12604 if (error) {
12605 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12606 "1412 Failed to set up driver resource.\n");
12607 goto out_unset_pci_mem_s4;
12608 }
12609
12610 INIT_LIST_HEAD(&phba->active_rrq_list);
12611 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
12612
12613 /* Set up common device driver resources */
12614 error = lpfc_setup_driver_resource_phase2(phba);
12615 if (error) {
12616 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12617 "1414 Failed to set up driver resource.\n");
12618 goto out_unset_driver_resource_s4;
12619 }
12620
12621 /* Get the default values for Model Name and Description */
12622 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
12623
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012624 /* Now, trying to enable interrupt and bring up the device */
12625 cfg_mode = phba->cfg_use_msi;
12626
12627 /* Put device to a known state before enabling interrupt */
David Brazdil0f672f62019-12-10 10:32:29 +000012628 phba->pport = NULL;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012629 lpfc_stop_port(phba);
12630
12631 /* Configure and enable interrupt */
12632 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
12633 if (intr_mode == LPFC_INTR_ERROR) {
12634 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12635 "0426 Failed to enable interrupt.\n");
12636 error = -ENODEV;
David Brazdil0f672f62019-12-10 10:32:29 +000012637 goto out_unset_driver_resource;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012638 }
12639 /* Default to single EQ for non-MSI-X */
12640 if (phba->intr_type != MSIX) {
David Brazdil0f672f62019-12-10 10:32:29 +000012641 phba->cfg_irq_chann = 1;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012642 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012643 if (phba->nvmet_support)
12644 phba->cfg_nvmet_mrq = 1;
12645 }
David Brazdil0f672f62019-12-10 10:32:29 +000012646 }
12647 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
12648
12649 /* Create SCSI host to the physical port */
12650 error = lpfc_create_shost(phba);
12651 if (error) {
12652 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12653 "1415 Failed to create scsi host.\n");
12654 goto out_disable_intr;
12655 }
12656 vport = phba->pport;
12657 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
12658
12659 /* Configure sysfs attributes */
12660 error = lpfc_alloc_sysfs_attr(vport);
12661 if (error) {
12662 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12663 "1416 Failed to allocate sysfs attr\n");
12664 goto out_destroy_shost;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012665 }
12666
12667 /* Set up SLI-4 HBA */
12668 if (lpfc_sli4_hba_setup(phba)) {
12669 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12670 "1421 Failed to set up hba\n");
12671 error = -ENODEV;
David Brazdil0f672f62019-12-10 10:32:29 +000012672 goto out_free_sysfs_attr;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012673 }
12674
12675 /* Log the current active interrupt mode */
12676 phba->intr_mode = intr_mode;
12677 lpfc_log_intr_mode(phba, intr_mode);
12678
12679 /* Perform post initialization setup */
12680 lpfc_post_init_setup(phba);
12681
12682 /* NVME support in FW earlier in the driver load corrects the
12683 * FC4 type making a check for nvme_support unnecessary.
12684 */
David Brazdil0f672f62019-12-10 10:32:29 +000012685 if (phba->nvmet_support == 0) {
12686 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
12687 /* Create NVME binding with nvme_fc_transport. This
12688 * ensures the vport is initialized. If the localport
12689 * create fails, it should not unload the driver to
12690 * support field issues.
12691 */
12692 error = lpfc_nvme_create_localport(vport);
12693 if (error) {
12694 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12695 "6004 NVME registration "
12696 "failed, error x%x\n",
12697 error);
12698 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012699 }
12700 }
12701
12702 /* check for firmware upgrade or downgrade */
12703 if (phba->cfg_request_firmware_upgrade)
12704 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
12705
12706 /* Check if there are static vports to be created. */
12707 lpfc_create_static_vport(phba);
David Brazdil0f672f62019-12-10 10:32:29 +000012708
12709 /* Enable RAS FW log support */
12710 lpfc_sli4_ras_setup(phba);
12711
Olivier Deprez0e641232021-09-23 10:07:05 +020012712 INIT_LIST_HEAD(&phba->poll_list);
12713 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp);
12714
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012715 return 0;
12716
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012717out_free_sysfs_attr:
12718 lpfc_free_sysfs_attr(vport);
12719out_destroy_shost:
12720 lpfc_destroy_shost(phba);
David Brazdil0f672f62019-12-10 10:32:29 +000012721out_disable_intr:
12722 lpfc_sli4_disable_intr(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012723out_unset_driver_resource:
12724 lpfc_unset_driver_resource_phase2(phba);
12725out_unset_driver_resource_s4:
12726 lpfc_sli4_driver_resource_unset(phba);
12727out_unset_pci_mem_s4:
12728 lpfc_sli4_pci_mem_unset(phba);
12729out_disable_pci_dev:
12730 lpfc_disable_pci_dev(phba);
12731 if (shost)
12732 scsi_host_put(shost);
12733out_free_phba:
12734 lpfc_hba_free(phba);
12735 return error;
12736}
12737
12738/**
12739 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
12740 * @pdev: pointer to PCI device
12741 *
12742 * This routine is called from the kernel's PCI subsystem to device with
12743 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
12744 * removed from PCI bus, it performs all the necessary cleanup for the HBA
12745 * device to be removed from the PCI subsystem properly.
12746 **/
12747static void
12748lpfc_pci_remove_one_s4(struct pci_dev *pdev)
12749{
12750 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12751 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
12752 struct lpfc_vport **vports;
12753 struct lpfc_hba *phba = vport->phba;
12754 int i;
12755
12756 /* Mark the device unloading flag */
12757 spin_lock_irq(&phba->hbalock);
12758 vport->load_flag |= FC_UNLOADING;
12759 spin_unlock_irq(&phba->hbalock);
12760
12761 /* Free the HBA sysfs attributes */
12762 lpfc_free_sysfs_attr(vport);
12763
12764 /* Release all the vports against this physical port */
12765 vports = lpfc_create_vport_work_array(phba);
12766 if (vports != NULL)
12767 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
12768 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
12769 continue;
12770 fc_vport_terminate(vports[i]->fc_vport);
12771 }
12772 lpfc_destroy_vport_work_array(phba, vports);
12773
12774 /* Remove FC host and then SCSI host with the physical port */
12775 fc_remove_host(shost);
12776 scsi_remove_host(shost);
12777
12778 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
12779 * localports are destroyed after to cleanup all transport memory.
12780 */
12781 lpfc_cleanup(vport);
12782 lpfc_nvmet_destroy_targetport(phba);
12783 lpfc_nvme_destroy_localport(vport);
12784
David Brazdil0f672f62019-12-10 10:32:29 +000012785 /* De-allocate multi-XRI pools */
12786 if (phba->cfg_xri_rebalancing)
12787 lpfc_destroy_multixri_pools(phba);
12788
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012789 /*
12790 * Bring down the SLI Layer. This step disables all interrupts,
12791 * clears the rings, discards all mailbox commands, and resets
12792 * the HBA FCoE function.
12793 */
12794 lpfc_debugfs_terminate(vport);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012795
12796 lpfc_stop_hba_timers(phba);
David Brazdil0f672f62019-12-10 10:32:29 +000012797 spin_lock_irq(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012798 list_del_init(&vport->listentry);
David Brazdil0f672f62019-12-10 10:32:29 +000012799 spin_unlock_irq(&phba->port_list_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012800
12801 /* Perform scsi free before driver resource_unset since scsi
12802 * buffers are released to their corresponding pools here.
12803 */
David Brazdil0f672f62019-12-10 10:32:29 +000012804 lpfc_io_free(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012805 lpfc_free_iocb_list(phba);
David Brazdil0f672f62019-12-10 10:32:29 +000012806 lpfc_sli4_hba_unset(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012807
12808 lpfc_unset_driver_resource_phase2(phba);
12809 lpfc_sli4_driver_resource_unset(phba);
12810
12811 /* Unmap adapter Control and Doorbell registers */
12812 lpfc_sli4_pci_mem_unset(phba);
12813
12814 /* Release PCI resources and disable device's PCI function */
12815 scsi_host_put(shost);
12816 lpfc_disable_pci_dev(phba);
12817
12818 /* Finally, free the driver's device data structure */
12819 lpfc_hba_free(phba);
12820
12821 return;
12822}
12823
12824/**
12825 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
12826 * @pdev: pointer to PCI device
12827 * @msg: power management message
12828 *
12829 * This routine is called from the kernel's PCI subsystem to support system
12830 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
12831 * this method, it quiesces the device by stopping the driver's worker
12832 * thread for the device, turning off device's interrupt and DMA, and bring
12833 * the device offline. Note that as the driver implements the minimum PM
12834 * requirements to a power-aware driver's PM support for suspend/resume -- all
12835 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
12836 * method call will be treated as SUSPEND and the driver will fully
12837 * reinitialize its device during resume() method call, the driver will set
12838 * device to PCI_D3hot state in PCI config space instead of setting it
12839 * according to the @msg provided by the PM.
12840 *
12841 * Return code
12842 * 0 - driver suspended the device
12843 * Error otherwise
12844 **/
12845static int
12846lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
12847{
12848 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12849 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12850
12851 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12852 "2843 PCI device Power Management suspend.\n");
12853
12854 /* Bring down the device */
12855 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
12856 lpfc_offline(phba);
12857 kthread_stop(phba->worker_thread);
12858
12859 /* Disable interrupt from device */
12860 lpfc_sli4_disable_intr(phba);
12861 lpfc_sli4_queue_destroy(phba);
12862
12863 /* Save device state to PCI config space */
12864 pci_save_state(pdev);
12865 pci_set_power_state(pdev, PCI_D3hot);
12866
12867 return 0;
12868}
12869
12870/**
12871 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
12872 * @pdev: pointer to PCI device
12873 *
12874 * This routine is called from the kernel's PCI subsystem to support system
12875 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
12876 * this method, it restores the device's PCI config space state and fully
12877 * reinitializes the device and brings it online. Note that as the driver
12878 * implements the minimum PM requirements to a power-aware driver's PM for
12879 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
12880 * to the suspend() method call will be treated as SUSPEND and the driver
12881 * will fully reinitialize its device during resume() method call, the device
12882 * will be set to PCI_D0 directly in PCI config space before restoring the
12883 * state.
12884 *
12885 * Return code
12886 * 0 - driver suspended the device
12887 * Error otherwise
12888 **/
12889static int
12890lpfc_pci_resume_one_s4(struct pci_dev *pdev)
12891{
12892 struct Scsi_Host *shost = pci_get_drvdata(pdev);
12893 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
12894 uint32_t intr_mode;
12895 int error;
12896
12897 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12898 "0292 PCI device Power Management resume.\n");
12899
12900 /* Restore device state from PCI config space */
12901 pci_set_power_state(pdev, PCI_D0);
12902 pci_restore_state(pdev);
12903
12904 /*
12905 * As the new kernel behavior of pci_restore_state() API call clears
12906 * device saved_state flag, need to save the restored state again.
12907 */
12908 pci_save_state(pdev);
12909
12910 if (pdev->is_busmaster)
12911 pci_set_master(pdev);
12912
12913 /* Startup the kernel thread for this host adapter. */
12914 phba->worker_thread = kthread_run(lpfc_do_work, phba,
12915 "lpfc_worker_%d", phba->brd_no);
12916 if (IS_ERR(phba->worker_thread)) {
12917 error = PTR_ERR(phba->worker_thread);
12918 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12919 "0293 PM resume failed to start worker "
12920 "thread: error=x%x.\n", error);
12921 return error;
12922 }
12923
12924 /* Configure and enable interrupt */
12925 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
12926 if (intr_mode == LPFC_INTR_ERROR) {
12927 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12928 "0294 PM resume Failed to enable interrupt\n");
12929 return -EIO;
12930 } else
12931 phba->intr_mode = intr_mode;
12932
12933 /* Restart HBA and bring it online */
12934 lpfc_sli_brdrestart(phba);
12935 lpfc_online(phba);
12936
12937 /* Log the current active interrupt mode */
12938 lpfc_log_intr_mode(phba, phba->intr_mode);
12939
12940 return 0;
12941}
12942
12943/**
12944 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
12945 * @phba: pointer to lpfc hba data structure.
12946 *
12947 * This routine is called to prepare the SLI4 device for PCI slot recover. It
12948 * aborts all the outstanding SCSI I/Os to the pci device.
12949 **/
12950static void
12951lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
12952{
12953 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12954 "2828 PCI channel I/O abort preparing for recovery\n");
12955 /*
12956 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
12957 * and let the SCSI mid-layer to retry them to recover.
12958 */
12959 lpfc_sli_abort_fcp_rings(phba);
12960}
12961
12962/**
12963 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
12964 * @phba: pointer to lpfc hba data structure.
12965 *
12966 * This routine is called to prepare the SLI4 device for PCI slot reset. It
12967 * disables the device interrupt and pci device, and aborts the internal FCP
12968 * pending I/Os.
12969 **/
12970static void
12971lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
12972{
12973 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12974 "2826 PCI channel disable preparing for reset\n");
12975
12976 /* Block any management I/Os to the device */
12977 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
12978
12979 /* Block all SCSI devices' I/Os on the host */
12980 lpfc_scsi_dev_block(phba);
12981
David Brazdil0f672f62019-12-10 10:32:29 +000012982 /* Flush all driver's outstanding I/Os as we are to reset */
12983 lpfc_sli_flush_io_rings(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012984
12985 /* stop all timers */
12986 lpfc_stop_hba_timers(phba);
12987
12988 /* Disable interrupt and pci device */
12989 lpfc_sli4_disable_intr(phba);
12990 lpfc_sli4_queue_destroy(phba);
12991 pci_disable_device(phba->pcidev);
12992}
12993
12994/**
12995 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
12996 * @phba: pointer to lpfc hba data structure.
12997 *
12998 * This routine is called to prepare the SLI4 device for PCI slot permanently
12999 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
13000 * pending I/Os.
13001 **/
13002static void
13003lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
13004{
13005 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13006 "2827 PCI channel permanent disable for failure\n");
13007
13008 /* Block all SCSI devices' I/Os on the host */
13009 lpfc_scsi_dev_block(phba);
13010
13011 /* stop all timers */
13012 lpfc_stop_hba_timers(phba);
13013
David Brazdil0f672f62019-12-10 10:32:29 +000013014 /* Clean up all driver's outstanding I/Os */
13015 lpfc_sli_flush_io_rings(phba);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013016}
13017
13018/**
13019 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
13020 * @pdev: pointer to PCI device.
13021 * @state: the current PCI connection state.
13022 *
13023 * This routine is called from the PCI subsystem for error handling to device
13024 * with SLI-4 interface spec. This function is called by the PCI subsystem
13025 * after a PCI bus error affecting this device has been detected. When this
13026 * function is invoked, it will need to stop all the I/Os and interrupt(s)
13027 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
13028 * for the PCI subsystem to perform proper recovery as desired.
13029 *
13030 * Return codes
13031 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
13032 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
13033 **/
13034static pci_ers_result_t
13035lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
13036{
13037 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13038 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13039
13040 switch (state) {
13041 case pci_channel_io_normal:
13042 /* Non-fatal error, prepare for recovery */
13043 lpfc_sli4_prep_dev_for_recover(phba);
13044 return PCI_ERS_RESULT_CAN_RECOVER;
13045 case pci_channel_io_frozen:
13046 /* Fatal error, prepare for slot reset */
13047 lpfc_sli4_prep_dev_for_reset(phba);
13048 return PCI_ERS_RESULT_NEED_RESET;
13049 case pci_channel_io_perm_failure:
13050 /* Permanent failure, prepare for device down */
13051 lpfc_sli4_prep_dev_for_perm_failure(phba);
13052 return PCI_ERS_RESULT_DISCONNECT;
13053 default:
13054 /* Unknown state, prepare and request slot reset */
13055 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13056 "2825 Unknown PCI error state: x%x\n", state);
13057 lpfc_sli4_prep_dev_for_reset(phba);
13058 return PCI_ERS_RESULT_NEED_RESET;
13059 }
13060}
13061
13062/**
13063 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
13064 * @pdev: pointer to PCI device.
13065 *
13066 * This routine is called from the PCI subsystem for error handling to device
13067 * with SLI-4 interface spec. It is called after PCI bus has been reset to
13068 * restart the PCI card from scratch, as if from a cold-boot. During the
13069 * PCI subsystem error recovery, after the driver returns
13070 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
13071 * recovery and then call this routine before calling the .resume method to
13072 * recover the device. This function will initialize the HBA device, enable
13073 * the interrupt, but it will just put the HBA to offline state without
13074 * passing any I/O traffic.
13075 *
13076 * Return codes
13077 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
13078 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
13079 */
13080static pci_ers_result_t
13081lpfc_io_slot_reset_s4(struct pci_dev *pdev)
13082{
13083 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13084 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13085 struct lpfc_sli *psli = &phba->sli;
13086 uint32_t intr_mode;
13087
13088 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
13089 if (pci_enable_device_mem(pdev)) {
13090 printk(KERN_ERR "lpfc: Cannot re-enable "
13091 "PCI device after reset.\n");
13092 return PCI_ERS_RESULT_DISCONNECT;
13093 }
13094
13095 pci_restore_state(pdev);
13096
13097 /*
13098 * As the new kernel behavior of pci_restore_state() API call clears
13099 * device saved_state flag, need to save the restored state again.
13100 */
13101 pci_save_state(pdev);
13102
13103 if (pdev->is_busmaster)
13104 pci_set_master(pdev);
13105
13106 spin_lock_irq(&phba->hbalock);
13107 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
13108 spin_unlock_irq(&phba->hbalock);
13109
13110 /* Configure and enable interrupt */
13111 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
13112 if (intr_mode == LPFC_INTR_ERROR) {
13113 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13114 "2824 Cannot re-enable interrupt after "
13115 "slot reset.\n");
13116 return PCI_ERS_RESULT_DISCONNECT;
13117 } else
13118 phba->intr_mode = intr_mode;
13119
13120 /* Log the current active interrupt mode */
13121 lpfc_log_intr_mode(phba, phba->intr_mode);
13122
13123 return PCI_ERS_RESULT_RECOVERED;
13124}
13125
13126/**
13127 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
13128 * @pdev: pointer to PCI device
13129 *
13130 * This routine is called from the PCI subsystem for error handling to device
13131 * with SLI-4 interface spec. It is called when kernel error recovery tells
13132 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
13133 * error recovery. After this call, traffic can start to flow from this device
13134 * again.
13135 **/
13136static void
13137lpfc_io_resume_s4(struct pci_dev *pdev)
13138{
13139 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13140 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13141
13142 /*
13143 * In case of slot reset, as function reset is performed through
13144 * mailbox command which needs DMA to be enabled, this operation
13145 * has to be moved to the io resume phase. Taking device offline
13146 * will perform the necessary cleanup.
13147 */
13148 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
13149 /* Perform device reset */
13150 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
13151 lpfc_offline(phba);
13152 lpfc_sli_brdrestart(phba);
13153 /* Bring the device back online */
13154 lpfc_online(phba);
13155 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013156}
13157
13158/**
13159 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
13160 * @pdev: pointer to PCI device
13161 * @pid: pointer to PCI device identifier
13162 *
13163 * This routine is to be registered to the kernel's PCI subsystem. When an
13164 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
13165 * at PCI device-specific information of the device and driver to see if the
13166 * driver state that it can support this kind of device. If the match is
13167 * successful, the driver core invokes this routine. This routine dispatches
13168 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
13169 * do all the initialization that it needs to do to handle the HBA device
13170 * properly.
13171 *
13172 * Return code
13173 * 0 - driver can claim the device
13174 * negative value - driver can not claim the device
13175 **/
13176static int
13177lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
13178{
13179 int rc;
13180 struct lpfc_sli_intf intf;
13181
13182 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
13183 return -ENODEV;
13184
13185 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
13186 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
13187 rc = lpfc_pci_probe_one_s4(pdev, pid);
13188 else
13189 rc = lpfc_pci_probe_one_s3(pdev, pid);
13190
13191 return rc;
13192}
13193
13194/**
13195 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
13196 * @pdev: pointer to PCI device
13197 *
13198 * This routine is to be registered to the kernel's PCI subsystem. When an
13199 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
13200 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
13201 * remove routine, which will perform all the necessary cleanup for the
13202 * device to be removed from the PCI subsystem properly.
13203 **/
13204static void
13205lpfc_pci_remove_one(struct pci_dev *pdev)
13206{
13207 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13208 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13209
13210 switch (phba->pci_dev_grp) {
13211 case LPFC_PCI_DEV_LP:
13212 lpfc_pci_remove_one_s3(pdev);
13213 break;
13214 case LPFC_PCI_DEV_OC:
13215 lpfc_pci_remove_one_s4(pdev);
13216 break;
13217 default:
13218 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13219 "1424 Invalid PCI device group: 0x%x\n",
13220 phba->pci_dev_grp);
13221 break;
13222 }
13223 return;
13224}
13225
13226/**
13227 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
13228 * @pdev: pointer to PCI device
13229 * @msg: power management message
13230 *
13231 * This routine is to be registered to the kernel's PCI subsystem to support
13232 * system Power Management (PM). When PM invokes this method, it dispatches
13233 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
13234 * suspend the device.
13235 *
13236 * Return code
13237 * 0 - driver suspended the device
13238 * Error otherwise
13239 **/
13240static int
13241lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
13242{
13243 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13244 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13245 int rc = -ENODEV;
13246
13247 switch (phba->pci_dev_grp) {
13248 case LPFC_PCI_DEV_LP:
13249 rc = lpfc_pci_suspend_one_s3(pdev, msg);
13250 break;
13251 case LPFC_PCI_DEV_OC:
13252 rc = lpfc_pci_suspend_one_s4(pdev, msg);
13253 break;
13254 default:
13255 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13256 "1425 Invalid PCI device group: 0x%x\n",
13257 phba->pci_dev_grp);
13258 break;
13259 }
13260 return rc;
13261}
13262
13263/**
13264 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
13265 * @pdev: pointer to PCI device
13266 *
13267 * This routine is to be registered to the kernel's PCI subsystem to support
13268 * system Power Management (PM). When PM invokes this method, it dispatches
13269 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
13270 * resume the device.
13271 *
13272 * Return code
13273 * 0 - driver suspended the device
13274 * Error otherwise
13275 **/
13276static int
13277lpfc_pci_resume_one(struct pci_dev *pdev)
13278{
13279 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13280 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13281 int rc = -ENODEV;
13282
13283 switch (phba->pci_dev_grp) {
13284 case LPFC_PCI_DEV_LP:
13285 rc = lpfc_pci_resume_one_s3(pdev);
13286 break;
13287 case LPFC_PCI_DEV_OC:
13288 rc = lpfc_pci_resume_one_s4(pdev);
13289 break;
13290 default:
13291 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13292 "1426 Invalid PCI device group: 0x%x\n",
13293 phba->pci_dev_grp);
13294 break;
13295 }
13296 return rc;
13297}
13298
13299/**
13300 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
13301 * @pdev: pointer to PCI device.
13302 * @state: the current PCI connection state.
13303 *
13304 * This routine is registered to the PCI subsystem for error handling. This
13305 * function is called by the PCI subsystem after a PCI bus error affecting
13306 * this device has been detected. When this routine is invoked, it dispatches
13307 * the action to the proper SLI-3 or SLI-4 device error detected handling
13308 * routine, which will perform the proper error detected operation.
13309 *
13310 * Return codes
13311 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
13312 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
13313 **/
13314static pci_ers_result_t
13315lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
13316{
13317 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13318 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13319 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
13320
13321 switch (phba->pci_dev_grp) {
13322 case LPFC_PCI_DEV_LP:
13323 rc = lpfc_io_error_detected_s3(pdev, state);
13324 break;
13325 case LPFC_PCI_DEV_OC:
13326 rc = lpfc_io_error_detected_s4(pdev, state);
13327 break;
13328 default:
13329 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13330 "1427 Invalid PCI device group: 0x%x\n",
13331 phba->pci_dev_grp);
13332 break;
13333 }
13334 return rc;
13335}
13336
13337/**
13338 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
13339 * @pdev: pointer to PCI device.
13340 *
13341 * This routine is registered to the PCI subsystem for error handling. This
13342 * function is called after PCI bus has been reset to restart the PCI card
13343 * from scratch, as if from a cold-boot. When this routine is invoked, it
13344 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
13345 * routine, which will perform the proper device reset.
13346 *
13347 * Return codes
13348 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
13349 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
13350 **/
13351static pci_ers_result_t
13352lpfc_io_slot_reset(struct pci_dev *pdev)
13353{
13354 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13355 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13356 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
13357
13358 switch (phba->pci_dev_grp) {
13359 case LPFC_PCI_DEV_LP:
13360 rc = lpfc_io_slot_reset_s3(pdev);
13361 break;
13362 case LPFC_PCI_DEV_OC:
13363 rc = lpfc_io_slot_reset_s4(pdev);
13364 break;
13365 default:
13366 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13367 "1428 Invalid PCI device group: 0x%x\n",
13368 phba->pci_dev_grp);
13369 break;
13370 }
13371 return rc;
13372}
13373
13374/**
13375 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
13376 * @pdev: pointer to PCI device
13377 *
13378 * This routine is registered to the PCI subsystem for error handling. It
13379 * is called when kernel error recovery tells the lpfc driver that it is
13380 * OK to resume normal PCI operation after PCI bus error recovery. When
13381 * this routine is invoked, it dispatches the action to the proper SLI-3
13382 * or SLI-4 device io_resume routine, which will resume the device operation.
13383 **/
13384static void
13385lpfc_io_resume(struct pci_dev *pdev)
13386{
13387 struct Scsi_Host *shost = pci_get_drvdata(pdev);
13388 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
13389
13390 switch (phba->pci_dev_grp) {
13391 case LPFC_PCI_DEV_LP:
13392 lpfc_io_resume_s3(pdev);
13393 break;
13394 case LPFC_PCI_DEV_OC:
13395 lpfc_io_resume_s4(pdev);
13396 break;
13397 default:
13398 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13399 "1429 Invalid PCI device group: 0x%x\n",
13400 phba->pci_dev_grp);
13401 break;
13402 }
13403 return;
13404}
13405
13406/**
13407 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
13408 * @phba: pointer to lpfc hba data structure.
13409 *
13410 * This routine checks to see if OAS is supported for this adapter. If
13411 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
13412 * the enable oas flag is cleared and the pool created for OAS device data
13413 * is destroyed.
13414 *
13415 **/
David Brazdil0f672f62019-12-10 10:32:29 +000013416static void
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013417lpfc_sli4_oas_verify(struct lpfc_hba *phba)
13418{
13419
13420 if (!phba->cfg_EnableXLane)
13421 return;
13422
13423 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
13424 phba->cfg_fof = 1;
13425 } else {
13426 phba->cfg_fof = 0;
13427 if (phba->device_data_mem_pool)
13428 mempool_destroy(phba->device_data_mem_pool);
13429 phba->device_data_mem_pool = NULL;
13430 }
13431
13432 return;
13433}
13434
13435/**
David Brazdil0f672f62019-12-10 10:32:29 +000013436 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013437 * @phba: pointer to lpfc hba data structure.
13438 *
David Brazdil0f672f62019-12-10 10:32:29 +000013439 * This routine checks to see if RAS is supported by the adapter. Check the
13440 * function through which RAS support enablement is to be done.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013441 **/
David Brazdil0f672f62019-12-10 10:32:29 +000013442void
13443lpfc_sli4_ras_init(struct lpfc_hba *phba)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013444{
David Brazdil0f672f62019-12-10 10:32:29 +000013445 switch (phba->pcidev->device) {
13446 case PCI_DEVICE_ID_LANCER_G6_FC:
13447 case PCI_DEVICE_ID_LANCER_G7_FC:
13448 phba->ras_fwlog.ras_hwsupport = true;
13449 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
13450 phba->cfg_ras_fwlog_buffsize)
13451 phba->ras_fwlog.ras_enabled = true;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013452 else
David Brazdil0f672f62019-12-10 10:32:29 +000013453 phba->ras_fwlog.ras_enabled = false;
13454 break;
13455 default:
13456 phba->ras_fwlog.ras_hwsupport = false;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013457 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013458}
13459
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013460
13461MODULE_DEVICE_TABLE(pci, lpfc_id_table);
13462
13463static const struct pci_error_handlers lpfc_err_handler = {
13464 .error_detected = lpfc_io_error_detected,
13465 .slot_reset = lpfc_io_slot_reset,
13466 .resume = lpfc_io_resume,
13467};
13468
13469static struct pci_driver lpfc_driver = {
13470 .name = LPFC_DRIVER_NAME,
13471 .id_table = lpfc_id_table,
13472 .probe = lpfc_pci_probe_one,
13473 .remove = lpfc_pci_remove_one,
13474 .shutdown = lpfc_pci_remove_one,
13475 .suspend = lpfc_pci_suspend_one,
13476 .resume = lpfc_pci_resume_one,
13477 .err_handler = &lpfc_err_handler,
13478};
13479
13480static const struct file_operations lpfc_mgmt_fop = {
13481 .owner = THIS_MODULE,
13482};
13483
13484static struct miscdevice lpfc_mgmt_dev = {
13485 .minor = MISC_DYNAMIC_MINOR,
13486 .name = "lpfcmgmt",
13487 .fops = &lpfc_mgmt_fop,
13488};
13489
13490/**
13491 * lpfc_init - lpfc module initialization routine
13492 *
13493 * This routine is to be invoked when the lpfc module is loaded into the
13494 * kernel. The special kernel macro module_init() is used to indicate the
13495 * role of this routine to the kernel as lpfc module entry point.
13496 *
13497 * Return codes
13498 * 0 - successful
13499 * -ENOMEM - FC attach transport failed
13500 * all others - failed
13501 */
13502static int __init
13503lpfc_init(void)
13504{
13505 int error = 0;
13506
13507 printk(LPFC_MODULE_DESC "\n");
13508 printk(LPFC_COPYRIGHT "\n");
13509
13510 error = misc_register(&lpfc_mgmt_dev);
13511 if (error)
13512 printk(KERN_ERR "Could not register lpfcmgmt device, "
13513 "misc_register returned with status %d", error);
13514
13515 lpfc_transport_functions.vport_create = lpfc_vport_create;
13516 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
13517 lpfc_transport_template =
13518 fc_attach_transport(&lpfc_transport_functions);
13519 if (lpfc_transport_template == NULL)
13520 return -ENOMEM;
13521 lpfc_vport_transport_template =
13522 fc_attach_transport(&lpfc_vport_transport_functions);
13523 if (lpfc_vport_transport_template == NULL) {
13524 fc_release_transport(lpfc_transport_template);
13525 return -ENOMEM;
13526 }
13527 lpfc_nvme_cmd_template();
13528 lpfc_nvmet_cmd_template();
13529
13530 /* Initialize in case vector mapping is needed */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013531 lpfc_present_cpu = num_present_cpus();
13532
Olivier Deprez0e641232021-09-23 10:07:05 +020013533 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
13534 "lpfc/sli4:online",
13535 lpfc_cpu_online, lpfc_cpu_offline);
13536 if (error < 0)
13537 goto cpuhp_failure;
13538 lpfc_cpuhp_state = error;
13539
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013540 error = pci_register_driver(&lpfc_driver);
Olivier Deprez0e641232021-09-23 10:07:05 +020013541 if (error)
13542 goto unwind;
13543
13544 return error;
13545
13546unwind:
13547 cpuhp_remove_multi_state(lpfc_cpuhp_state);
13548cpuhp_failure:
13549 fc_release_transport(lpfc_transport_template);
13550 fc_release_transport(lpfc_vport_transport_template);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013551
13552 return error;
13553}
13554
13555/**
13556 * lpfc_exit - lpfc module removal routine
13557 *
13558 * This routine is invoked when the lpfc module is removed from the kernel.
13559 * The special kernel macro module_exit() is used to indicate the role of
13560 * this routine to the kernel as lpfc module exit point.
13561 */
13562static void __exit
13563lpfc_exit(void)
13564{
13565 misc_deregister(&lpfc_mgmt_dev);
13566 pci_unregister_driver(&lpfc_driver);
Olivier Deprez0e641232021-09-23 10:07:05 +020013567 cpuhp_remove_multi_state(lpfc_cpuhp_state);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013568 fc_release_transport(lpfc_transport_template);
13569 fc_release_transport(lpfc_vport_transport_template);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000013570 idr_destroy(&lpfc_hba_index);
13571}
13572
13573module_init(lpfc_init);
13574module_exit(lpfc_exit);
13575MODULE_LICENSE("GPL");
13576MODULE_DESCRIPTION(LPFC_MODULE_DESC);
13577MODULE_AUTHOR("Broadcom");
13578MODULE_VERSION("0:" LPFC_DRIVER_VERSION);