| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * TLB shootdown specifics for powerpc |
| 4 | * |
| 5 | * Copyright (C) 2002 Anton Blanchard, IBM Corp. |
| 6 | * Copyright (C) 2002 Paul Mackerras, IBM Corp. |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 7 | */ |
| 8 | #ifndef _ASM_POWERPC_TLB_H |
| 9 | #define _ASM_POWERPC_TLB_H |
| 10 | #ifdef __KERNEL__ |
| 11 | |
| 12 | #ifndef __powerpc64__ |
| 13 | #include <asm/pgtable.h> |
| 14 | #endif |
| 15 | #include <asm/pgalloc.h> |
| 16 | #ifndef __powerpc64__ |
| 17 | #include <asm/page.h> |
| 18 | #include <asm/mmu.h> |
| 19 | #endif |
| 20 | |
| 21 | #include <linux/pagemap.h> |
| 22 | |
| 23 | #define tlb_start_vma(tlb, vma) do { } while (0) |
| 24 | #define tlb_end_vma(tlb, vma) do { } while (0) |
| 25 | #define __tlb_remove_tlb_entry __tlb_remove_tlb_entry |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 26 | |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 27 | #define tlb_flush tlb_flush |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 28 | extern void tlb_flush(struct mmu_gather *tlb); |
| Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame^] | 29 | /* |
| 30 | * book3s: |
| 31 | * Hash does not use the linux page-tables, so we can avoid |
| 32 | * the TLB invalidate for page-table freeing, Radix otoh does use the |
| 33 | * page-tables and needs the TLBI. |
| 34 | * |
| 35 | * nohash: |
| 36 | * We still do TLB invalidate in the __pte_free_tlb routine before we |
| 37 | * add the page table pages to mmu gather table batch. |
| 38 | */ |
| 39 | #define tlb_needs_table_invalidate() radix_enabled() |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 40 | |
| 41 | /* Get the generic bits... */ |
| 42 | #include <asm-generic/tlb.h> |
| 43 | |
| 44 | extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, |
| 45 | unsigned long address); |
| 46 | |
| 47 | static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, |
| 48 | unsigned long address) |
| 49 | { |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 50 | #ifdef CONFIG_PPC_BOOK3S_32 |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 51 | if (pte_val(*ptep) & _PAGE_HASHPTE) |
| 52 | flush_hash_entry(tlb->mm, ptep, address); |
| 53 | #endif |
| 54 | } |
| 55 | |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 56 | #ifdef CONFIG_SMP |
| 57 | static inline int mm_is_core_local(struct mm_struct *mm) |
| 58 | { |
| 59 | return cpumask_subset(mm_cpumask(mm), |
| 60 | topology_sibling_cpumask(smp_processor_id())); |
| 61 | } |
| 62 | |
| 63 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 64 | static inline int mm_is_thread_local(struct mm_struct *mm) |
| 65 | { |
| 66 | if (atomic_read(&mm->context.active_cpus) > 1) |
| 67 | return false; |
| 68 | return cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm)); |
| 69 | } |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 70 | #else /* CONFIG_PPC_BOOK3S_64 */ |
| 71 | static inline int mm_is_thread_local(struct mm_struct *mm) |
| 72 | { |
| 73 | return cpumask_equal(mm_cpumask(mm), |
| 74 | cpumask_of(smp_processor_id())); |
| 75 | } |
| 76 | #endif /* !CONFIG_PPC_BOOK3S_64 */ |
| 77 | |
| 78 | #else /* CONFIG_SMP */ |
| 79 | static inline int mm_is_core_local(struct mm_struct *mm) |
| 80 | { |
| 81 | return 1; |
| 82 | } |
| 83 | |
| 84 | static inline int mm_is_thread_local(struct mm_struct *mm) |
| 85 | { |
| 86 | return 1; |
| 87 | } |
| 88 | #endif |
| 89 | |
| 90 | #endif /* __KERNEL__ */ |
| 91 | #endif /* __ASM_POWERPC_TLB_H */ |