David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * setup.c: Setup PNX833X Soc. |
| 4 | * |
| 5 | * Copyright 2008 NXP Semiconductors |
| 6 | * Chris Steel <chris.steel@nxp.com> |
| 7 | * Daniel Laird <daniel.j.laird@nxp.com> |
| 8 | * |
| 9 | * Based on software written by: |
| 10 | * Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code. |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 11 | */ |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/interrupt.h> |
| 14 | #include <linux/ioport.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/pci.h> |
| 17 | #include <asm/reboot.h> |
| 18 | #include <pnx833x.h> |
| 19 | #include <gpio.h> |
| 20 | |
| 21 | extern void pnx833x_board_setup(void); |
| 22 | extern void pnx833x_machine_restart(char *); |
| 23 | extern void pnx833x_machine_halt(void); |
| 24 | extern void pnx833x_machine_power_off(void); |
| 25 | |
| 26 | int __init plat_mem_setup(void) |
| 27 | { |
| 28 | /* set mips clock to 320MHz */ |
| 29 | #if defined(CONFIG_SOC_PNX8335) |
| 30 | PNX8335_WRITEFIELD(0x17, CLOCK_PLL_CPU_CTL, FREQ); |
| 31 | #endif |
| 32 | pnx833x_gpio_init(); /* so it will be ready in board_setup() */ |
| 33 | |
| 34 | pnx833x_board_setup(); |
| 35 | |
| 36 | _machine_restart = pnx833x_machine_restart; |
| 37 | _machine_halt = pnx833x_machine_halt; |
| 38 | pm_power_off = pnx833x_machine_power_off; |
| 39 | |
| 40 | /* IO/MEM resources. */ |
| 41 | set_io_port_base(KSEG1); |
| 42 | ioport_resource.start = 0; |
| 43 | ioport_resource.end = ~0; |
| 44 | iomem_resource.start = 0; |
| 45 | iomem_resource.end = ~0; |
| 46 | |
| 47 | return 0; |
| 48 | } |