Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 1 | //== llvm/CodeGen/GlobalISel/InstructionSelect.h -----------------*- C++ -*-==// |
| 2 | // |
Andrew Walbran | 16937d0 | 2019-10-22 13:54:20 +0100 | [diff] [blame] | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | /// \file This file describes the interface of the MachineFunctionPass |
| 9 | /// responsible for selecting (possibly generic) machine instructions to |
| 10 | /// target-specific instructions. |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECT_H |
| 14 | #define LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECT_H |
| 15 | |
| 16 | #include "llvm/CodeGen/GlobalISel/InstructionSelector.h" |
| 17 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 18 | |
| 19 | namespace llvm { |
| 20 | /// This pass is responsible for selecting generic machine instructions to |
| 21 | /// target-specific instructions. It relies on the InstructionSelector provided |
| 22 | /// by the target. |
| 23 | /// Selection is done by examining blocks in post-order, and instructions in |
| 24 | /// reverse order. |
| 25 | /// |
| 26 | /// \post for all inst in MF: not isPreISelGenericOpcode(inst.opcode) |
| 27 | class InstructionSelect : public MachineFunctionPass { |
| 28 | public: |
| 29 | static char ID; |
| 30 | StringRef getPassName() const override { return "InstructionSelect"; } |
| 31 | |
| 32 | void getAnalysisUsage(AnalysisUsage &AU) const override; |
| 33 | |
| 34 | MachineFunctionProperties getRequiredProperties() const override { |
| 35 | return MachineFunctionProperties() |
| 36 | .set(MachineFunctionProperties::Property::IsSSA) |
| 37 | .set(MachineFunctionProperties::Property::Legalized) |
| 38 | .set(MachineFunctionProperties::Property::RegBankSelected); |
| 39 | } |
| 40 | |
| 41 | MachineFunctionProperties getSetProperties() const override { |
| 42 | return MachineFunctionProperties().set( |
| 43 | MachineFunctionProperties::Property::Selected); |
| 44 | } |
| 45 | |
| 46 | InstructionSelect(); |
| 47 | |
| 48 | bool runOnMachineFunction(MachineFunction &MF) override; |
| 49 | }; |
| 50 | } // End namespace llvm. |
| 51 | |
| 52 | #endif |