blob: a7e1a752d081011ffee2d9896a2dbf1925d983e6 [file] [log] [blame]
Andrew Scull5e1ddfa2018-08-14 10:06:54 +01001//===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
2//
Andrew Walbran16937d02019-10-22 13:54:20 +01003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Andrew Scull5e1ddfa2018-08-14 10:06:54 +01006//
7//===----------------------------------------------------------------------===//
8//
9// This file implements a target parser to recognise hardware features such as
10// FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_SUPPORT_TARGETPARSER_H
15#define LLVM_SUPPORT_TARGETPARSER_H
16
17// FIXME: vector is used because that's what clang uses for subtarget feature
18// lists, but SmallVector would probably be better
19#include "llvm/ADT/Triple.h"
Andrew Walbran16937d02019-10-22 13:54:20 +010020#include "llvm/Support/ARMTargetParser.h"
21#include "llvm/Support/AArch64TargetParser.h"
Andrew Scull5e1ddfa2018-08-14 10:06:54 +010022#include <vector>
23
24namespace llvm {
25class StringRef;
26
Andrew Walbran16937d02019-10-22 13:54:20 +010027// Target specific information in their own namespaces.
28// (ARM/AArch64 are declared in ARM/AArch64TargetParser.h)
29// These should be generated from TableGen because the information is already
30// there, and there is where new information about targets will be added.
Andrew Scull5e1ddfa2018-08-14 10:06:54 +010031// FIXME: To TableGen this we need to make some table generated files available
32// even if the back-end is not compiled with LLVM, plus we need to create a new
33// back-end to TableGen to create these clean tables.
Andrew Scull5e1ddfa2018-08-14 10:06:54 +010034namespace X86 {
35
36// This should be kept in sync with libcc/compiler-rt as its included by clang
37// as a proxy for what's in libgcc/compiler-rt.
38enum ProcessorVendors : unsigned {
39 VENDOR_DUMMY,
40#define X86_VENDOR(ENUM, STRING) \
41 ENUM,
42#include "llvm/Support/X86TargetParser.def"
43 VENDOR_OTHER
44};
45
46// This should be kept in sync with libcc/compiler-rt as its included by clang
47// as a proxy for what's in libgcc/compiler-rt.
48enum ProcessorTypes : unsigned {
49 CPU_TYPE_DUMMY,
50#define X86_CPU_TYPE(ARCHNAME, ENUM) \
51 ENUM,
52#include "llvm/Support/X86TargetParser.def"
53 CPU_TYPE_MAX
54};
55
56// This should be kept in sync with libcc/compiler-rt as its included by clang
57// as a proxy for what's in libgcc/compiler-rt.
58enum ProcessorSubtypes : unsigned {
59 CPU_SUBTYPE_DUMMY,
60#define X86_CPU_SUBTYPE(ARCHNAME, ENUM) \
61 ENUM,
62#include "llvm/Support/X86TargetParser.def"
63 CPU_SUBTYPE_MAX
64};
65
66// This should be kept in sync with libcc/compiler-rt as it should be used
67// by clang as a proxy for what's in libgcc/compiler-rt.
68enum ProcessorFeatures {
69#define X86_FEATURE(VAL, ENUM) \
70 ENUM = VAL,
71#include "llvm/Support/X86TargetParser.def"
72
73};
74
75} // namespace X86
76
Andrew Scull0372a572018-11-16 15:47:06 +000077namespace AMDGPU {
78
79/// GPU kinds supported by the AMDGPU target.
80enum GPUKind : uint32_t {
81 // Not specified processor.
82 GK_NONE = 0,
83
84 // R600-based processors.
85 GK_R600 = 1,
86 GK_R630 = 2,
87 GK_RS880 = 3,
88 GK_RV670 = 4,
89 GK_RV710 = 5,
90 GK_RV730 = 6,
91 GK_RV770 = 7,
92 GK_CEDAR = 8,
93 GK_CYPRESS = 9,
94 GK_JUNIPER = 10,
95 GK_REDWOOD = 11,
96 GK_SUMO = 12,
97 GK_BARTS = 13,
98 GK_CAICOS = 14,
99 GK_CAYMAN = 15,
100 GK_TURKS = 16,
101
102 GK_R600_FIRST = GK_R600,
103 GK_R600_LAST = GK_TURKS,
104
105 // AMDGCN-based processors.
106 GK_GFX600 = 32,
107 GK_GFX601 = 33,
108
109 GK_GFX700 = 40,
110 GK_GFX701 = 41,
111 GK_GFX702 = 42,
112 GK_GFX703 = 43,
113 GK_GFX704 = 44,
114
115 GK_GFX801 = 50,
116 GK_GFX802 = 51,
117 GK_GFX803 = 52,
118 GK_GFX810 = 53,
119
120 GK_GFX900 = 60,
121 GK_GFX902 = 61,
122 GK_GFX904 = 62,
123 GK_GFX906 = 63,
Andrew Walbran3d2c1972020-04-07 12:24:26 +0100124 GK_GFX908 = 64,
Andrew Walbran16937d02019-10-22 13:54:20 +0100125 GK_GFX909 = 65,
Andrew Scull0372a572018-11-16 15:47:06 +0000126
Andrew Walbran3d2c1972020-04-07 12:24:26 +0100127 GK_GFX1010 = 71,
128 GK_GFX1011 = 72,
129 GK_GFX1012 = 73,
130
Andrew Scull0372a572018-11-16 15:47:06 +0000131 GK_AMDGCN_FIRST = GK_GFX600,
Andrew Walbran3d2c1972020-04-07 12:24:26 +0100132 GK_AMDGCN_LAST = GK_GFX1012,
Andrew Scull0372a572018-11-16 15:47:06 +0000133};
134
135/// Instruction set architecture version.
136struct IsaVersion {
137 unsigned Major;
138 unsigned Minor;
139 unsigned Stepping;
140};
141
142// This isn't comprehensive for now, just things that are needed from the
143// frontend driver.
144enum ArchFeatureKind : uint32_t {
145 FEATURE_NONE = 0,
146
147 // These features only exist for r600, and are implied true for amdgcn.
148 FEATURE_FMA = 1 << 1,
149 FEATURE_LDEXP = 1 << 2,
150 FEATURE_FP64 = 1 << 3,
151
152 // Common features.
153 FEATURE_FAST_FMA_F32 = 1 << 4,
154 FEATURE_FAST_DENORMAL_F32 = 1 << 5
155};
156
157StringRef getArchNameAMDGCN(GPUKind AK);
158StringRef getArchNameR600(GPUKind AK);
159StringRef getCanonicalArchName(StringRef Arch);
160GPUKind parseArchAMDGCN(StringRef CPU);
161GPUKind parseArchR600(StringRef CPU);
162unsigned getArchAttrAMDGCN(GPUKind AK);
163unsigned getArchAttrR600(GPUKind AK);
164
165void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values);
166void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
167
168IsaVersion getIsaVersion(StringRef GPU);
169
170} // namespace AMDGPU
171
Andrew Scull5e1ddfa2018-08-14 10:06:54 +0100172} // namespace llvm
173
174#endif