Andrew Walbran | 16937d0 | 2019-10-22 13:54:20 +0100 | [diff] [blame] | 1 | //===- llvm/CodeGen/MachineInstrBundle.h - MI bundle utilities --*- C++ -*-===// |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 2 | // |
Andrew Walbran | 16937d0 | 2019-10-22 13:54:20 +0100 | [diff] [blame] | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file provide utility functions to manipulate machine instruction |
| 10 | // bundles. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef LLVM_CODEGEN_MACHINEINSTRBUNDLE_H |
| 15 | #define LLVM_CODEGEN_MACHINEINSTRBUNDLE_H |
| 16 | |
| 17 | #include "llvm/CodeGen/MachineBasicBlock.h" |
| 18 | |
| 19 | namespace llvm { |
| 20 | |
| 21 | /// finalizeBundle - Finalize a machine instruction bundle which includes |
| 22 | /// a sequence of instructions starting from FirstMI to LastMI (exclusive). |
| 23 | /// This routine adds a BUNDLE instruction to represent the bundle, it adds |
| 24 | /// IsInternalRead markers to MachineOperands which are defined inside the |
| 25 | /// bundle, and it copies externally visible defs and uses to the BUNDLE |
| 26 | /// instruction. |
| 27 | void finalizeBundle(MachineBasicBlock &MBB, |
| 28 | MachineBasicBlock::instr_iterator FirstMI, |
| 29 | MachineBasicBlock::instr_iterator LastMI); |
| 30 | |
| 31 | /// finalizeBundle - Same functionality as the previous finalizeBundle except |
| 32 | /// the last instruction in the bundle is not provided as an input. This is |
| 33 | /// used in cases where bundles are pre-determined by marking instructions |
| 34 | /// with 'InsideBundle' marker. It returns the MBB instruction iterator that |
| 35 | /// points to the end of the bundle. |
| 36 | MachineBasicBlock::instr_iterator finalizeBundle(MachineBasicBlock &MBB, |
| 37 | MachineBasicBlock::instr_iterator FirstMI); |
| 38 | |
| 39 | /// finalizeBundles - Finalize instruction bundles in the specified |
| 40 | /// MachineFunction. Return true if any bundles are finalized. |
| 41 | bool finalizeBundles(MachineFunction &MF); |
| 42 | |
| 43 | /// Returns an iterator to the first instruction in the bundle containing \p I. |
| 44 | inline MachineBasicBlock::instr_iterator getBundleStart( |
| 45 | MachineBasicBlock::instr_iterator I) { |
| 46 | while (I->isBundledWithPred()) |
| 47 | --I; |
| 48 | return I; |
| 49 | } |
| 50 | |
| 51 | /// Returns an iterator to the first instruction in the bundle containing \p I. |
| 52 | inline MachineBasicBlock::const_instr_iterator getBundleStart( |
| 53 | MachineBasicBlock::const_instr_iterator I) { |
| 54 | while (I->isBundledWithPred()) |
| 55 | --I; |
| 56 | return I; |
| 57 | } |
| 58 | |
| 59 | /// Returns an iterator pointing beyond the bundle containing \p I. |
| 60 | inline MachineBasicBlock::instr_iterator getBundleEnd( |
| 61 | MachineBasicBlock::instr_iterator I) { |
| 62 | while (I->isBundledWithSucc()) |
| 63 | ++I; |
Andrew Walbran | 3d2c197 | 2020-04-07 12:24:26 +0100 | [diff] [blame^] | 64 | ++I; |
| 65 | return I; |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | /// Returns an iterator pointing beyond the bundle containing \p I. |
| 69 | inline MachineBasicBlock::const_instr_iterator getBundleEnd( |
| 70 | MachineBasicBlock::const_instr_iterator I) { |
| 71 | while (I->isBundledWithSucc()) |
| 72 | ++I; |
Andrew Walbran | 3d2c197 | 2020-04-07 12:24:26 +0100 | [diff] [blame^] | 73 | ++I; |
| 74 | return I; |
Andrew Scull | 5e1ddfa | 2018-08-14 10:06:54 +0100 | [diff] [blame] | 75 | } |
| 76 | |
| 77 | //===----------------------------------------------------------------------===// |
| 78 | // MachineOperand iterator |
| 79 | // |
| 80 | |
| 81 | /// MachineOperandIteratorBase - Iterator that can visit all operands on a |
| 82 | /// MachineInstr, or all operands on a bundle of MachineInstrs. This class is |
| 83 | /// not intended to be used directly, use one of the sub-classes instead. |
| 84 | /// |
| 85 | /// Intended use: |
| 86 | /// |
| 87 | /// for (MIBundleOperands MIO(MI); MIO.isValid(); ++MIO) { |
| 88 | /// if (!MIO->isReg()) |
| 89 | /// continue; |
| 90 | /// ... |
| 91 | /// } |
| 92 | /// |
| 93 | class MachineOperandIteratorBase { |
| 94 | MachineBasicBlock::instr_iterator InstrI, InstrE; |
| 95 | MachineInstr::mop_iterator OpI, OpE; |
| 96 | |
| 97 | // If the operands on InstrI are exhausted, advance InstrI to the next |
| 98 | // bundled instruction with operands. |
| 99 | void advance() { |
| 100 | while (OpI == OpE) { |
| 101 | // Don't advance off the basic block, or into a new bundle. |
| 102 | if (++InstrI == InstrE || !InstrI->isInsideBundle()) |
| 103 | break; |
| 104 | OpI = InstrI->operands_begin(); |
| 105 | OpE = InstrI->operands_end(); |
| 106 | } |
| 107 | } |
| 108 | |
| 109 | protected: |
| 110 | /// MachineOperandIteratorBase - Create an iterator that visits all operands |
| 111 | /// on MI, or all operands on every instruction in the bundle containing MI. |
| 112 | /// |
| 113 | /// @param MI The instruction to examine. |
| 114 | /// @param WholeBundle When true, visit all operands on the entire bundle. |
| 115 | /// |
| 116 | explicit MachineOperandIteratorBase(MachineInstr &MI, bool WholeBundle) { |
| 117 | if (WholeBundle) { |
| 118 | InstrI = getBundleStart(MI.getIterator()); |
| 119 | InstrE = MI.getParent()->instr_end(); |
| 120 | } else { |
| 121 | InstrI = InstrE = MI.getIterator(); |
| 122 | ++InstrE; |
| 123 | } |
| 124 | OpI = InstrI->operands_begin(); |
| 125 | OpE = InstrI->operands_end(); |
| 126 | if (WholeBundle) |
| 127 | advance(); |
| 128 | } |
| 129 | |
| 130 | MachineOperand &deref() const { return *OpI; } |
| 131 | |
| 132 | public: |
| 133 | /// isValid - Returns true until all the operands have been visited. |
| 134 | bool isValid() const { return OpI != OpE; } |
| 135 | |
| 136 | /// Preincrement. Move to the next operand. |
| 137 | void operator++() { |
| 138 | assert(isValid() && "Cannot advance MIOperands beyond the last operand"); |
| 139 | ++OpI; |
| 140 | advance(); |
| 141 | } |
| 142 | |
| 143 | /// getOperandNo - Returns the number of the current operand relative to its |
| 144 | /// instruction. |
| 145 | /// |
| 146 | unsigned getOperandNo() const { |
| 147 | return OpI - InstrI->operands_begin(); |
| 148 | } |
| 149 | |
| 150 | /// VirtRegInfo - Information about a virtual register used by a set of operands. |
| 151 | /// |
| 152 | struct VirtRegInfo { |
| 153 | /// Reads - One of the operands read the virtual register. This does not |
| 154 | /// include undef or internal use operands, see MO::readsReg(). |
| 155 | bool Reads; |
| 156 | |
| 157 | /// Writes - One of the operands writes the virtual register. |
| 158 | bool Writes; |
| 159 | |
| 160 | /// Tied - Uses and defs must use the same register. This can be because of |
| 161 | /// a two-address constraint, or there may be a partial redefinition of a |
| 162 | /// sub-register. |
| 163 | bool Tied; |
| 164 | }; |
| 165 | |
| 166 | /// Information about how a physical register Reg is used by a set of |
| 167 | /// operands. |
| 168 | struct PhysRegInfo { |
| 169 | /// There is a regmask operand indicating Reg is clobbered. |
| 170 | /// \see MachineOperand::CreateRegMask(). |
| 171 | bool Clobbered; |
| 172 | |
| 173 | /// Reg or one of its aliases is defined. The definition may only cover |
| 174 | /// parts of the register. |
| 175 | bool Defined; |
| 176 | /// Reg or a super-register is defined. The definition covers the full |
| 177 | /// register. |
| 178 | bool FullyDefined; |
| 179 | |
| 180 | /// Reg or one of its aliases is read. The register may only be read |
| 181 | /// partially. |
| 182 | bool Read; |
| 183 | /// Reg or a super-register is read. The full register is read. |
| 184 | bool FullyRead; |
| 185 | |
| 186 | /// Either: |
| 187 | /// - Reg is FullyDefined and all defs of reg or an overlapping |
| 188 | /// register are dead, or |
| 189 | /// - Reg is completely dead because "defined" by a clobber. |
| 190 | bool DeadDef; |
| 191 | |
| 192 | /// Reg is Defined and all defs of reg or an overlapping register are |
| 193 | /// dead. |
| 194 | bool PartialDeadDef; |
| 195 | |
| 196 | /// There is a use operand of reg or a super-register with kill flag set. |
| 197 | bool Killed; |
| 198 | }; |
| 199 | |
| 200 | /// analyzeVirtReg - Analyze how the current instruction or bundle uses a |
| 201 | /// virtual register. This function should not be called after operator++(), |
| 202 | /// it expects a fresh iterator. |
| 203 | /// |
| 204 | /// @param Reg The virtual register to analyze. |
| 205 | /// @param Ops When set, this vector will receive an (MI, OpNum) entry for |
| 206 | /// each operand referring to Reg. |
| 207 | /// @returns A filled-in RegInfo struct. |
| 208 | VirtRegInfo analyzeVirtReg(unsigned Reg, |
| 209 | SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops = nullptr); |
| 210 | |
| 211 | /// analyzePhysReg - Analyze how the current instruction or bundle uses a |
| 212 | /// physical register. This function should not be called after operator++(), |
| 213 | /// it expects a fresh iterator. |
| 214 | /// |
| 215 | /// @param Reg The physical register to analyze. |
| 216 | /// @returns A filled-in PhysRegInfo struct. |
| 217 | PhysRegInfo analyzePhysReg(unsigned Reg, const TargetRegisterInfo *TRI); |
| 218 | }; |
| 219 | |
| 220 | /// MIOperands - Iterate over operands of a single instruction. |
| 221 | /// |
| 222 | class MIOperands : public MachineOperandIteratorBase { |
| 223 | public: |
| 224 | MIOperands(MachineInstr &MI) : MachineOperandIteratorBase(MI, false) {} |
| 225 | MachineOperand &operator* () const { return deref(); } |
| 226 | MachineOperand *operator->() const { return &deref(); } |
| 227 | }; |
| 228 | |
| 229 | /// ConstMIOperands - Iterate over operands of a single const instruction. |
| 230 | /// |
| 231 | class ConstMIOperands : public MachineOperandIteratorBase { |
| 232 | public: |
| 233 | ConstMIOperands(const MachineInstr &MI) |
| 234 | : MachineOperandIteratorBase(const_cast<MachineInstr &>(MI), false) {} |
| 235 | const MachineOperand &operator* () const { return deref(); } |
| 236 | const MachineOperand *operator->() const { return &deref(); } |
| 237 | }; |
| 238 | |
| 239 | /// MIBundleOperands - Iterate over all operands in a bundle of machine |
| 240 | /// instructions. |
| 241 | /// |
| 242 | class MIBundleOperands : public MachineOperandIteratorBase { |
| 243 | public: |
| 244 | MIBundleOperands(MachineInstr &MI) : MachineOperandIteratorBase(MI, true) {} |
| 245 | MachineOperand &operator* () const { return deref(); } |
| 246 | MachineOperand *operator->() const { return &deref(); } |
| 247 | }; |
| 248 | |
| 249 | /// ConstMIBundleOperands - Iterate over all operands in a const bundle of |
| 250 | /// machine instructions. |
| 251 | /// |
| 252 | class ConstMIBundleOperands : public MachineOperandIteratorBase { |
| 253 | public: |
| 254 | ConstMIBundleOperands(const MachineInstr &MI) |
| 255 | : MachineOperandIteratorBase(const_cast<MachineInstr &>(MI), true) {} |
| 256 | const MachineOperand &operator* () const { return deref(); } |
| 257 | const MachineOperand *operator->() const { return &deref(); } |
| 258 | }; |
| 259 | |
| 260 | } // End llvm namespace |
| 261 | |
| 262 | #endif |