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Andrew Scull0372a572018-11-16 15:47:06 +00001//===- JITTargetMachineBuilder.h - Build TargetMachines for JIT -*- C++ -*-===//
2//
Andrew Walbran16937d02019-10-22 13:54:20 +01003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Andrew Scull0372a572018-11-16 15:47:06 +00006//
7//===----------------------------------------------------------------------===//
8//
9// A utitily for building TargetMachines for JITs.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_EXECUTIONENGINE_ORC_JITTARGETMACHINEBUILDER_H
14#define LLVM_EXECUTIONENGINE_ORC_JITTARGETMACHINEBUILDER_H
15
16#include "llvm/ADT/Optional.h"
17#include "llvm/ADT/Triple.h"
18#include "llvm/MC/SubtargetFeature.h"
19#include "llvm/Support/CodeGen.h"
20#include "llvm/Support/Error.h"
21#include "llvm/Target/TargetMachine.h"
22#include "llvm/Target/TargetOptions.h"
23#include <memory>
24#include <string>
25#include <vector>
26
27namespace llvm {
28namespace orc {
29
30/// A utility class for building TargetMachines for JITs.
31class JITTargetMachineBuilder {
32public:
33 /// Create a JITTargetMachineBuilder based on the given triple.
34 ///
35 /// Note: TargetOptions is default-constructed, then EmulatedTLS and
36 /// ExplicitEmulatedTLS are set to true. If EmulatedTLS is not
37 /// required, these values should be reset before calling
38 /// createTargetMachine.
39 JITTargetMachineBuilder(Triple TT);
40
41 /// Create a JITTargetMachineBuilder for the host system.
42 ///
43 /// Note: TargetOptions is default-constructed, then EmulatedTLS and
44 /// ExplicitEmulatedTLS are set to true. If EmulatedTLS is not
45 /// required, these values should be reset before calling
46 /// createTargetMachine.
47 static Expected<JITTargetMachineBuilder> detectHost();
48
49 /// Create a TargetMachine.
50 ///
51 /// This operation will fail if the requested target is not registered,
52 /// in which case see llvm/Support/TargetSelect.h. To JIT IR the Target and
53 /// the target's AsmPrinter must both be registered. To JIT assembly
54 /// (including inline and module level assembly) the target's AsmParser must
55 /// also be registered.
56 Expected<std::unique_ptr<TargetMachine>> createTargetMachine();
57
58 /// Get the default DataLayout for the target.
59 ///
60 /// Note: This is reasonably expensive, as it creates a temporary
61 /// TargetMachine instance under the hood. It is only suitable for use during
62 /// JIT setup.
63 Expected<DataLayout> getDefaultDataLayoutForTarget() {
64 auto TM = createTargetMachine();
65 if (!TM)
66 return TM.takeError();
67 return (*TM)->createDataLayout();
68 }
69
70 /// Set the CPU string.
71 JITTargetMachineBuilder &setCPU(std::string CPU) {
72 this->CPU = std::move(CPU);
73 return *this;
74 }
75
76 /// Set the relocation model.
77 JITTargetMachineBuilder &setRelocationModel(Optional<Reloc::Model> RM) {
78 this->RM = std::move(RM);
79 return *this;
80 }
81
82 /// Set the code model.
83 JITTargetMachineBuilder &setCodeModel(Optional<CodeModel::Model> CM) {
84 this->CM = std::move(CM);
85 return *this;
86 }
87
88 /// Set the LLVM CodeGen optimization level.
89 JITTargetMachineBuilder &setCodeGenOptLevel(CodeGenOpt::Level OptLevel) {
90 this->OptLevel = OptLevel;
91 return *this;
92 }
93
94 /// Add subtarget features.
95 JITTargetMachineBuilder &
96 addFeatures(const std::vector<std::string> &FeatureVec);
97
98 /// Access subtarget features.
99 SubtargetFeatures &getFeatures() { return Features; }
100
101 /// Access subtarget features.
102 const SubtargetFeatures &getFeatures() const { return Features; }
103
104 /// Access TargetOptions.
105 TargetOptions &getOptions() { return Options; }
106
107 /// Access TargetOptions.
108 const TargetOptions &getOptions() const { return Options; }
109
110 /// Access Triple.
111 Triple &getTargetTriple() { return TT; }
112
113 /// Access Triple.
114 const Triple &getTargetTriple() const { return TT; }
115
116private:
117 Triple TT;
118 std::string CPU;
119 SubtargetFeatures Features;
120 TargetOptions Options;
121 Optional<Reloc::Model> RM;
122 Optional<CodeModel::Model> CM;
123 CodeGenOpt::Level OptLevel = CodeGenOpt::None;
124};
125
126} // end namespace orc
127} // end namespace llvm
128
129#endif // LLVM_EXECUTIONENGINE_ORC_JITTARGETMACHINEBUILDER_H