ci: update bl31 (no spmd) prebuilts to TF-A v2.8
Rename trusted-firmware-a-trusty to trusted-firmware-a
Generate binaries from upstream TF-A v2.8 release [1].
Qemu platform requires the downstream fix [2].
Do no longer rely on Trusty SPD option for qemu platform.
[1] https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tag/?h=v2.8
[2] https://android.googlesource.com/trusty/external/trusted-firmware-a/+/351e5ea68331e68e1cfd9322ff9f5f338638a3e2%5E%21/#F0
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ibb1b7a425ea86a395c2f41585cd7fe45e3d11260
diff --git a/linux-aarch64/trusted-firmware-a-trusty/METADATA b/linux-aarch64/trusted-firmware-a-trusty/METADATA
deleted file mode 100644
index d8397a4..0000000
--- a/linux-aarch64/trusted-firmware-a-trusty/METADATA
+++ /dev/null
@@ -1,16 +0,0 @@
-name: "trusted-firmware-a"
-description: "Trusted Firmware-A (TF-A) provides a reference implementation of secure world software for Armv7-A and Armv8-A. Those binaries are generated from the Android forked tree."
-
-third_party {
- url {
- type: HOMEPAGE
- value: "https://www.trustedfirmware.org/"
- }
- url {
- type: GIT
- value: "https://android.googlesource.com/trusty/external/trusted-firmware-a/"
- }
- version: "2.5-73-gcbf65cbbd"
- last_upgrade_date { year: 2021 month: 6 day: 11 }
- license_type: NOTICE
-}
diff --git a/linux-aarch64/trusted-firmware-a-trusty/README.md b/linux-aarch64/trusted-firmware-a-trusty/README.md
deleted file mode 100644
index 6b53bf9..0000000
--- a/linux-aarch64/trusted-firmware-a-trusty/README.md
+++ /dev/null
@@ -1,24 +0,0 @@
-We are currently using the
-[Trusty fork of trusted-firmware-a](https://android.googlesource.com/trusty/external/trusted-firmware-a/),
-because we depend on the Trusty SPD. We can go back to using the upstream
-version once the Trusty SPD FF-A patches are upstreamed.
-
-trusted-firmware-a was built with the following commands:
-
-```
-$ make CROSS_COMPILE=aarch64-none-elf- PLAT=fvp FVP_HW_CONFIG_DTS=fdts/fvp-base-gicv3-psci-1t.dts PRELOADED_BL33_BASE=0x80000000 ARM_LINUX_KERNEL_AS_BL33=1 ARM_PRELOADED_DTB_BASE=0x82000000 RESET_TO_BL31=1 ENABLE_PIE=1 V=1 all fip -j16
-$ make CROSS_COMPILE=aarch64-none-elf- PLAT=rpi4 -j16
-$ make CROSS_COMPILE=aarch64-none-elf- PLAT=qemu ENABLE_SVE_FOR_NS=1 QEMU_USE_GIC_DRIVER=QEMU_GICV3 ARM_LINUX_KERNEL_AS_BL33=1 SPD=trusty TRUSTY_SPD_WITH_GENERIC_SERVICES=1 V=1 all -j16
-$ cp build/fvp/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a-trusty/fvp/bl31.bin
-$ cp build/rpi4/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a-trusty/rpi4/bl31.bin
-$ cp build/qemu/release/bl1.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a-trusty/qemu/bl1.bin
-$ cp build/qemu/release/bl2.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a-trusty/qemu/bl2.bin
-$ cp build/qemu/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a-trusty/qemu/bl31.bin
-$ touch ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a-trusty/qemu/bl32.bin
-$ cp docs/license.rst ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a-trusty/LICENSE
-$ dtc -I dtb -O dts build/fvp/release/fdts/fvp-base-gicv3-psci-1t.dtb -o ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a-trusty/fvp/fvp-base-gicv3-psci-1t.dts
-```
-
-Note that `qemu/bl32.bin` is an empty file. This is enough to get the Trusty SPD
-to boot. It gives an error, but this can be ignored as we don't actually try to
-call into Trusty itself.
diff --git a/linux-aarch64/trusted-firmware-a-trusty/fvp/bl31.bin b/linux-aarch64/trusted-firmware-a-trusty/fvp/bl31.bin
deleted file mode 100755
index f136f01..0000000
--- a/linux-aarch64/trusted-firmware-a-trusty/fvp/bl31.bin
+++ /dev/null
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a-trusty/fvp/fvp-base-gicv3-psci-1t.dts b/linux-aarch64/trusted-firmware-a-trusty/fvp/fvp-base-gicv3-psci-1t.dts
deleted file mode 100644
index 2d7fc3f..0000000
--- a/linux-aarch64/trusted-firmware-a-trusty/fvp/fvp-base-gicv3-psci-1t.dts
+++ /dev/null
@@ -1,491 +0,0 @@
-/dts-v1/;
-
-/memreserve/ 0x0000000080000000 0x0000000000010000;
-/ {
- model = "FVP Base";
- compatible = "arm,vfp-base", "arm,vexpress";
- interrupt-parent = <0x1>;
- #address-cells = <0x2>;
- #size-cells = <0x2>;
-
- chosen {
- };
-
- aliases {
- serial0 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@90000";
- serial1 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@a0000";
- serial2 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@b0000";
- serial3 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@c0000";
- };
-
- psci {
- compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
- method = "smc";
- cpu_suspend = <0xc4000001>;
- cpu_off = <0x84000002>;
- cpu_on = <0xc4000003>;
- sys_poweroff = <0x84000008>;
- sys_reset = <0x84000009>;
- max-pwr-lvl = <0x2>;
- };
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu-map {
-
- cluster0 {
-
- core0 {
- cpu = <0x2>;
- };
-
- core1 {
- cpu = <0x3>;
- };
-
- core2 {
- cpu = <0x4>;
- };
-
- core3 {
- cpu = <0x5>;
- };
- };
-
- cluster1 {
-
- core0 {
- cpu = <0x6>;
- };
-
- core1 {
- cpu = <0x7>;
- };
-
- core2 {
- cpu = <0x8>;
- };
-
- core3 {
- cpu = <0x9>;
- };
- };
- };
-
- idle-states {
- entry-method = "arm,psci";
-
- cpu-sleep-0 {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x10000>;
- entry-latency-us = <0x28>;
- exit-latency-us = <0x64>;
- min-residency-us = <0x96>;
- phandle = <0xa>;
- };
-
- cluster-sleep-0 {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x1010000>;
- entry-latency-us = <0x1f4>;
- exit-latency-us = <0x3e8>;
- min-residency-us = <0x9c4>;
- phandle = <0xb>;
- };
- };
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x0>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x2>;
- };
-
- cpu@10300 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x10300>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x9>;
- };
-
-
- cpu@10200 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x10200>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x8>;
- };
-
- cpu@10100 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x10100>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x7>;
- };
-
- cpu@10000 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x10000>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x6>;
- };
-
- cpu@300 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x300>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x5>;
- };
-
- cpu@200 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x200>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x4>;
- };
-
- cpu@100 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x100>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x3>;
- };
-
- l2-cache0 {
- compatible = "cache";
- phandle = <0xc>;
- };
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x0 0x80000000 0x0 0x7f000000 0x8 0x80000000 0x0 0x80000000>;
- };
-
- interrupt-controller@2f000000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <0x3>;
- #address-cells = <0x2>;
- #size-cells = <0x2>;
- ranges;
- interrupt-controller;
- reg = <0x0 0x2f000000 0x0 0x10000 0x0 0x2f100000 0x0 0x200000 0x0 0x2c000000 0x0 0x2000 0x0 0x2c010000 0x0 0x2000 0x0 0x2c02f000 0x0 0x2000>;
- interrupts = <0x1 0x9 0x4>;
- phandle = <0x1>;
-
- its@2f020000 {
- compatible = "arm,gic-v3-its";
- msi-controller;
- reg = <0x0 0x2f020000 0x0 0x20000>;
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
- clock-frequency = <0x5f5e100>;
- };
-
- timer@2a810000 {
- compatible = "arm,armv7-timer-mem";
- reg = <0x0 0x2a810000 0x0 0x10000>;
- clock-frequency = <0x5f5e100>;
- #address-cells = <0x2>;
- #size-cells = <0x2>;
- ranges;
-
- frame@2a830000 {
- frame-number = <0x1>;
- interrupts = <0x0 0x1a 0x4>;
- reg = <0x0 0x2a830000 0x0 0x10000>;
- };
- };
-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <0x0 0x3c 0x4 0x0 0x3d 0x4 0x0 0x3e 0x4 0x0 0x3f 0x4>;
- };
-
- smb@0,0 {
- compatible = "simple-bus";
- #address-cells = <0x2>;
- #size-cells = <0x1>;
- ranges = <0x0 0x0 0x0 0x8000000 0x4000000 0x1 0x0 0x0 0x14000000 0x4000000 0x2 0x0 0x0 0x18000000 0x4000000 0x3 0x0 0x0 0x1c000000 0x4000000 0x4 0x0 0x0 0xc000000 0x4000000 0x5 0x0 0x0 0x10000000 0x4000000>;
-
- motherboard {
- arm,v2m-memory-map = "rs1";
- compatible = "arm,vexpress,v2m-p1", "simple-bus";
- #address-cells = <0x2>;
- #size-cells = <0x1>;
- ranges;
-
- flash@0,00000000 {
- compatible = "arm,vexpress-flash", "cfi-flash";
- reg = <0x0 0x0 0x4000000 0x4 0x0 0x4000000>;
- bank-width = <0x4>;
- };
-
- vram@2,00000000 {
- compatible = "arm,vexpress-vram";
- reg = <0x2 0x0 0x800000>;
- };
-
- ethernet@2,02000000 {
- compatible = "smsc,lan91c111";
- reg = <0x2 0x2000000 0x10000>;
- interrupts = <0x0 0xf 0x4>;
- };
-
- clk24mhz {
- compatible = "fixed-clock";
- #clock-cells = <0x0>;
- clock-frequency = <0x16e3600>;
- clock-output-names = "v2m:clk24mhz";
- phandle = <0xf>;
- };
-
- refclk1mhz {
- compatible = "fixed-clock";
- #clock-cells = <0x0>;
- clock-frequency = <0xf4240>;
- clock-output-names = "v2m:refclk1mhz";
- phandle = <0xe>;
- };
-
- refclk32khz {
- compatible = "fixed-clock";
- #clock-cells = <0x0>;
- clock-frequency = <0x8000>;
- clock-output-names = "v2m:refclk32khz";
- phandle = <0xd>;
- };
-
- iofpga@3,00000000 {
- compatible = "arm,amba-bus", "simple-bus";
- #address-cells = <0x1>;
- #size-cells = <0x1>;
- ranges = <0x0 0x3 0x0 0x200000>;
-
- sysreg@10000 {
- compatible = "arm,vexpress-sysreg";
- reg = <0x10000 0x1000>;
- gpio-controller;
- #gpio-cells = <0x2>;
- phandle = <0x10>;
- };
-
- sysctl@20000 {
- compatible = "arm,sp810", "arm,primecell";
- reg = <0x20000 0x1000>;
- clocks = <0xd 0xe 0xf>;
- clock-names = "refclk", "timclk", "apb_pclk";
- #clock-cells = <0x1>;
- clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
- phandle = <0x12>;
- };
-
- aaci@40000 {
- compatible = "arm,pl041", "arm,primecell";
- reg = <0x40000 0x1000>;
- interrupts = <0x0 0xb 0x4>;
- clocks = <0xf>;
- clock-names = "apb_pclk";
- };
-
- mmci@50000 {
- compatible = "arm,pl180", "arm,primecell";
- reg = <0x50000 0x1000>;
- interrupts = <0x0 0x9 0x4 0x0 0xa 0x4>;
- cd-gpios = <0x10 0x0 0x0>;
- wp-gpios = <0x10 0x1 0x0>;
- max-frequency = <0xb71b00>;
- vmmc-supply = <0x11>;
- clocks = <0xf 0xf>;
- clock-names = "mclk", "apb_pclk";
- };
-
- kmi@60000 {
- compatible = "arm,pl050", "arm,primecell";
- reg = <0x60000 0x1000>;
- interrupts = <0x0 0xc 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "KMIREFCLK", "apb_pclk";
- };
-
- kmi@70000 {
- compatible = "arm,pl050", "arm,primecell";
- reg = <0x70000 0x1000>;
- interrupts = <0x0 0xd 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "KMIREFCLK", "apb_pclk";
- };
-
- uart@90000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x90000 0x1000>;
- interrupts = <0x0 0x5 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "uartclk", "apb_pclk";
- };
-
- uart@a0000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xa0000 0x1000>;
- interrupts = <0x0 0x6 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "uartclk", "apb_pclk";
- };
-
- uart@b0000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xb0000 0x1000>;
- interrupts = <0x0 0x7 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "uartclk", "apb_pclk";
- };
-
- uart@c0000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xc0000 0x1000>;
- interrupts = <0x0 0x8 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "uartclk", "apb_pclk";
- };
-
- wdt@f0000 {
- compatible = "arm,sp805", "arm,primecell";
- reg = <0xf0000 0x1000>;
- interrupts = <0x0 0x0 0x4>;
- clocks = <0xd 0xf>;
- clock-names = "wdogclk", "apb_pclk";
- };
-
- timer@110000 {
- compatible = "arm,sp804", "arm,primecell";
- reg = <0x110000 0x1000>;
- interrupts = <0x0 0x2 0x4>;
- clocks = <0x12 0x0 0x12 0x1 0xf>;
- clock-names = "timclken1", "timclken2", "apb_pclk";
- };
-
- timer@120000 {
- compatible = "arm,sp804", "arm,primecell";
- reg = <0x120000 0x1000>;
- interrupts = <0x0 0x3 0x4>;
- clocks = <0x12 0x2 0x12 0x3 0xf>;
- clock-names = "timclken1", "timclken2", "apb_pclk";
- };
-
- rtc@170000 {
- compatible = "arm,pl031", "arm,primecell";
- reg = <0x170000 0x1000>;
- interrupts = <0x0 0x4 0x4>;
- clocks = <0xf>;
- clock-names = "apb_pclk";
- };
-
- clcd@1f0000 {
- compatible = "arm,pl111", "arm,primecell";
- reg = <0x1f0000 0x1000>;
- interrupts = <0x0 0xe 0x4>;
- clocks = <0x13 0xf>;
- clock-names = "clcdclk", "apb_pclk";
- mode = "XVGA";
- use_dma = <0x0>;
- framebuffer = <0x18000000 0x180000>;
- };
-
- virtio_block@130000 {
- compatible = "virtio,mmio";
- reg = <0x130000 0x1000>;
- interrupts = <0x0 0x2a 0x4>;
- };
- };
-
- fixedregulator {
- compatible = "regulator-fixed";
- regulator-name = "3V3";
- regulator-min-microvolt = <0x325aa0>;
- regulator-max-microvolt = <0x325aa0>;
- regulator-always-on;
- phandle = <0x11>;
- };
-
- mcc {
- compatible = "arm,vexpress,config-bus", "simple-bus";
- arm,vexpress,config-bridge = <0x10>;
-
- osc {
- compatible = "arm,vexpress-osc";
- arm,vexpress-sysreg,func = <0x1 0x1>;
- freq-range = <0x16a6570 0x3c8eee0>;
- #clock-cells = <0x0>;
- clock-output-names = "v2m:oscclk1";
- phandle = <0x13>;
- };
-
- muxfpga {
- compatible = "arm,vexpress-muxfpga";
- arm,vexpress-sysreg,func = <0x7 0x0>;
- };
-
- dvimode {
- compatible = "arm,vexpress-dvimode";
- arm,vexpress-sysreg,func = <0xb 0x0>;
- };
- };
- };
- };
-
- panels {
-
- panel {
- compatible = "panel";
- mode = "XVGA";
- refresh = <0x3c>;
- xres = <0x400>;
- yres = <0x300>;
- pixclock = <0x3d84>;
- left_margin = <0x98>;
- right_margin = <0x30>;
- upper_margin = <0x17>;
- lower_margin = <0x3>;
- hsync_len = <0x68>;
- vsync_len = <0x4>;
- sync = <0x0>;
- vmode = "FB_VMODE_NONINTERLACED";
- tim2 = "TIM2_BCD", "TIM2_IPC";
- cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
- caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
- bpp = <0x10>;
- };
- };
-};
diff --git a/linux-aarch64/trusted-firmware-a-trusty/qemu/bl1.bin b/linux-aarch64/trusted-firmware-a-trusty/qemu/bl1.bin
deleted file mode 100755
index fc0e978..0000000
--- a/linux-aarch64/trusted-firmware-a-trusty/qemu/bl1.bin
+++ /dev/null
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a-trusty/qemu/bl2.bin b/linux-aarch64/trusted-firmware-a-trusty/qemu/bl2.bin
deleted file mode 100755
index 28ec99d..0000000
--- a/linux-aarch64/trusted-firmware-a-trusty/qemu/bl2.bin
+++ /dev/null
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a-trusty/qemu/bl31.bin b/linux-aarch64/trusted-firmware-a-trusty/qemu/bl31.bin
deleted file mode 100755
index 35d0f5d..0000000
--- a/linux-aarch64/trusted-firmware-a-trusty/qemu/bl31.bin
+++ /dev/null
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a-trusty/rpi4/bl31.bin b/linux-aarch64/trusted-firmware-a-trusty/rpi4/bl31.bin
deleted file mode 100755
index 2d92bd1..0000000
--- a/linux-aarch64/trusted-firmware-a-trusty/rpi4/bl31.bin
+++ /dev/null
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a-trusty/LICENSE b/linux-aarch64/trusted-firmware-a/LICENSE
similarity index 88%
rename from linux-aarch64/trusted-firmware-a-trusty/LICENSE
rename to linux-aarch64/trusted-firmware-a/LICENSE
index 2f97043..80f1118 100644
--- a/linux-aarch64/trusted-firmware-a-trusty/LICENSE
+++ b/linux-aarch64/trusted-firmware-a/LICENSE
@@ -76,5 +76,15 @@
BSD-3-Clause license. Any contributions to this code must be made under the
terms of both licenses.
+- Some source files originating from the Linux source tree, which are
+ disjunctively dual licensed (GPL-2.0 OR MIT), are redistributed under the
+ terms of the MIT license. These files are:
+
+ - ``include/dt-bindings/interrupt-controller/arm-gic.h``
+ - ``include/dt-bindings/interrupt-controller/irq.h``
+
+ See the original `Linux MIT license`_.
+
.. _FreeBSD: http://www.freebsd.org
+.. _Linux MIT license: https://raw.githubusercontent.com/torvalds/linux/master/LICENSES/preferred/MIT
.. _SCC: http://www.simple-cc.org/
diff --git a/linux-aarch64/trusted-firmware-a/METADATA b/linux-aarch64/trusted-firmware-a/METADATA
new file mode 100644
index 0000000..9450f6c
--- /dev/null
+++ b/linux-aarch64/trusted-firmware-a/METADATA
@@ -0,0 +1,16 @@
+name: "trusted-firmware-a"
+description: "Trusted Firmware-A (TF-A) provides a reference implementation of secure world software for Armv7-A and Armv8-A."
+
+third_party {
+ url {
+ type: HOMEPAGE
+ value: "https://www.trustedfirmware.org/"
+ }
+ url {
+ type: GIT
+ value: "https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git"
+ }
+ version: "2.8"
+ last_upgrade_date { year: 2023 month: 01 day: 17 }
+ license_type: NOTICE
+}
diff --git a/linux-aarch64/trusted-firmware-a/README.md b/linux-aarch64/trusted-firmware-a/README.md
new file mode 100644
index 0000000..799d856
--- /dev/null
+++ b/linux-aarch64/trusted-firmware-a/README.md
@@ -0,0 +1,15 @@
+# Trusted Firmware-A
+
+```
+$ make CROSS_COMPILE=aarch64-none-elf- PLAT=fvp FVP_HW_CONFIG_DTS=fdts/fvp-base-gicv3-psci-1t.dts PRELOADED_BL33_BASE=0x80000000 ARM_LINUX_KERNEL_AS_BL33=1 ARM_PRELOADED_DTB_BASE=0x82000000 RESET_TO_BL31=1 ENABLE_PIE=1 all fip -j16
+$ make CROSS_COMPILE=aarch64-none-elf- PLAT=rpi4 -j16
+$ make CROSS_COMPILE=aarch64-none-elf- PLAT=qemu ENABLE_SVE_FOR_NS=1 QEMU_USE_GIC_DRIVER=QEMU_GICV3 ARM_LINUX_KERNEL_AS_BL33=1 all -j16
+$ cp build/fvp/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a/fvp/bl31.bin
+$ cp build/rpi4/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a/rpi4/bl31.bin
+$ cp build/qemu/release/bl1.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a/qemu/bl1.bin
+$ cp build/qemu/release/bl2.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a/qemu/bl2.bin
+$ cp build/qemu/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a/qemu/bl31.bin
+$ touch ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a/qemu/bl32.bin
+$ cp docs/license.rst ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a/LICENSE
+$ dtc -I dtb -O dts build/fvp/release/fdts/fvp-base-gicv3-psci-1t.dtb -o ../hafnium/prebuilts/linux-aarch64/trusted-firmware-a/fvp/fvp-base-gicv3-psci-1t.dts
+```
diff --git a/linux-aarch64/trusted-firmware-a/fvp/bl31.bin b/linux-aarch64/trusted-firmware-a/fvp/bl31.bin
new file mode 100755
index 0000000..cf94e1c
--- /dev/null
+++ b/linux-aarch64/trusted-firmware-a/fvp/bl31.bin
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a/fvp/fvp-base-gicv3-psci-1t.dts b/linux-aarch64/trusted-firmware-a/fvp/fvp-base-gicv3-psci-1t.dts
new file mode 100644
index 0000000..59981bc
--- /dev/null
+++ b/linux-aarch64/trusted-firmware-a/fvp/fvp-base-gicv3-psci-1t.dts
@@ -0,0 +1,509 @@
+/dts-v1/;
+
+/memreserve/ 0x0000000080000000 0x0000000000010000;
+/ {
+ model = "FVP Base";
+ compatible = "arm,fvp-base\0arm,vexpress";
+ interrupt-parent = <0x01>;
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+
+ interrupt-controller@2f000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <0x03>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ ranges = <0x00 0x00 0x2f000000 0x100000>;
+ interrupt-controller;
+ reg = <0x00 0x2f000000 0x00 0x10000 0x00 0x2f100000 0x00 0x200000 0x00 0x2c000000 0x00 0x2000 0x00 0x2c010000 0x00 0x2000 0x00 0x2c02f000 0x00 0x2000>;
+ interrupts = <0x01 0x09 0x04>;
+ phandle = <0x01>;
+
+ msi-controller@2f020000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ #msi-cells = <0x01>;
+ reg = <0x20000 0x20000>;
+ };
+ };
+
+ clk24mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x16e3600>;
+ clock-output-names = "v2m:clk24mhz";
+ phandle = <0x05>;
+ };
+
+ refclk1mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0xf4240>;
+ clock-output-names = "v2m:refclk1mhz";
+ phandle = <0x04>;
+ };
+
+ refclk32khz {
+ compatible = "fixed-clock";
+ #clock-cells = <0x00>;
+ clock-frequency = <0x8000>;
+ clock-output-names = "v2m:refclk32khz";
+ phandle = <0x03>;
+ };
+
+ v2m-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <0x325aa0>;
+ regulator-max-microvolt = <0x325aa0>;
+ regulator-always-on;
+ phandle = <0x07>;
+ };
+
+ mcc {
+ compatible = "arm,vexpress,config-bus";
+ arm,vexpress,config-bridge = <0x02>;
+
+ oscclk1 {
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <0x01 0x01>;
+ freq-range = <0x16a6570 0x3c8eee0>;
+ #clock-cells = <0x00>;
+ clock-output-names = "v2m:oscclk1";
+ phandle = <0x08>;
+ };
+
+ reset {
+ compatible = "arm,vexpress-reset";
+ arm,vexpress-sysreg,func = <0x05 0x00>;
+ };
+
+ muxfpga {
+ compatible = "arm,vexpress-muxfpga";
+ arm,vexpress-sysreg,func = <0x07 0x00>;
+ };
+
+ shutdown {
+ compatible = "arm,vexpress-shutdown";
+ arm,vexpress-sysreg,func = <0x08 0x00>;
+ };
+
+ reboot {
+ compatible = "arm,vexpress-reboot";
+ arm,vexpress-sysreg,func = <0x09 0x00>;
+ };
+
+ dvimode {
+ compatible = "arm,vexpress-dvimode";
+ arm,vexpress-sysreg,func = <0x0b 0x00>;
+ };
+ };
+
+ bus@8000000 {
+ compatible = "simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x01>;
+ ranges = <0x00 0x8000000 0x00 0x8000000 0x18000000>;
+ #interrupt-cells = <0x01>;
+ interrupt-map-mask = <0x00 0x00 0x3f>;
+ interrupt-map = <0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x04 0x00 0x00 0x01 0x01 0x00 0x00 0x01 0x04 0x00 0x00 0x02 0x01 0x00 0x00 0x02 0x04 0x00 0x00 0x03 0x01 0x00 0x00 0x03 0x04 0x00 0x00 0x04 0x01 0x00 0x00 0x04 0x04 0x00 0x00 0x05 0x01 0x00 0x00 0x05 0x04 0x00 0x00 0x06 0x01 0x00 0x00 0x06 0x04 0x00 0x00 0x07 0x01 0x00 0x00 0x07 0x04 0x00 0x00 0x08 0x01 0x00 0x00 0x08 0x04 0x00 0x00 0x09 0x01 0x00 0x00 0x09 0x04 0x00 0x00 0x0a 0x01 0x00 0x00 0x0a 0x04 0x00 0x00 0x0b 0x01 0x00 0x00 0x0b 0x04 0x00 0x00 0x0c 0x01 0x00 0x00 0x0c 0x04 0x00 0x00 0x0d 0x01 0x00 0x00 0x0d 0x04 0x00 0x00 0x0e 0x01 0x00 0x00 0x0e 0x04 0x00 0x00 0x0f 0x01 0x00 0x00 0x0f 0x04 0x00 0x00 0x10 0x01 0x00 0x00 0x10 0x04 0x00 0x00 0x11 0x01 0x00 0x00 0x11 0x04 0x00 0x00 0x12 0x01 0x00 0x00 0x12 0x04 0x00 0x00 0x13 0x01 0x00 0x00 0x13 0x04 0x00 0x00 0x14 0x01 0x00 0x00 0x14 0x04 0x00 0x00 0x15 0x01 0x00 0x00 0x15 0x04 0x00 0x00 0x16 0x01 0x00 0x00 0x16 0x04 0x00 0x00 0x17 0x01 0x00 0x00 0x17 0x04 0x00 0x00 0x18 0x01 0x00 0x00 0x18 0x04 0x00 0x00 0x19 0x01 0x00 0x00 0x19 0x04 0x00 0x00 0x1a 0x01 0x00 0x00 0x1a 0x04 0x00 0x00 0x1b 0x01 0x00 0x00 0x1b 0x04 0x00 0x00 0x1c 0x01 0x00 0x00 0x1c 0x04 0x00 0x00 0x1d 0x01 0x00 0x00 0x1d 0x04 0x00 0x00 0x1e 0x01 0x00 0x00 0x1e 0x04 0x00 0x00 0x1f 0x01 0x00 0x00 0x1f 0x04 0x00 0x00 0x20 0x01 0x00 0x00 0x20 0x04 0x00 0x00 0x21 0x01 0x00 0x00 0x21 0x04 0x00 0x00 0x22 0x01 0x00 0x00 0x22 0x04 0x00 0x00 0x23 0x01 0x00 0x00 0x23 0x04 0x00 0x00 0x24 0x01 0x00 0x00 0x24 0x04 0x00 0x00 0x25 0x01 0x00 0x00 0x25 0x04 0x00 0x00 0x26 0x01 0x00 0x00 0x26 0x04 0x00 0x00 0x27 0x01 0x00 0x00 0x27 0x04 0x00 0x00 0x28 0x01 0x00 0x00 0x28 0x04 0x00 0x00 0x29 0x01 0x00 0x00 0x29 0x04 0x00 0x00 0x2a 0x01 0x00 0x00 0x2a 0x04>;
+
+ motherboard-bus@8000000 {
+ compatible = "arm,vexpress,v2m-p1\0simple-bus";
+ #address-cells = <0x02>;
+ #size-cells = <0x01>;
+ ranges = <0x00 0x00 0x00 0x8000000 0x4000000 0x01 0x00 0x00 0x14000000 0x4000000 0x02 0x00 0x00 0x18000000 0x4000000 0x03 0x00 0x00 0x1c000000 0x4000000 0x04 0x00 0x00 0xc000000 0x4000000 0x05 0x00 0x00 0x10000000 0x4000000>;
+
+ flash@0 {
+ compatible = "arm,vexpress-flash\0cfi-flash";
+ reg = <0x00 0x00 0x4000000 0x04 0x00 0x4000000>;
+ bank-width = <0x04>;
+ };
+
+ ethernet@202000000 {
+ compatible = "smsc,lan91c111";
+ reg = <0x02 0x2000000 0x10000>;
+ interrupts = <0x0f>;
+ };
+
+ iofpga-bus@300000000 {
+ compatible = "simple-bus";
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ ranges = <0x00 0x03 0x00 0x210000>;
+
+ sysreg@10000 {
+ compatible = "arm,vexpress-sysreg";
+ reg = <0x10000 0x1000>;
+ gpio-controller;
+ #gpio-cells = <0x02>;
+ phandle = <0x02>;
+ };
+
+ sysctl@20000 {
+ compatible = "arm,sp810\0arm,primecell";
+ reg = <0x20000 0x1000>;
+ clocks = <0x03 0x04 0x05>;
+ clock-names = "refclk\0timclk\0apb_pclk";
+ #clock-cells = <0x01>;
+ clock-output-names = "timerclken0\0timerclken1\0timerclken2\0timerclken3";
+ assigned-clocks = <0x06 0x00 0x06 0x01 0x06 0x03 0x06 0x03>;
+ assigned-clock-parents = <0x04 0x04 0x04 0x04>;
+ phandle = <0x06>;
+ };
+
+ aaci@40000 {
+ compatible = "arm,pl041\0arm,primecell";
+ reg = <0x40000 0x1000>;
+ interrupts = <0x0b>;
+ clocks = <0x05>;
+ clock-names = "apb_pclk";
+ };
+
+ mmc@50000 {
+ compatible = "arm,pl180\0arm,primecell";
+ reg = <0x50000 0x1000>;
+ interrupts = <0x09 0x0a>;
+ cd-gpios = <0x02 0x00 0x00>;
+ wp-gpios = <0x02 0x01 0x00>;
+ max-frequency = <0xb71b00>;
+ vmmc-supply = <0x07>;
+ clocks = <0x05 0x05>;
+ clock-names = "mclk\0apb_pclk";
+ };
+
+ kmi@60000 {
+ compatible = "arm,pl050\0arm,primecell";
+ reg = <0x60000 0x1000>;
+ interrupts = <0x0c>;
+ clocks = <0x05 0x05>;
+ clock-names = "KMIREFCLK\0apb_pclk";
+ };
+
+ kmi@70000 {
+ compatible = "arm,pl050\0arm,primecell";
+ reg = <0x70000 0x1000>;
+ interrupts = <0x0d>;
+ clocks = <0x05 0x05>;
+ clock-names = "KMIREFCLK\0apb_pclk";
+ };
+
+ serial@90000 {
+ compatible = "arm,pl011\0arm,primecell";
+ reg = <0x90000 0x1000>;
+ interrupts = <0x05>;
+ clocks = <0x05 0x05>;
+ clock-names = "uartclk\0apb_pclk";
+ };
+
+ serial@a0000 {
+ compatible = "arm,pl011\0arm,primecell";
+ reg = <0xa0000 0x1000>;
+ interrupts = <0x06>;
+ clocks = <0x05 0x05>;
+ clock-names = "uartclk\0apb_pclk";
+ };
+
+ serial@b0000 {
+ compatible = "arm,pl011\0arm,primecell";
+ reg = <0xb0000 0x1000>;
+ interrupts = <0x07>;
+ clocks = <0x05 0x05>;
+ clock-names = "uartclk\0apb_pclk";
+ };
+
+ serial@c0000 {
+ compatible = "arm,pl011\0arm,primecell";
+ reg = <0xc0000 0x1000>;
+ interrupts = <0x08>;
+ clocks = <0x05 0x05>;
+ clock-names = "uartclk\0apb_pclk";
+ };
+
+ watchdog@f0000 {
+ compatible = "arm,sp805\0arm,primecell";
+ reg = <0xf0000 0x1000>;
+ interrupts = <0x00>;
+ clocks = <0x03 0x05>;
+ clock-names = "wdog_clk\0apb_pclk";
+ };
+
+ timer@110000 {
+ compatible = "arm,sp804\0arm,primecell";
+ reg = <0x110000 0x1000>;
+ interrupts = <0x02>;
+ clocks = <0x06 0x00 0x06 0x01 0x05>;
+ clock-names = "timclken1\0timclken2\0apb_pclk";
+ };
+
+ timer@120000 {
+ compatible = "arm,sp804\0arm,primecell";
+ reg = <0x120000 0x1000>;
+ interrupts = <0x03>;
+ clocks = <0x06 0x02 0x06 0x03 0x05>;
+ clock-names = "timclken1\0timclken2\0apb_pclk";
+ };
+
+ virtio@130000 {
+ compatible = "virtio,mmio";
+ reg = <0x130000 0x200>;
+ interrupts = <0x2a>;
+ };
+
+ rtc@170000 {
+ compatible = "arm,pl031\0arm,primecell";
+ reg = <0x170000 0x1000>;
+ interrupts = <0x04>;
+ clocks = <0x05>;
+ clock-names = "apb_pclk";
+ };
+
+ clcd@1f0000 {
+ compatible = "arm,pl111\0arm,primecell";
+ reg = <0x1f0000 0x1000>;
+ interrupt-names = "combined";
+ interrupts = <0x0e>;
+ clocks = <0x08 0x05>;
+ clock-names = "clcdclk\0apb_pclk";
+ memory-region = <0x09>;
+
+ port {
+
+ endpoint {
+ remote-endpoint = <0x0a>;
+ arm,pl11x,tft-r0g0b0-pads = <0x00 0x08 0x10>;
+ phandle = <0x16>;
+ };
+ };
+ };
+ };
+ };
+ };
+
+ chosen {
+ };
+
+ aliases {
+ serial0 = "/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@90000";
+ serial1 = "/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@a0000";
+ serial2 = "/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@b0000";
+ serial3 = "/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@c0000";
+ };
+
+ psci {
+ compatible = "arm,psci-1.0\0arm,psci-0.2";
+ method = "smc";
+ max-pwr-lvl = <0x02>;
+ };
+
+ cpus {
+ #address-cells = <0x02>;
+ #size-cells = <0x00>;
+
+ cpu-map {
+
+ cluster0 {
+
+ core0 {
+ cpu = <0x0b>;
+ };
+
+ core1 {
+ cpu = <0x0c>;
+ };
+
+ core2 {
+ cpu = <0x0d>;
+ };
+
+ core3 {
+ cpu = <0x0e>;
+ };
+ };
+
+ cluster1 {
+
+ core0 {
+ cpu = <0x0f>;
+ };
+
+ core1 {
+ cpu = <0x10>;
+ };
+
+ core2 {
+ cpu = <0x11>;
+ };
+
+ core3 {
+ cpu = <0x12>;
+ };
+ };
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x10000>;
+ entry-latency-us = <0x28>;
+ exit-latency-us = <0x64>;
+ min-residency-us = <0x96>;
+ phandle = <0x13>;
+ };
+
+ cluster-sleep-0 {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x1010000>;
+ entry-latency-us = <0x1f4>;
+ exit-latency-us = <0x3e8>;
+ min-residency-us = <0x9c4>;
+ phandle = <0x14>;
+ };
+ };
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x00 0x00>;
+ enable-method = "psci";
+ cpu-idle-states = <0x13 0x14>;
+ next-level-cache = <0x15>;
+ phandle = <0x0b>;
+ };
+
+ cpu@10300 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x00 0x10300>;
+ enable-method = "psci";
+ cpu-idle-states = <0x13 0x14>;
+ next-level-cache = <0x15>;
+ phandle = <0x12>;
+ };
+
+ cpu@10200 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x00 0x10200>;
+ enable-method = "psci";
+ cpu-idle-states = <0x13 0x14>;
+ next-level-cache = <0x15>;
+ phandle = <0x11>;
+ };
+
+ cpu@10100 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x00 0x10100>;
+ enable-method = "psci";
+ cpu-idle-states = <0x13 0x14>;
+ next-level-cache = <0x15>;
+ phandle = <0x10>;
+ };
+
+ cpu@10000 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x00 0x10000>;
+ enable-method = "psci";
+ cpu-idle-states = <0x13 0x14>;
+ next-level-cache = <0x15>;
+ phandle = <0x0f>;
+ };
+
+ cpu@300 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x00 0x300>;
+ enable-method = "psci";
+ cpu-idle-states = <0x13 0x14>;
+ next-level-cache = <0x15>;
+ phandle = <0x0e>;
+ };
+
+ cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x00 0x200>;
+ enable-method = "psci";
+ cpu-idle-states = <0x13 0x14>;
+ next-level-cache = <0x15>;
+ phandle = <0x0d>;
+ };
+
+ cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = <0x00 0x100>;
+ enable-method = "psci";
+ cpu-idle-states = <0x13 0x14>;
+ next-level-cache = <0x15>;
+ phandle = <0x0c>;
+ };
+
+ l2-cache0 {
+ compatible = "cache";
+ phandle = <0x15>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x00 0x80000000 0x00 0x7f000000 0x08 0x80000000 0x00 0x80000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <0x02>;
+ #size-cells = <0x02>;
+ ranges;
+
+ vram@18000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x18000000 0x00 0x800000>;
+ no-map;
+ phandle = <0x09>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
+ clock-frequency = <0x5f5e100>;
+ };
+
+ timer@2a810000 {
+ compatible = "arm,armv7-timer-mem";
+ reg = <0x00 0x2a810000 0x00 0x10000>;
+ clock-frequency = <0x5f5e100>;
+ #address-cells = <0x01>;
+ #size-cells = <0x01>;
+ ranges = <0x00 0x00 0x2a810000 0x100000>;
+
+ frame@2a830000 {
+ frame-number = <0x01>;
+ interrupts = <0x00 0x1a 0x04>;
+ reg = <0x20000 0x10000>;
+ };
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <0x00 0x3c 0x04 0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04>;
+ };
+
+ panel {
+ compatible = "arm,rtsm-display";
+
+ port {
+
+ endpoint {
+ remote-endpoint = <0x16>;
+ phandle = <0x0a>;
+ };
+ };
+ };
+};
diff --git a/linux-aarch64/trusted-firmware-a/qemu/bl1.bin b/linux-aarch64/trusted-firmware-a/qemu/bl1.bin
new file mode 100755
index 0000000..25abc8a
--- /dev/null
+++ b/linux-aarch64/trusted-firmware-a/qemu/bl1.bin
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a/qemu/bl2.bin b/linux-aarch64/trusted-firmware-a/qemu/bl2.bin
new file mode 100755
index 0000000..f2a2788
--- /dev/null
+++ b/linux-aarch64/trusted-firmware-a/qemu/bl2.bin
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a/qemu/bl31.bin b/linux-aarch64/trusted-firmware-a/qemu/bl31.bin
new file mode 100755
index 0000000..2e60c5d
--- /dev/null
+++ b/linux-aarch64/trusted-firmware-a/qemu/bl31.bin
Binary files differ
diff --git a/linux-aarch64/trusted-firmware-a-trusty/qemu/bl32.bin b/linux-aarch64/trusted-firmware-a/qemu/bl32.bin
similarity index 100%
rename from linux-aarch64/trusted-firmware-a-trusty/qemu/bl32.bin
rename to linux-aarch64/trusted-firmware-a/qemu/bl32.bin
diff --git a/linux-aarch64/trusted-firmware-a/rpi4/bl31.bin b/linux-aarch64/trusted-firmware-a/rpi4/bl31.bin
new file mode 100755
index 0000000..432f3bb
--- /dev/null
+++ b/linux-aarch64/trusted-firmware-a/rpi4/bl31.bin
Binary files differ