Update prebuilt Clang to match Android kernel.
Bug: 132428451
Change-Id: I8f6e2cb23f381fc0c02ddea99b867e58e925e5be
diff --git a/linux-x64/clang/include/llvm/Target/TargetMachine.h b/linux-x64/clang/include/llvm/Target/TargetMachine.h
index e743e9f..7dd9b99 100644
--- a/linux-x64/clang/include/llvm/Target/TargetMachine.h
+++ b/linux-x64/clang/include/llvm/Target/TargetMachine.h
@@ -1,9 +1,8 @@
//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
@@ -201,6 +200,9 @@
bool getO0WantsFastISel() { return O0WantsFastISel; }
void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
void setGlobalISel(bool Enable) { Options.EnableGlobalISel = Enable; }
+ void setGlobalISelAbort(GlobalISelAbortMode Mode) {
+ Options.GlobalISelAbort = Mode;
+ }
void setMachineOutliner(bool Enable) {
Options.EnableMachineOutliner = Enable;
}
@@ -284,18 +286,6 @@
void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
MCSymbol *getSymbol(const GlobalValue *GV) const;
-
- /// True if the target uses physical regs at Prolog/Epilog insertion
- /// time. If true (most machines), all vregs must be allocated before
- /// PEI. If false (virtual-register machines), then callee-save register
- /// spilling and scavenging are not needed or used.
- virtual bool usesPhysRegsForPEI() const { return true; }
-
- /// True if the target wants to use interprocedural register allocation by
- /// default. The -enable-ipra flag can be used to override this.
- virtual bool useIPRA() const {
- return false;
- }
};
/// This class describes a target machine that is implemented with the LLVM
@@ -349,8 +339,37 @@
bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe,
MCContext &Context);
+
+ /// True if the target uses physical regs at Prolog/Epilog insertion
+ /// time. If true (most machines), all vregs must be allocated before
+ /// PEI. If false (virtual-register machines), then callee-save register
+ /// spilling and scavenging are not needed or used.
+ virtual bool usesPhysRegsForPEI() const { return true; }
+
+ /// True if the target wants to use interprocedural register allocation by
+ /// default. The -enable-ipra flag can be used to override this.
+ virtual bool useIPRA() const {
+ return false;
+ }
};
+/// Helper method for getting the code model, returning Default if
+/// CM does not have a value. The tiny and kernel models will produce
+/// an error, so targets that support them or require more complex codemodel
+/// selection logic should implement and call their own getEffectiveCodeModel.
+inline CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM,
+ CodeModel::Model Default) {
+ if (CM) {
+ // By default, targets do not support the tiny and kernel models.
+ if (*CM == CodeModel::Tiny)
+ report_fatal_error("Target does not support the tiny CodeModel");
+ if (*CM == CodeModel::Kernel)
+ report_fatal_error("Target does not support the kernel CodeModel");
+ return *CM;
+ }
+ return Default;
+}
+
} // end namespace llvm
#endif // LLVM_TARGET_TARGETMACHINE_H