Andrew Scull | 1883487 | 2018-10-12 11:48:09 +0100 | [diff] [blame] | 1 | /* |
Andrew Walbran | 692b325 | 2019-03-07 15:51:31 +0000 | [diff] [blame] | 2 | * Copyright 2018 The Hafnium Authors. |
Andrew Scull | 1883487 | 2018-10-12 11:48:09 +0100 | [diff] [blame] | 3 | * |
Andrew Walbran | e959ec1 | 2020-06-17 15:01:09 +0100 | [diff] [blame] | 4 | * Use of this source code is governed by a BSD-style |
| 5 | * license that can be found in the LICENSE file or at |
| 6 | * https://opensource.org/licenses/BSD-3-Clause. |
Andrew Scull | 1883487 | 2018-10-12 11:48:09 +0100 | [diff] [blame] | 7 | */ |
| 8 | |
Andrew Scull | 18c78fc | 2018-08-20 12:57:41 +0100 | [diff] [blame] | 9 | #include "hf/mm.h" |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 10 | |
| 11 | #include <stdatomic.h> |
| 12 | #include <stdint.h> |
| 13 | |
Maksims Svecovs | 134b8f9 | 2022-03-04 15:14:09 +0000 | [diff] [blame] | 14 | #include "hf/arch/init.h" |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 15 | #include "hf/arch/mm.h" |
Maksims Svecovs | 134b8f9 | 2022-03-04 15:14:09 +0000 | [diff] [blame] | 16 | |
Andrew Scull | 877ae4b | 2019-07-02 12:52:33 +0100 | [diff] [blame] | 17 | #include "hf/check.h" |
Andrew Scull | 18c78fc | 2018-08-20 12:57:41 +0100 | [diff] [blame] | 18 | #include "hf/dlog.h" |
Andrew Scull | 5991ec9 | 2018-10-08 14:55:02 +0100 | [diff] [blame] | 19 | #include "hf/layout.h" |
Andrew Walbran | 4869936 | 2019-05-20 14:38:00 +0100 | [diff] [blame] | 20 | #include "hf/plat/console.h" |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 21 | #include "hf/std.h" |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 22 | |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 23 | /** |
| 24 | * This file has functions for managing the level 1 and 2 page tables used by |
| 25 | * Hafnium. There is a level 1 mapping used by Hafnium itself to access memory, |
| 26 | * and then a level 2 mapping per VM. The design assumes that all page tables |
| 27 | * contain only 1-1 mappings, aligned on the block boundaries. |
| 28 | */ |
| 29 | |
Wedson Almeida Filho | b2c159e | 2018-10-25 13:27:47 +0100 | [diff] [blame] | 30 | /* |
| 31 | * For stage 2, the input is an intermediate physical addresses rather than a |
| 32 | * virtual address so: |
| 33 | */ |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 34 | static_assert( |
| 35 | sizeof(ptable_addr_t) == sizeof(uintpaddr_t), |
| 36 | "Currently, the same code manages the stage 1 and stage 2 page tables " |
| 37 | "which only works if the virtual and intermediate physical addresses " |
| 38 | "are the same size. It looks like that assumption might not be holding " |
| 39 | "so we need to check that everything is going to be ok."); |
| 40 | |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 41 | static struct mm_ptable ptable; |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 42 | static struct spinlock ptable_lock; |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 43 | |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 44 | static bool mm_stage2_invalidate = false; |
| 45 | |
| 46 | /** |
| 47 | * After calling this function, modifications to stage-2 page tables will use |
| 48 | * break-before-make and invalidate the TLB for the affected range. |
| 49 | */ |
| 50 | void mm_vm_enable_invalidation(void) |
| 51 | { |
| 52 | mm_stage2_invalidate = true; |
| 53 | } |
| 54 | |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 55 | /** |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 56 | * Rounds an address down to a page boundary. |
| 57 | */ |
| 58 | static ptable_addr_t mm_round_down_to_page(ptable_addr_t addr) |
| 59 | { |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 60 | return align_down(addr, PAGE_SIZE); |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 61 | } |
| 62 | |
| 63 | /** |
| 64 | * Rounds an address up to a page boundary. |
| 65 | */ |
| 66 | static ptable_addr_t mm_round_up_to_page(ptable_addr_t addr) |
| 67 | { |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 68 | return align_up(addr, PAGE_SIZE); |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 69 | } |
| 70 | |
| 71 | /** |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 72 | * Calculates the size of the address space represented by a page table entry at |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 73 | * the given level. See also Arm ARM, table D8-15 |
| 74 | * - `level == 4`: 256 TiB (1 << 48) |
| 75 | * - `level == 3`: 512 GiB (1 << 39) |
| 76 | * - `level == 2`: 1 GiB (1 << 30) |
| 77 | * - `level == 1`: 2 MiB (1 << 21) |
| 78 | * - `level == 0`: 4 KiB (1 << 12) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 79 | */ |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 80 | static size_t mm_entry_size(mm_level_t level) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 81 | { |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 82 | assert(level <= 4); |
Andrew Scull | 78d6fd9 | 2018-09-06 15:08:36 +0100 | [diff] [blame] | 83 | return UINT64_C(1) << (PAGE_BITS + level * PAGE_LEVEL_BITS); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | /** |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 87 | * Get the start address of the range mapped by the next block of the given |
| 88 | * level. |
Andrew Scull | cae4557 | 2018-12-13 15:46:30 +0000 | [diff] [blame] | 89 | */ |
| 90 | static ptable_addr_t mm_start_of_next_block(ptable_addr_t addr, |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 91 | mm_level_t level) |
Andrew Scull | cae4557 | 2018-12-13 15:46:30 +0000 | [diff] [blame] | 92 | { |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 93 | assert(level <= 4); |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 94 | return align_up(addr + 1, mm_entry_size(level)); |
Andrew Scull | cae4557 | 2018-12-13 15:46:30 +0000 | [diff] [blame] | 95 | } |
| 96 | |
| 97 | /** |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 98 | * For a given address, calculates the maximum (plus one) address that can be |
| 99 | * represented by the same table at the given level. |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 100 | */ |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 101 | static ptable_addr_t mm_level_end(ptable_addr_t addr, mm_level_t level) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 102 | { |
| 103 | size_t offset = PAGE_BITS + (level + 1) * PAGE_LEVEL_BITS; |
Wedson Almeida Filho | 81568c4 | 2019-01-04 13:33:02 +0000 | [diff] [blame] | 104 | |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 105 | return ((addr >> offset) + 1) << offset; |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | /** |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 109 | * For a given address, calculates the index at which its entry is stored in a |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 110 | * table at the given level. See also Arm ARM, table D8-14 |
| 111 | * - `level == 4`: bits[51:48] |
| 112 | * - `level == 3`: bits[47:39] |
| 113 | * - `level == 2`: bits[38:30] |
| 114 | * - `level == 1`: bits[29:21] |
| 115 | * - `level == 0`: bits[20:12] |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 116 | */ |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 117 | static size_t mm_index(ptable_addr_t addr, mm_level_t level) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 118 | { |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 119 | ptable_addr_t v = addr >> (PAGE_BITS + level * PAGE_LEVEL_BITS); |
Wedson Almeida Filho | 81568c4 | 2019-01-04 13:33:02 +0000 | [diff] [blame] | 120 | |
Andrew Scull | 78d6fd9 | 2018-09-06 15:08:36 +0100 | [diff] [blame] | 121 | return v & ((UINT64_C(1) << PAGE_LEVEL_BITS) - 1); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 122 | } |
| 123 | |
| 124 | /** |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 125 | * Allocates a new page table. |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 126 | */ |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 127 | static struct mm_page_table *mm_alloc_page_tables(size_t count, |
| 128 | struct mpool *ppool) |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 129 | { |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 130 | if (count == 1) { |
| 131 | return mpool_alloc(ppool); |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 132 | } |
| 133 | |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 134 | return mpool_alloc_contiguous(ppool, count, count); |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | /** |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 138 | * Returns the root level in the page table given the flags. |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 139 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 140 | static mm_level_t mm_root_level(const struct mm_ptable *ptable) |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 141 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 142 | return ptable->stage1 ? arch_mm_stage1_root_level() |
| 143 | : arch_mm_stage2_root_level(); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 144 | } |
| 145 | |
| 146 | /** |
| 147 | * Returns the number of root-level tables given the flags. |
| 148 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 149 | static uint8_t mm_root_table_count(const struct mm_ptable *ptable) |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 150 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 151 | return ptable->stage1 ? arch_mm_stage1_root_table_count() |
| 152 | : arch_mm_stage2_root_table_count(); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | /** |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 156 | * Invalidates the TLB for the given address range. |
| 157 | */ |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 158 | static void mm_invalidate_tlb(const struct mm_ptable *ptable, |
| 159 | ptable_addr_t begin, ptable_addr_t end, |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 160 | bool non_secure) |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 161 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 162 | if (ptable->stage1) { |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 163 | arch_mm_invalidate_stage1_range(ptable->id, va_init(begin), |
Raghu Krishnamurthy | 8fdd6df | 2021-02-03 18:30:59 -0800 | [diff] [blame] | 164 | va_init(end)); |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 165 | } else { |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 166 | arch_mm_invalidate_stage2_range(ptable->id, ipa_init(begin), |
Olivier Deprez | 6f40037 | 2022-03-07 09:31:08 +0100 | [diff] [blame] | 167 | ipa_init(end), non_secure); |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 168 | } |
| 169 | } |
| 170 | |
| 171 | /** |
| 172 | * Frees all page-table-related memory associated with the given pte at the |
| 173 | * given level, including any subtables recursively. |
| 174 | */ |
Daniel Boulby | 8adf748 | 2021-09-22 15:12:44 +0100 | [diff] [blame] | 175 | // NOLINTNEXTLINE(misc-no-recursion) |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 176 | static void mm_free_page_pte(pte_t pte, mm_level_t level, struct mpool *ppool) |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 177 | { |
| 178 | struct mm_page_table *table; |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 179 | |
| 180 | if (!arch_mm_pte_is_table(pte, level)) { |
| 181 | return; |
| 182 | } |
| 183 | |
| 184 | /* Recursively free any subtables. */ |
Karl Meakin | aacfd4f | 2025-02-08 19:30:52 +0000 | [diff] [blame] | 185 | table = arch_mm_table_from_pte(pte, level); |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 186 | for (size_t i = 0; i < MM_PTE_PER_PAGE; ++i) { |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 187 | mm_free_page_pte(table->entries[i], level - 1, ppool); |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 188 | } |
| 189 | |
| 190 | /* Free the table itself. */ |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 191 | mpool_free(ppool, table); |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 192 | } |
| 193 | |
| 194 | /** |
David Brazdil | 711fbe9 | 2019-08-06 13:39:58 +0100 | [diff] [blame] | 195 | * Returns the first address which cannot be encoded in page tables given by |
| 196 | * `flags`. It is the exclusive end of the address space created by the tables. |
| 197 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 198 | ptable_addr_t mm_ptable_addr_space_end(const struct mm_ptable *ptable) |
David Brazdil | 711fbe9 | 2019-08-06 13:39:58 +0100 | [diff] [blame] | 199 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 200 | return mm_root_table_count(ptable) * |
| 201 | mm_entry_size(mm_root_level(ptable)); |
David Brazdil | 711fbe9 | 2019-08-06 13:39:58 +0100 | [diff] [blame] | 202 | } |
| 203 | |
| 204 | /** |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 205 | * Initialises the given page table. |
| 206 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 207 | bool mm_ptable_init(struct mm_ptable *ptable, mm_asid_t id, bool stage1, |
| 208 | struct mpool *ppool) |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 209 | { |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 210 | struct mm_page_table *root_tables; |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 211 | uint8_t root_table_count = stage1 ? arch_mm_stage1_root_table_count() |
| 212 | : arch_mm_stage2_root_table_count(); |
| 213 | mm_level_t root_level = stage1 ? arch_mm_stage1_root_level() |
| 214 | : arch_mm_stage2_root_level(); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 215 | |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 216 | root_tables = mm_alloc_page_tables(root_table_count, ppool); |
| 217 | if (root_tables == NULL) { |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 218 | return false; |
| 219 | } |
| 220 | |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 221 | for (size_t i = 0; i < root_table_count; i++) { |
| 222 | for (size_t j = 0; j < MM_PTE_PER_PAGE; j++) { |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 223 | root_tables[i].entries[j] = |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 224 | arch_mm_absent_pte(root_level - 1); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 225 | } |
| 226 | } |
| 227 | |
| 228 | /* |
| 229 | * TODO: halloc could return a virtual or physical address if mm not |
| 230 | * enabled? |
| 231 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 232 | ptable->id = id; |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 233 | ptable->root_tables = root_tables; |
| 234 | ptable->stage1 = stage1; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 235 | return true; |
| 236 | } |
| 237 | |
| 238 | /** |
| 239 | * Frees all memory associated with the give page table. |
| 240 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 241 | static void mm_ptable_fini(const struct mm_ptable *ptable, struct mpool *ppool) |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 242 | { |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 243 | struct mm_page_table *root_tables = ptable->root_tables; |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 244 | mm_level_t root_level = mm_root_level(ptable); |
| 245 | uint8_t root_table_count = mm_root_table_count(ptable); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 246 | |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 247 | for (size_t i = 0; i < root_table_count; ++i) { |
| 248 | for (size_t j = 0; j < MM_PTE_PER_PAGE; ++j) { |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 249 | mm_free_page_pte(root_tables[i].entries[j], |
| 250 | root_level - 1, ppool); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 251 | } |
| 252 | } |
| 253 | |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 254 | mpool_add_chunk(ppool, root_tables, |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 255 | sizeof(struct mm_page_table) * root_table_count); |
| 256 | } |
| 257 | |
| 258 | /** |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 259 | * Replaces a page table entry with the given value. If both old and new values |
Andrew Scull | c66a04d | 2018-12-07 13:41:56 +0000 | [diff] [blame] | 260 | * are valid, it performs a break-before-make sequence where it first writes an |
| 261 | * invalid value to the PTE, flushes the TLB, then writes the actual new value. |
| 262 | * This is to prevent cases where CPUs have different 'valid' values in their |
| 263 | * TLBs, which may result in issues for example in cache coherency. |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 264 | */ |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 265 | static void mm_replace_entry(const struct mm_ptable *ptable, |
| 266 | ptable_addr_t begin, pte_t *pte, pte_t new_pte, |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 267 | mm_level_t level, bool non_secure, |
| 268 | struct mpool *ppool) |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 269 | { |
| 270 | pte_t v = *pte; |
| 271 | |
| 272 | /* |
| 273 | * We need to do the break-before-make sequence if both values are |
Andrew Scull | 3cd9e26 | 2019-01-08 17:59:22 +0000 | [diff] [blame] | 274 | * present and the TLB is being invalidated. |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 275 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 276 | if ((ptable->stage1 || mm_stage2_invalidate) && |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 277 | arch_mm_pte_is_valid(v, level)) { |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 278 | *pte = arch_mm_absent_pte(level); |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 279 | mm_invalidate_tlb(ptable, begin, begin + mm_entry_size(level), |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 280 | non_secure); |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 281 | } |
| 282 | |
| 283 | /* Assign the new pte. */ |
| 284 | *pte = new_pte; |
| 285 | |
| 286 | /* Free pages that aren't in use anymore. */ |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 287 | mm_free_page_pte(v, level, ppool); |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | /** |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 291 | * Populates the provided page table entry with a reference to another table if |
| 292 | * needed, that is, if it does not yet point to another table. |
| 293 | * |
| 294 | * Returns a pointer to the table the entry now points to. |
| 295 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 296 | static struct mm_page_table *mm_populate_table_pte(struct mm_ptable *ptable, |
| 297 | ptable_addr_t begin, |
| 298 | pte_t *pte, mm_level_t level, |
| 299 | bool non_secure, |
| 300 | struct mpool *ppool) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 301 | { |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 302 | struct mm_page_table *ntable; |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 303 | pte_t v = *pte; |
| 304 | pte_t new_pte; |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 305 | size_t inc; |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 306 | mm_level_t level_below = level - 1; |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 307 | |
| 308 | /* Just return pointer to table if it's already populated. */ |
Andrew Scull | 78d6fd9 | 2018-09-06 15:08:36 +0100 | [diff] [blame] | 309 | if (arch_mm_pte_is_table(v, level)) { |
Karl Meakin | aacfd4f | 2025-02-08 19:30:52 +0000 | [diff] [blame] | 310 | return arch_mm_table_from_pte(v, level); |
Andrew Scull | 7364a8e | 2018-07-19 15:39:29 +0100 | [diff] [blame] | 311 | } |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 312 | |
| 313 | /* Allocate a new table. */ |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 314 | ntable = mm_alloc_page_tables(1, ppool); |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 315 | if (ntable == NULL) { |
Andrew Walbran | 17eebf9 | 2020-02-05 16:35:49 +0000 | [diff] [blame] | 316 | dlog_error("Failed to allocate memory for page table\n"); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 317 | return NULL; |
| 318 | } |
| 319 | |
| 320 | /* Determine template for new pte and its increment. */ |
Andrew Scull | 78d6fd9 | 2018-09-06 15:08:36 +0100 | [diff] [blame] | 321 | if (arch_mm_pte_is_block(v, level)) { |
Andrew Scull | 78d6fd9 | 2018-09-06 15:08:36 +0100 | [diff] [blame] | 322 | inc = mm_entry_size(level_below); |
| 323 | new_pte = arch_mm_block_pte(level_below, |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 324 | arch_mm_block_from_pte(v, level), |
| 325 | arch_mm_pte_attrs(v, level)); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 326 | } else { |
Andrew Scull | 78d6fd9 | 2018-09-06 15:08:36 +0100 | [diff] [blame] | 327 | inc = 0; |
Andrew Walbran | 1b99f9d | 2018-10-03 17:54:40 +0100 | [diff] [blame] | 328 | new_pte = arch_mm_absent_pte(level_below); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 329 | } |
| 330 | |
| 331 | /* Initialise entries in the new table. */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 332 | for (size_t i = 0; i < MM_PTE_PER_PAGE; i++) { |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 333 | ntable->entries[i] = new_pte; |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 334 | new_pte += inc; |
| 335 | } |
| 336 | |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 337 | /* Ensure initialisation is visible before updating the pte. */ |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 338 | atomic_thread_fence(memory_order_release); |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 339 | |
| 340 | /* Replace the pte entry, doing a break-before-make if needed. */ |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 341 | mm_replace_entry(ptable, begin, pte, |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 342 | arch_mm_table_pte(level, pa_init((uintpaddr_t)ntable)), |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 343 | level, non_secure, ppool); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 344 | |
| 345 | return ntable; |
| 346 | } |
| 347 | |
| 348 | /** |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 349 | * Updates the page table at the given level to map the given address range to a |
Andrew Walbran | 6324fc9 | 2018-10-03 11:46:43 +0100 | [diff] [blame] | 350 | * physical range using the provided (architecture-specific) attributes. Or if |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 351 | * `flags.unmap` is set, unmap the given range instead. |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 352 | * |
| 353 | * This function calls itself recursively if it needs to update additional |
| 354 | * levels, but the recursion is bound by the maximum number of levels in a page |
| 355 | * table. |
| 356 | */ |
Daniel Boulby | 8adf748 | 2021-09-22 15:12:44 +0100 | [diff] [blame] | 357 | // NOLINTNEXTLINE(misc-no-recursion) |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 358 | static bool mm_map_level(struct mm_ptable *ptable, ptable_addr_t begin, |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 359 | ptable_addr_t end, mm_attr_t attrs, |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 360 | struct mm_page_table *child_table, mm_level_t level, |
| 361 | struct mm_flags flags, struct mpool *ppool) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 362 | { |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 363 | pte_t *pte = &child_table->entries[mm_index(begin, level)]; |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 364 | ptable_addr_t level_end = mm_level_end(begin, level); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 365 | size_t entry_size = mm_entry_size(level); |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 366 | bool commit = flags.commit; |
| 367 | bool unmap = flags.unmap; |
| 368 | bool non_secure = ((attrs & (1ULL << 57)) != 0); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 369 | |
Andrew Scull | 265ada9 | 2018-07-30 15:19:01 +0100 | [diff] [blame] | 370 | /* Cap end so that we don't go over the current level max. */ |
| 371 | if (end > level_end) { |
| 372 | end = level_end; |
Andrew Scull | 7364a8e | 2018-07-19 15:39:29 +0100 | [diff] [blame] | 373 | } |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 374 | |
| 375 | /* Fill each entry in the table. */ |
Andrew Scull | 265ada9 | 2018-07-30 15:19:01 +0100 | [diff] [blame] | 376 | while (begin < end) { |
Andrew Walbran | 6324fc9 | 2018-10-03 11:46:43 +0100 | [diff] [blame] | 377 | if (unmap ? !arch_mm_pte_is_present(*pte, level) |
| 378 | : arch_mm_pte_is_block(*pte, level) && |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 379 | arch_mm_pte_attrs(*pte, level) == attrs) { |
Andrew Walbran | 6324fc9 | 2018-10-03 11:46:43 +0100 | [diff] [blame] | 380 | /* |
| 381 | * If the entry is already mapped with the right |
| 382 | * attributes, or already absent in the case of |
| 383 | * unmapping, no need to do anything; carry on to the |
| 384 | * next entry. |
| 385 | */ |
| 386 | } else if ((end - begin) >= entry_size && |
| 387 | (unmap || arch_mm_is_block_allowed(level)) && |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 388 | is_aligned(begin, entry_size)) { |
Andrew Walbran | 6324fc9 | 2018-10-03 11:46:43 +0100 | [diff] [blame] | 389 | /* |
| 390 | * If the entire entry is within the region we want to |
| 391 | * map, map/unmap the whole entry. |
| 392 | */ |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 393 | if (commit) { |
Wedson Almeida Filho | 7c91323 | 2018-11-23 18:20:29 +0000 | [diff] [blame] | 394 | pte_t new_pte = |
| 395 | unmap ? arch_mm_absent_pte(level) |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 396 | : arch_mm_block_pte( |
| 397 | level, pa_init(begin), |
| 398 | attrs); |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 399 | mm_replace_entry(ptable, begin, pte, new_pte, |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 400 | level, non_secure, ppool); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 401 | } |
| 402 | } else { |
Andrew Walbran | 6324fc9 | 2018-10-03 11:46:43 +0100 | [diff] [blame] | 403 | /* |
| 404 | * If the entry is already a subtable get it; otherwise |
| 405 | * replace it with an equivalent subtable and get that. |
| 406 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 407 | struct mm_page_table *nt = mm_populate_table_pte( |
| 408 | ptable, begin, pte, level, non_secure, ppool); |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 409 | if (nt == NULL) { |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 410 | return false; |
Andrew Scull | 7364a8e | 2018-07-19 15:39:29 +0100 | [diff] [blame] | 411 | } |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 412 | |
Andrew Walbran | 6324fc9 | 2018-10-03 11:46:43 +0100 | [diff] [blame] | 413 | /* |
| 414 | * Recurse to map/unmap the appropriate entries within |
| 415 | * the subtable. |
| 416 | */ |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 417 | if (!mm_map_level(ptable, begin, end, attrs, nt, |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 418 | level - 1, flags, ppool)) { |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 419 | return false; |
Andrew Scull | 7364a8e | 2018-07-19 15:39:29 +0100 | [diff] [blame] | 420 | } |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 421 | } |
| 422 | |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 423 | begin = mm_start_of_next_block(begin, level); |
Wedson Almeida Filho | 84a30a0 | 2018-07-23 20:05:05 +0100 | [diff] [blame] | 424 | pte++; |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 425 | } |
| 426 | |
| 427 | return true; |
| 428 | } |
| 429 | |
| 430 | /** |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 431 | * Updates the page table from the root to map the given address range to a |
Karl Meakin | aac3801 | 2025-02-07 23:57:37 +0000 | [diff] [blame] | 432 | * physical range using the provided (architecture-specific) attributes. |
| 433 | * |
| 434 | * Flags: |
| 435 | * - `flags.unmap`: unmap the given range instead of mapping it. |
| 436 | * - `flags.commit`: the change is only committed if this flag is set. |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 437 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 438 | static bool mm_ptable_identity_map(struct mm_ptable *ptable, paddr_t pa_begin, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 439 | paddr_t pa_end, mm_attr_t attrs, |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 440 | struct mm_flags flags, struct mpool *ppool) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 441 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 442 | mm_level_t root_level = mm_root_level(ptable); |
| 443 | ptable_addr_t ptable_end = mm_ptable_addr_space_end(ptable); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 444 | ptable_addr_t end = mm_round_up_to_page(pa_addr(pa_end)); |
Karl Meakin | c17ab27 | 2025-02-08 03:29:17 +0000 | [diff] [blame] | 445 | ptable_addr_t begin = mm_round_down_to_page(pa_addr(pa_begin)); |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 446 | struct mm_page_table *root_table = |
| 447 | &ptable->root_tables[mm_index(begin, root_level)]; |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 448 | |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 449 | /* |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 450 | * Assert condition to communicate the API constraint of |
| 451 | * mm_root_level(), that isn't encoded in the types, to the static |
| 452 | * analyzer. |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 453 | */ |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 454 | assert(root_level >= 3); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 455 | |
| 456 | /* Cap end to stay within the bounds of the page table. */ |
| 457 | if (end > ptable_end) { |
Karl Meakin | 3050695 | 2025-02-18 18:13:06 +0000 | [diff] [blame] | 458 | dlog_verbose( |
| 459 | "ptable_map: input range end falls outside of ptable " |
| 460 | "address space (%#016lx > %#016lx), capping to ptable " |
| 461 | "address space end\n", |
| 462 | end, ptable_end); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 463 | end = ptable_end; |
| 464 | } |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 465 | |
Karl Meakin | 3050695 | 2025-02-18 18:13:06 +0000 | [diff] [blame] | 466 | if (begin >= end) { |
| 467 | dlog_verbose( |
| 468 | "ptable_map: input range is backwards (%#016lx >= " |
| 469 | "%#016lx), request will have no effect\n", |
| 470 | begin, end); |
| 471 | } else if (pa_addr(pa_begin) >= pa_addr(pa_end)) { |
| 472 | dlog_verbose( |
| 473 | "ptable_map: input range was backwards (%#016lx >= " |
| 474 | "%#016lx), but due to rounding the range %#016lx to " |
| 475 | "%#016lx will be mapped\n", |
| 476 | begin, end, pa_addr(pa_begin), pa_addr(pa_end)); |
| 477 | } |
| 478 | |
Karl Meakin | aac3801 | 2025-02-07 23:57:37 +0000 | [diff] [blame] | 479 | while (begin < end) { |
| 480 | if (!mm_map_level(ptable, begin, end, attrs, root_table, |
| 481 | root_level - 1, flags, ppool)) { |
| 482 | return false; |
| 483 | } |
| 484 | begin = mm_start_of_next_block(begin, root_level); |
| 485 | root_table++; |
Andrew Walbran | 58a6e54 | 2019-11-19 14:23:15 +0000 | [diff] [blame] | 486 | } |
| 487 | |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 488 | /* |
| 489 | * All TLB invalidations must be complete already if any entries were |
| 490 | * replaced by mm_replace_entry. Sync all page table writes so that code |
| 491 | * following this can use them. |
| 492 | */ |
| 493 | arch_mm_sync_table_writes(); |
Andrew Walbran | 58a6e54 | 2019-11-19 14:23:15 +0000 | [diff] [blame] | 494 | |
| 495 | return true; |
| 496 | } |
| 497 | |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 498 | /* |
| 499 | * Prepares the given page table for the given address mapping such that it |
| 500 | * will be able to commit the change without failure. It does so by ensuring |
| 501 | * the smallest granularity needed is available. This remains valid provided |
Fuad Tabba | 9dc276f | 2020-07-16 09:29:32 +0100 | [diff] [blame] | 502 | * subsequent operations do not decrease the granularity. |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 503 | * |
| 504 | * In particular, multiple calls to this function will result in the |
| 505 | * corresponding calls to commit the changes to succeed. |
| 506 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 507 | static bool mm_ptable_identity_prepare(struct mm_ptable *ptable, |
| 508 | paddr_t pa_begin, paddr_t pa_end, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 509 | mm_attr_t attrs, struct mm_flags flags, |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 510 | struct mpool *ppool) |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 511 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 512 | flags.commit = false; |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 513 | return mm_ptable_identity_map(ptable, pa_begin, pa_end, attrs, flags, |
| 514 | ppool); |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 515 | } |
| 516 | |
| 517 | /** |
| 518 | * Commits the given address mapping to the page table assuming the operation |
| 519 | * cannot fail. `mm_ptable_identity_prepare` must used correctly before this to |
| 520 | * ensure this condition. |
| 521 | * |
| 522 | * Without the table being properly prepared, the commit may only partially |
| 523 | * complete if it runs out of memory resulting in an inconsistent state that |
| 524 | * isn't handled. |
| 525 | * |
| 526 | * Since the non-failure assumtion is used in the reasoning about the atomicity |
| 527 | * of higher level memory operations, any detected violations result in a panic. |
| 528 | * |
| 529 | * TODO: remove ppool argument to be sure no changes are made. |
| 530 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 531 | static void mm_ptable_identity_commit(struct mm_ptable *ptable, |
| 532 | paddr_t pa_begin, paddr_t pa_end, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 533 | mm_attr_t attrs, struct mm_flags flags, |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 534 | struct mpool *ppool) |
| 535 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 536 | flags.commit = true; |
| 537 | CHECK(mm_ptable_identity_map(ptable, pa_begin, pa_end, attrs, flags, |
| 538 | ppool)); |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 539 | } |
| 540 | |
Andrew Walbran | 58a6e54 | 2019-11-19 14:23:15 +0000 | [diff] [blame] | 541 | /** |
| 542 | * Updates the given table such that the given physical address range is mapped |
| 543 | * or not mapped into the address space with the architecture-agnostic mode |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 544 | * provided. |
| 545 | * |
| 546 | * The page table is updated using the separate prepare and commit stages so |
| 547 | * that, on failure, a partial update of the address space cannot happen. The |
| 548 | * table may be left with extra internal tables but the address space is |
| 549 | * unchanged. |
Andrew Walbran | 58a6e54 | 2019-11-19 14:23:15 +0000 | [diff] [blame] | 550 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 551 | static bool mm_ptable_identity_update(struct mm_ptable *ptable, |
| 552 | paddr_t pa_begin, paddr_t pa_end, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 553 | mm_attr_t attrs, struct mm_flags flags, |
Andrew Walbran | 58a6e54 | 2019-11-19 14:23:15 +0000 | [diff] [blame] | 554 | struct mpool *ppool) |
| 555 | { |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 556 | if (!mm_ptable_identity_prepare(ptable, pa_begin, pa_end, attrs, flags, |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 557 | ppool)) { |
| 558 | return false; |
Andrew Scull | 7364a8e | 2018-07-19 15:39:29 +0100 | [diff] [blame] | 559 | } |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 560 | |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 561 | mm_ptable_identity_commit(ptable, pa_begin, pa_end, attrs, flags, |
| 562 | ppool); |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 563 | |
| 564 | return true; |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 565 | } |
| 566 | |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 567 | static void mm_dump_entries(const pte_t *entries, mm_level_t level, |
| 568 | uint32_t indent); |
| 569 | |
| 570 | static void mm_dump_block_entry(pte_t entry, mm_level_t level, uint32_t indent) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 571 | { |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 572 | mm_attr_t attrs = arch_mm_pte_attrs(entry, level); |
| 573 | paddr_t addr = arch_mm_block_from_pte(entry, level); |
| 574 | |
| 575 | if (arch_mm_pte_is_valid(entry, level)) { |
| 576 | if (level == 0) { |
| 577 | dlog("page {\n"); |
| 578 | } else { |
| 579 | dlog("block {\n"); |
| 580 | } |
| 581 | } else { |
| 582 | dlog("invalid_block {\n"); |
| 583 | } |
| 584 | |
| 585 | indent += 1; |
| 586 | { |
| 587 | dlog_indent(indent, ".addr = %#016lx\n", pa_addr(addr)); |
| 588 | dlog_indent(indent, ".attrs = %#016lx\n", attrs); |
| 589 | } |
| 590 | indent -= 1; |
| 591 | dlog_indent(indent, "}"); |
| 592 | } |
| 593 | |
| 594 | // NOLINTNEXTLINE(misc-no-recursion) |
| 595 | static void mm_dump_table_entry(pte_t entry, mm_level_t level, uint32_t indent) |
| 596 | { |
| 597 | dlog("table {\n"); |
| 598 | indent += 1; |
| 599 | { |
| 600 | mm_attr_t attrs = arch_mm_pte_attrs(entry, level); |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 601 | const struct mm_page_table *child_table = |
Karl Meakin | aacfd4f | 2025-02-08 19:30:52 +0000 | [diff] [blame] | 602 | arch_mm_table_from_pte(entry, level); |
| 603 | paddr_t addr = pa_init((uintpaddr_t)child_table); |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 604 | |
| 605 | dlog_indent(indent, ".pte = %#016lx,\n", entry); |
| 606 | dlog_indent(indent, ".attrs = %#016lx,\n", attrs); |
| 607 | dlog_indent(indent, ".addr = %#016lx,\n", pa_addr(addr)); |
| 608 | dlog_indent(indent, ".entries = "); |
| 609 | mm_dump_entries(child_table->entries, level - 1, indent); |
| 610 | dlog(",\n"); |
| 611 | } |
| 612 | indent -= 1; |
| 613 | dlog_indent(indent, "}"); |
| 614 | } |
| 615 | |
| 616 | // NOLINTNEXTLINE(misc-no-recursion) |
| 617 | static void mm_dump_entry(pte_t entry, mm_level_t level, uint32_t indent) |
| 618 | { |
| 619 | switch (arch_mm_pte_type(entry, level)) { |
| 620 | case PTE_TYPE_ABSENT: |
| 621 | dlog("absent {}"); |
| 622 | break; |
| 623 | case PTE_TYPE_INVALID_BLOCK: |
| 624 | case PTE_TYPE_VALID_BLOCK: { |
| 625 | mm_dump_block_entry(entry, level, indent); |
| 626 | break; |
| 627 | } |
| 628 | case PTE_TYPE_TABLE: { |
| 629 | mm_dump_table_entry(entry, level, indent); |
| 630 | break; |
| 631 | } |
| 632 | } |
| 633 | } |
| 634 | |
| 635 | // NOLINTNEXTLINE(misc-no-recursion) |
| 636 | static void mm_dump_entries(const pte_t *entries, mm_level_t level, |
| 637 | uint32_t indent) |
| 638 | { |
| 639 | dlog("{\n"); |
| 640 | indent += 1; |
| 641 | |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 642 | for (size_t i = 0; i < MM_PTE_PER_PAGE; i++) { |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 643 | pte_t entry = entries[i]; |
Karl Meakin | 100b0b2 | 2025-02-08 00:59:25 +0000 | [diff] [blame] | 644 | |
| 645 | if (arch_mm_pte_is_absent(entry, level)) { |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 646 | continue; |
Andrew Scull | 7364a8e | 2018-07-19 15:39:29 +0100 | [diff] [blame] | 647 | } |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 648 | |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 649 | dlog_indent(indent, "[level = %u, index = %zu] = ", level, i); |
| 650 | mm_dump_entry(entry, level, indent); |
| 651 | dlog(",\n"); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 652 | } |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 653 | |
| 654 | indent -= 1; |
| 655 | dlog_indent(indent, "}"); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 656 | } |
| 657 | |
| 658 | /** |
Wedson Almeida Filho | ac8ad01 | 2018-12-17 18:00:29 +0000 | [diff] [blame] | 659 | * Writes the given table to the debug log. |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 660 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 661 | static void mm_ptable_dump(const struct mm_ptable *ptable) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 662 | { |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 663 | struct mm_page_table *root_tables = ptable->root_tables; |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 664 | mm_level_t root_level = mm_root_level(ptable); |
| 665 | uint8_t root_table_count = mm_root_table_count(ptable); |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 666 | uint32_t indent = 0; |
Wedson Almeida Filho | 81568c4 | 2019-01-04 13:33:02 +0000 | [diff] [blame] | 667 | |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 668 | dlog_indent(indent, "mm_ptable {\n"); |
| 669 | indent += 1; |
| 670 | { |
| 671 | dlog_indent(indent, ".stage = %s,\n", |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 672 | ptable->stage1 ? "stage1" : "stage2"); |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 673 | dlog_indent(indent, ".id = %hu,\n", ptable->id); |
| 674 | dlog_indent(indent, ".root_tables = {\n"); |
| 675 | |
| 676 | indent += 1; |
| 677 | { |
| 678 | for (size_t i = 0; i < root_table_count; ++i) { |
| 679 | dlog_indent( |
| 680 | indent, |
| 681 | "[level = %u, index = %zu].entries = ", |
| 682 | root_level, i); |
| 683 | mm_dump_entries(root_tables[i].entries, |
| 684 | root_level - 1, indent); |
| 685 | dlog(",\n"); |
| 686 | } |
| 687 | } |
| 688 | indent -= 1; |
| 689 | dlog_indent(indent, "},\n"); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 690 | } |
Karl Meakin | c88ad41 | 2025-02-11 16:04:49 +0000 | [diff] [blame] | 691 | indent -= 1; |
| 692 | dlog_indent(indent, "}\n"); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 693 | } |
| 694 | |
| 695 | /** |
Wedson Almeida Filho | ac8ad01 | 2018-12-17 18:00:29 +0000 | [diff] [blame] | 696 | * Given the table PTE entries all have identical attributes, returns the single |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 697 | * entry with which it can be replaced. |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 698 | */ |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 699 | static pte_t mm_merge_table_pte(pte_t table_pte, mm_level_t level) |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 700 | { |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 701 | struct mm_page_table *table; |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 702 | mm_attr_t block_attrs; |
| 703 | mm_attr_t table_attrs; |
| 704 | mm_attr_t combined_attrs; |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 705 | paddr_t block_address; |
| 706 | |
Karl Meakin | aacfd4f | 2025-02-08 19:30:52 +0000 | [diff] [blame] | 707 | table = arch_mm_table_from_pte(table_pte, level); |
Andrew Scull | b6b9b56 | 2018-12-21 14:41:35 +0000 | [diff] [blame] | 708 | |
| 709 | if (!arch_mm_pte_is_present(table->entries[0], level - 1)) { |
Andrew Scull | b6b9b56 | 2018-12-21 14:41:35 +0000 | [diff] [blame] | 710 | return arch_mm_absent_pte(level); |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 711 | } |
| 712 | |
Andrew Scull | b6b9b56 | 2018-12-21 14:41:35 +0000 | [diff] [blame] | 713 | /* Might not be possible to merge the table into a single block. */ |
| 714 | if (!arch_mm_is_block_allowed(level)) { |
| 715 | return table_pte; |
| 716 | } |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 717 | |
Andrew Scull | b6b9b56 | 2018-12-21 14:41:35 +0000 | [diff] [blame] | 718 | /* Replace table with a single block, with equivalent attributes. */ |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 719 | block_attrs = arch_mm_pte_attrs(table->entries[0], level - 1); |
Andrew Scull | b6b9b56 | 2018-12-21 14:41:35 +0000 | [diff] [blame] | 720 | table_attrs = arch_mm_pte_attrs(table_pte, level); |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 721 | combined_attrs = |
| 722 | arch_mm_combine_table_entry_attrs(table_attrs, block_attrs); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 723 | block_address = arch_mm_block_from_pte(table->entries[0], level - 1); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 724 | |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 725 | return arch_mm_block_pte(level, block_address, combined_attrs); |
| 726 | } |
| 727 | |
| 728 | /** |
Wedson Almeida Filho | ac8ad01 | 2018-12-17 18:00:29 +0000 | [diff] [blame] | 729 | * Defragments the given PTE by recursively replacing any tables with blocks or |
Andrew Scull | b6b9b56 | 2018-12-21 14:41:35 +0000 | [diff] [blame] | 730 | * absent entries where possible. |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 731 | */ |
Daniel Boulby | 8adf748 | 2021-09-22 15:12:44 +0100 | [diff] [blame] | 732 | // NOLINTNEXTLINE(misc-no-recursion) |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 733 | static void mm_ptable_defrag_entry(struct mm_ptable *ptable, |
| 734 | ptable_addr_t base_addr, pte_t *entry, |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 735 | mm_level_t level, bool non_secure, |
| 736 | struct mpool *ppool) |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 737 | { |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 738 | struct mm_page_table *child_table; |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 739 | bool mergeable; |
| 740 | bool base_present; |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 741 | mm_attr_t base_attrs; |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 742 | pte_t new_entry; |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 743 | |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 744 | if (!arch_mm_pte_is_table(*entry, level)) { |
| 745 | return; |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 746 | } |
| 747 | |
Karl Meakin | aacfd4f | 2025-02-08 19:30:52 +0000 | [diff] [blame] | 748 | child_table = arch_mm_table_from_pte(*entry, level); |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 749 | |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 750 | /* Defrag the first entry in the table and use it as the base entry. */ |
| 751 | static_assert(MM_PTE_PER_PAGE >= 1, "There must be at least one PTE."); |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 752 | |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 753 | mm_ptable_defrag_entry(ptable, base_addr, &(child_table->entries[0]), |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 754 | level - 1, non_secure, ppool); |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 755 | |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 756 | base_present = |
| 757 | arch_mm_pte_is_present(child_table->entries[0], level - 1); |
| 758 | base_attrs = arch_mm_pte_attrs(child_table->entries[0], level - 1); |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 759 | |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 760 | /* |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 761 | * Defrag the remaining entries in the table and check whether they are |
| 762 | * compatible with the base entry meaning the table can be merged into a |
| 763 | * block entry. It assumes addresses are contiguous due to identity |
| 764 | * mapping. |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 765 | */ |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 766 | mergeable = true; |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 767 | for (size_t i = 1; i < MM_PTE_PER_PAGE; ++i) { |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 768 | bool present; |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 769 | ptable_addr_t block_addr = |
| 770 | base_addr + (i * mm_entry_size(level - 1)); |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 771 | |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 772 | mm_ptable_defrag_entry(ptable, block_addr, |
| 773 | &(child_table->entries[i]), level - 1, |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 774 | non_secure, ppool); |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 775 | |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 776 | present = arch_mm_pte_is_present(child_table->entries[i], |
| 777 | level - 1); |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 778 | |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 779 | if (present != base_present) { |
| 780 | mergeable = false; |
| 781 | continue; |
| 782 | } |
| 783 | |
| 784 | if (!present) { |
| 785 | continue; |
| 786 | } |
| 787 | |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 788 | if (!arch_mm_pte_is_block(child_table->entries[i], level - 1)) { |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 789 | mergeable = false; |
| 790 | continue; |
| 791 | } |
| 792 | |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 793 | if (arch_mm_pte_attrs(child_table->entries[i], level - 1) != |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 794 | base_attrs) { |
| 795 | mergeable = false; |
| 796 | continue; |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 797 | } |
| 798 | } |
Andrew Scull | b6b9b56 | 2018-12-21 14:41:35 +0000 | [diff] [blame] | 799 | |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 800 | if (!mergeable) { |
| 801 | return; |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 802 | } |
| 803 | |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 804 | new_entry = mm_merge_table_pte(*entry, level); |
| 805 | if (*entry != new_entry) { |
Karl Meakin | 00dbf1b | 2025-02-07 17:58:39 +0000 | [diff] [blame] | 806 | mm_replace_entry(ptable, base_addr, entry, (uintptr_t)new_entry, |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 807 | level, non_secure, ppool); |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 808 | } |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 809 | } |
| 810 | |
| 811 | /** |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 812 | * Defragments the given page table by converting page table references to |
| 813 | * blocks whenever possible. |
| 814 | */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 815 | static void mm_ptable_defrag(struct mm_ptable *ptable, bool non_secure, |
| 816 | struct mpool *ppool) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 817 | { |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 818 | struct mm_page_table *root_tables = ptable->root_tables; |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 819 | mm_level_t root_level = mm_root_level(ptable); |
| 820 | uint8_t root_table_count = mm_root_table_count(ptable); |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 821 | ptable_addr_t block_addr = 0; |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 822 | |
| 823 | /* |
| 824 | * Loop through each entry in the table. If it points to another table, |
| 825 | * check if that table can be replaced by a block or an absent entry. |
| 826 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 827 | for (size_t i = 0; i < root_table_count; ++i) { |
| 828 | for (size_t j = 0; j < MM_PTE_PER_PAGE; ++j) { |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 829 | mm_ptable_defrag_entry( |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 830 | ptable, block_addr, &root_tables[i].entries[j], |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 831 | root_level - 1, non_secure, ppool); |
Karl Meakin | a3a9f95 | 2025-02-08 00:11:16 +0000 | [diff] [blame] | 832 | block_addr = mm_start_of_next_block(block_addr, |
| 833 | root_level - 1); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 834 | } |
Andrew Walbran | 2400ed2 | 2018-09-27 14:45:58 +0100 | [diff] [blame] | 835 | } |
Raghu Krishnamurthy | c1012d6 | 2021-01-24 19:19:31 -0800 | [diff] [blame] | 836 | |
| 837 | arch_mm_sync_table_writes(); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 838 | } |
| 839 | |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 840 | struct mm_get_attrs_state { |
| 841 | /** |
| 842 | * The attributes the range is mapped with. |
| 843 | * Only valid if `got_attrs` is true. |
| 844 | */ |
| 845 | mm_attr_t attrs; |
| 846 | /** |
| 847 | * The address of the first page that does not match the attributes of |
| 848 | * the pages before it in the range. |
| 849 | * Only valid if `got_mismatch` is true. |
| 850 | */ |
| 851 | ptable_addr_t mismatch; |
| 852 | bool got_attrs : 1; |
| 853 | bool got_mismatch : 1; |
| 854 | }; |
| 855 | |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 856 | /** |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 857 | * Gets the attributes applied to the given range of stage-2 addresses at the |
| 858 | * given level. |
| 859 | * |
| 860 | * The `got_attrs` argument is initially passed as false until `attrs` contains |
| 861 | * attributes of the memory region at which point it is passed as true. |
| 862 | * |
| 863 | * The value returned in `attrs` is only valid if the function returns true. |
| 864 | * |
| 865 | * Returns true if the whole range has the same attributes and false otherwise. |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 866 | */ |
Daniel Boulby | 8adf748 | 2021-09-22 15:12:44 +0100 | [diff] [blame] | 867 | // NOLINTNEXTLINE(misc-no-recursion) |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 868 | static struct mm_get_attrs_state mm_ptable_get_attrs_level( |
| 869 | const struct mm_page_table *table, ptable_addr_t begin, |
| 870 | ptable_addr_t end, mm_level_t level, struct mm_get_attrs_state state) |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 871 | { |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 872 | const pte_t *pte = &table->entries[mm_index(begin, level)]; |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 873 | ptable_addr_t level_end = mm_level_end(begin, level); |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 874 | |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 875 | /* Cap end so that we don't go over the current level max. */ |
| 876 | if (end > level_end) { |
| 877 | end = level_end; |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 878 | } |
| 879 | |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 880 | /* Check that each entry is owned. */ |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 881 | while (begin < end && !state.got_mismatch) { |
Karl Meakin | d969647 | 2025-02-18 14:07:25 +0000 | [diff] [blame] | 882 | switch (arch_mm_pte_type(*pte, level)) { |
| 883 | case PTE_TYPE_TABLE: { |
| 884 | const struct mm_page_table *child_table = |
| 885 | arch_mm_table_from_pte(*pte, level); |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 886 | state = mm_ptable_get_attrs_level( |
| 887 | child_table, begin, end, level - 1, state); |
Karl Meakin | d969647 | 2025-02-18 14:07:25 +0000 | [diff] [blame] | 888 | break; |
| 889 | } |
| 890 | |
| 891 | case PTE_TYPE_ABSENT: |
| 892 | case PTE_TYPE_INVALID_BLOCK: |
| 893 | case PTE_TYPE_VALID_BLOCK: { |
| 894 | mm_attr_t block_attrs = arch_mm_pte_attrs(*pte, level); |
| 895 | |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 896 | if (state.got_attrs && block_attrs != state.attrs) { |
| 897 | state.mismatch = begin; |
| 898 | state.got_mismatch = true; |
| 899 | continue; |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 900 | } |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 901 | |
| 902 | state.got_attrs = true; |
| 903 | state.attrs = block_attrs; |
Karl Meakin | d969647 | 2025-02-18 14:07:25 +0000 | [diff] [blame] | 904 | break; |
| 905 | } |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 906 | } |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 907 | |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 908 | begin = mm_start_of_next_block(begin, level); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 909 | pte++; |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 910 | } |
| 911 | |
Andrew Scull | c66a04d | 2018-12-07 13:41:56 +0000 | [diff] [blame] | 912 | /* The entry is a valid block. */ |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 913 | return state; |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 914 | } |
| 915 | |
| 916 | /** |
Raghu Krishnamurthy | 2323d72 | 2021-02-12 22:55:38 -0800 | [diff] [blame] | 917 | * Gets the attributes applied to the given range of addresses in the page |
| 918 | * tables. |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 919 | * |
| 920 | * The value returned in `attrs` is only valid if the function returns true. |
| 921 | * |
| 922 | * Returns true if the whole range has the same attributes and false otherwise. |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 923 | */ |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 924 | static struct mm_get_attrs_state mm_get_attrs(const struct mm_ptable *ptable, |
| 925 | ptable_addr_t begin, |
| 926 | ptable_addr_t end) |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 927 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 928 | mm_level_t root_level = mm_root_level(ptable); |
| 929 | ptable_addr_t ptable_end = mm_ptable_addr_space_end(ptable); |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 930 | struct mm_page_table *root_table; |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 931 | struct mm_get_attrs_state state = {0}; |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 932 | |
Karl Meakin | 3050695 | 2025-02-18 18:13:06 +0000 | [diff] [blame] | 933 | if (begin >= end) { |
| 934 | dlog_verbose( |
| 935 | "mm_get: input range is backwards (%#016lx >= " |
| 936 | "%#016lx)\n", |
| 937 | begin, end); |
| 938 | } |
| 939 | |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 940 | begin = mm_round_down_to_page(begin); |
| 941 | end = mm_round_up_to_page(end); |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 942 | |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 943 | /* Fail if the addresses are out of range. */ |
| 944 | if (end > ptable_end) { |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 945 | return state; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 946 | } |
| 947 | |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 948 | root_table = &ptable->root_tables[mm_index(begin, root_level)]; |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 949 | while (begin < end && !state.got_mismatch) { |
| 950 | state = mm_ptable_get_attrs_level(root_table, begin, end, |
| 951 | root_level - 1, state); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 952 | |
Karl Meakin | 25954e3 | 2025-02-07 16:12:51 +0000 | [diff] [blame] | 953 | begin = mm_start_of_next_block(begin, root_level); |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 954 | root_table++; |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 955 | } |
| 956 | |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 957 | return state; |
Wedson Almeida Filho | 2f94ec1 | 2018-07-26 16:00:48 +0100 | [diff] [blame] | 958 | } |
| 959 | |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 960 | bool mm_vm_init(struct mm_ptable *ptable, mm_asid_t id, struct mpool *ppool) |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 961 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 962 | return mm_ptable_init(ptable, id, false, ppool); |
Wedson Almeida Filho | fed6902 | 2018-07-11 15:39:12 +0100 | [diff] [blame] | 963 | } |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 964 | |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 965 | void mm_vm_fini(const struct mm_ptable *ptable, struct mpool *ppool) |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 966 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 967 | mm_ptable_fini(ptable, ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 968 | } |
| 969 | |
| 970 | /** |
Andrew Scull | 73b8954 | 2019-11-20 17:31:26 +0000 | [diff] [blame] | 971 | * Selects flags to pass to the page table manipulation operation based on the |
| 972 | * mapping mode. |
| 973 | */ |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 974 | static struct mm_flags mm_mode_to_flags(mm_mode_t mode) |
Andrew Scull | 73b8954 | 2019-11-20 17:31:26 +0000 | [diff] [blame] | 975 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 976 | struct mm_flags flags = {0}; |
| 977 | |
Andrew Scull | 73b8954 | 2019-11-20 17:31:26 +0000 | [diff] [blame] | 978 | if ((mode & MM_MODE_UNMAPPED_MASK) == MM_MODE_UNMAPPED_MASK) { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 979 | flags.unmap = true; |
Andrew Scull | 73b8954 | 2019-11-20 17:31:26 +0000 | [diff] [blame] | 980 | } |
| 981 | |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 982 | return flags; |
Andrew Scull | 73b8954 | 2019-11-20 17:31:26 +0000 | [diff] [blame] | 983 | } |
| 984 | |
| 985 | /** |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 986 | * See `mm_ptable_identity_prepare`. |
| 987 | * |
Raghu Krishnamurthy | 43fe93a | 2021-01-31 16:38:38 -0800 | [diff] [blame] | 988 | * This must be called before `mm_identity_commit` for the same mapping. |
| 989 | * |
| 990 | * Returns true on success, or false if the update would fail. |
| 991 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 992 | bool mm_identity_prepare(struct mm_ptable *ptable, paddr_t begin, paddr_t end, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 993 | mm_mode_t mode, struct mpool *ppool) |
Raghu Krishnamurthy | 43fe93a | 2021-01-31 16:38:38 -0800 | [diff] [blame] | 994 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 995 | struct mm_flags flags = mm_mode_to_flags(mode); |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 996 | |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 997 | assert(ptable->stage1); |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 998 | return mm_ptable_identity_prepare(ptable, begin, end, |
Raghu Krishnamurthy | 43fe93a | 2021-01-31 16:38:38 -0800 | [diff] [blame] | 999 | arch_mm_mode_to_stage1_attrs(mode), |
| 1000 | flags, ppool); |
| 1001 | } |
| 1002 | |
| 1003 | /** |
| 1004 | * See `mm_ptable_identity_commit`. |
| 1005 | * |
| 1006 | * `mm_identity_prepare` must be called before this for the same mapping. |
| 1007 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1008 | void *mm_identity_commit(struct mm_ptable *ptable, paddr_t begin, paddr_t end, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1009 | mm_mode_t mode, struct mpool *ppool) |
Raghu Krishnamurthy | 43fe93a | 2021-01-31 16:38:38 -0800 | [diff] [blame] | 1010 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 1011 | struct mm_flags flags = mm_mode_to_flags(mode); |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1012 | |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 1013 | assert(ptable->stage1); |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1014 | mm_ptable_identity_commit(ptable, begin, end, |
Raghu Krishnamurthy | 43fe93a | 2021-01-31 16:38:38 -0800 | [diff] [blame] | 1015 | arch_mm_mode_to_stage1_attrs(mode), flags, |
| 1016 | ppool); |
| 1017 | return ptr_from_va(va_from_pa(begin)); |
| 1018 | } |
| 1019 | |
| 1020 | /** |
| 1021 | * See `mm_ptable_identity_prepare`. |
| 1022 | * |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 1023 | * This must be called before `mm_vm_identity_commit` for the same mapping. |
Andrew Walbran | 8ec2b9f | 2019-11-25 15:05:40 +0000 | [diff] [blame] | 1024 | * |
| 1025 | * Returns true on success, or false if the update would fail. |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 1026 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1027 | bool mm_vm_identity_prepare(struct mm_ptable *ptable, paddr_t begin, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1028 | paddr_t end, mm_mode_t mode, struct mpool *ppool) |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 1029 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 1030 | struct mm_flags flags = mm_mode_to_flags(mode); |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 1031 | |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1032 | return mm_ptable_identity_prepare(ptable, begin, end, |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 1033 | arch_mm_mode_to_stage2_attrs(mode), |
| 1034 | flags, ppool); |
| 1035 | } |
| 1036 | |
| 1037 | /** |
| 1038 | * See `mm_ptable_identity_commit`. |
| 1039 | * |
| 1040 | * `mm_vm_identity_prepare` must be called before this for the same mapping. |
| 1041 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1042 | void mm_vm_identity_commit(struct mm_ptable *ptable, paddr_t begin, paddr_t end, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1043 | mm_mode_t mode, struct mpool *ppool, ipaddr_t *ipa) |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 1044 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 1045 | struct mm_flags flags = mm_mode_to_flags(mode); |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 1046 | |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1047 | mm_ptable_identity_commit(ptable, begin, end, |
Andrew Scull | 4e83cef | 2019-11-19 14:17:54 +0000 | [diff] [blame] | 1048 | arch_mm_mode_to_stage2_attrs(mode), flags, |
| 1049 | ppool); |
| 1050 | |
| 1051 | if (ipa != NULL) { |
| 1052 | *ipa = ipa_from_pa(begin); |
| 1053 | } |
| 1054 | } |
| 1055 | |
| 1056 | /** |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1057 | * Updates a VM's page table such that the given physical address range is |
| 1058 | * mapped in the address space at the corresponding address range in the |
Andrew Scull | fe636b1 | 2018-07-30 14:15:54 +0100 | [diff] [blame] | 1059 | * architecture-agnostic mode provided. |
Andrew Walbran | 8ec2b9f | 2019-11-25 15:05:40 +0000 | [diff] [blame] | 1060 | * |
| 1061 | * mm_vm_defrag should always be called after a series of page table updates, |
| 1062 | * whether they succeed or fail. This is because on failure extra page table |
| 1063 | * entries may have been allocated and then not used, while on success it may be |
| 1064 | * possible to compact the page table by merging several entries into a block. |
| 1065 | * |
| 1066 | * Returns true on success, or false if the update failed and no changes were |
| 1067 | * made. |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1068 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1069 | bool mm_vm_identity_map(struct mm_ptable *ptable, paddr_t begin, paddr_t end, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1070 | mm_mode_t mode, struct mpool *ppool, ipaddr_t *ipa) |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1071 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 1072 | struct mm_flags flags = mm_mode_to_flags(mode); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1073 | bool success = mm_ptable_identity_update( |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1074 | ptable, begin, end, arch_mm_mode_to_stage2_attrs(mode), flags, |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1075 | ppool); |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1076 | |
| 1077 | if (success && ipa != NULL) { |
| 1078 | *ipa = ipa_from_pa(begin); |
| 1079 | } |
| 1080 | |
| 1081 | return success; |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1082 | } |
| 1083 | |
| 1084 | /** |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1085 | * Updates the VM's table such that the given physical address range has no |
| 1086 | * connection to the VM. |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1087 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1088 | bool mm_vm_unmap(struct mm_ptable *ptable, paddr_t begin, paddr_t end, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 1089 | struct mpool *ppool) |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1090 | { |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1091 | mm_mode_t mode = MM_MODE_UNMAPPED_MASK; |
Andrew Scull | 73b8954 | 2019-11-20 17:31:26 +0000 | [diff] [blame] | 1092 | |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1093 | return mm_vm_identity_map(ptable, begin, end, mode, ppool, NULL); |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1094 | } |
| 1095 | |
| 1096 | /** |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1097 | * Write the given page table of a VM to the debug log. |
| 1098 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1099 | void mm_vm_dump(const struct mm_ptable *ptable) |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1100 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 1101 | mm_ptable_dump(ptable); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1102 | } |
| 1103 | |
| 1104 | /** |
Raghu Krishnamurthy | 7ad3d14 | 2021-03-28 00:47:35 -0700 | [diff] [blame] | 1105 | * Defragments a stage1 page table. |
| 1106 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1107 | void mm_stage1_defrag(struct mm_ptable *ptable, struct mpool *ppool) |
Raghu Krishnamurthy | 7ad3d14 | 2021-03-28 00:47:35 -0700 | [diff] [blame] | 1108 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 1109 | assert(ptable->stage1); |
| 1110 | mm_ptable_defrag(ptable, false, ppool); |
Raghu Krishnamurthy | 7ad3d14 | 2021-03-28 00:47:35 -0700 | [diff] [blame] | 1111 | } |
| 1112 | |
| 1113 | /** |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1114 | * Defragments the VM page table. |
| 1115 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1116 | void mm_vm_defrag(struct mm_ptable *ptable, struct mpool *ppool, |
| 1117 | bool non_secure) |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1118 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 1119 | mm_ptable_defrag(ptable, non_secure, ppool); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 1120 | } |
| 1121 | |
| 1122 | /** |
Fuad Tabba | 9dc276f | 2020-07-16 09:29:32 +0100 | [diff] [blame] | 1123 | * Gets the mode of the given range of intermediate physical addresses if they |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 1124 | * are mapped with the same mode. |
| 1125 | * |
| 1126 | * Returns true if the range is mapped with the same mode and false otherwise. |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1127 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1128 | bool mm_vm_get_mode(const struct mm_ptable *ptable, ipaddr_t begin, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1129 | ipaddr_t end, mm_mode_t *mode) |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1130 | { |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 1131 | struct mm_get_attrs_state ret; |
| 1132 | bool success; |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 1133 | |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 1134 | ret = mm_get_attrs(ptable, ipa_addr(begin), ipa_addr(end)); |
| 1135 | success = ret.got_attrs && !ret.got_mismatch; |
| 1136 | |
| 1137 | if (success && mode != NULL) { |
| 1138 | *mode = arch_mm_stage2_attrs_to_mode(ret.attrs); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 1139 | } |
| 1140 | |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 1141 | return success; |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1142 | } |
| 1143 | |
Karl Meakin | b2b5ff7 | 2025-02-19 15:47:56 +0000 | [diff] [blame] | 1144 | bool mm_vm_get_mode_partial(const struct mm_ptable *ptable, ipaddr_t begin, |
| 1145 | ipaddr_t end, mm_mode_t *mode, ipaddr_t *end_ret) |
| 1146 | { |
| 1147 | struct mm_get_attrs_state ret; |
| 1148 | bool success; |
| 1149 | |
| 1150 | ret = mm_get_attrs(ptable, ipa_addr(begin), ipa_addr(end)); |
| 1151 | success = ret.got_attrs; |
| 1152 | |
| 1153 | if (success && mode != NULL) { |
| 1154 | *mode = arch_mm_stage2_attrs_to_mode(ret.attrs); |
| 1155 | } |
| 1156 | |
| 1157 | if (success && end_ret != NULL) { |
| 1158 | *end_ret = ret.mismatch ? ipa_init(ret.mismatch) : end; |
| 1159 | } |
| 1160 | |
| 1161 | return success; |
| 1162 | } |
| 1163 | |
Raghu Krishnamurthy | 2323d72 | 2021-02-12 22:55:38 -0800 | [diff] [blame] | 1164 | /** |
| 1165 | * Gets the mode of the given range of virtual addresses if they |
| 1166 | * are mapped with the same mode. |
| 1167 | * |
| 1168 | * Returns true if the range is mapped with the same mode and false otherwise. |
| 1169 | */ |
Karl Meakin | d64aaf8 | 2025-02-08 01:12:55 +0000 | [diff] [blame] | 1170 | bool mm_get_mode(const struct mm_ptable *ptable, vaddr_t begin, vaddr_t end, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1171 | mm_mode_t *mode) |
Raghu Krishnamurthy | 2323d72 | 2021-02-12 22:55:38 -0800 | [diff] [blame] | 1172 | { |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 1173 | struct mm_get_attrs_state ret; |
| 1174 | bool success; |
Raghu Krishnamurthy | 2323d72 | 2021-02-12 22:55:38 -0800 | [diff] [blame] | 1175 | |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 1176 | assert(ptable->stage1); |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 1177 | |
| 1178 | ret = mm_get_attrs(ptable, va_addr(begin), va_addr(end)); |
| 1179 | success = ret.got_attrs && !ret.got_mismatch; |
| 1180 | |
| 1181 | if (success && mode != NULL) { |
| 1182 | *mode = arch_mm_stage1_attrs_to_mode(ret.attrs); |
Raghu Krishnamurthy | 2323d72 | 2021-02-12 22:55:38 -0800 | [diff] [blame] | 1183 | } |
| 1184 | |
Karl Meakin | d127a45 | 2025-02-18 16:25:45 +0000 | [diff] [blame] | 1185 | return success; |
Raghu Krishnamurthy | 2323d72 | 2021-02-12 22:55:38 -0800 | [diff] [blame] | 1186 | } |
| 1187 | |
Karl Meakin | b2b5ff7 | 2025-02-19 15:47:56 +0000 | [diff] [blame] | 1188 | bool mm_get_mode_partial(const struct mm_ptable *ptable, vaddr_t begin, |
| 1189 | vaddr_t end, mm_mode_t *mode, vaddr_t *end_ret) |
| 1190 | { |
| 1191 | struct mm_get_attrs_state ret; |
| 1192 | bool success; |
| 1193 | |
| 1194 | assert(ptable->stage1); |
| 1195 | |
| 1196 | ret = mm_get_attrs(ptable, va_addr(begin), va_addr(end)); |
| 1197 | success = ret.got_attrs; |
| 1198 | |
| 1199 | if (success && mode != NULL) { |
| 1200 | *mode = arch_mm_stage1_attrs_to_mode(ret.attrs); |
| 1201 | } |
| 1202 | |
| 1203 | if (success && end_ret != NULL) { |
| 1204 | *end_ret = ret.mismatch ? va_init(ret.mismatch) : end; |
| 1205 | } |
| 1206 | |
| 1207 | return success; |
| 1208 | } |
| 1209 | |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1210 | static struct mm_stage1_locked mm_stage1_lock_unsafe(void) |
| 1211 | { |
| 1212 | return (struct mm_stage1_locked){.ptable = &ptable}; |
| 1213 | } |
| 1214 | |
Raghu Krishnamurthy | d3ab8c3 | 2021-02-10 19:11:30 -0800 | [diff] [blame] | 1215 | struct mm_stage1_locked mm_lock_ptable_unsafe(struct mm_ptable *ptable) |
| 1216 | { |
| 1217 | return (struct mm_stage1_locked){.ptable = ptable}; |
| 1218 | } |
| 1219 | |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1220 | struct mm_stage1_locked mm_lock_stage1(void) |
| 1221 | { |
| 1222 | sl_lock(&ptable_lock); |
| 1223 | return mm_stage1_lock_unsafe(); |
| 1224 | } |
| 1225 | |
| 1226 | void mm_unlock_stage1(struct mm_stage1_locked *lock) |
| 1227 | { |
Andrew Scull | 877ae4b | 2019-07-02 12:52:33 +0100 | [diff] [blame] | 1228 | CHECK(lock->ptable == &ptable); |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1229 | sl_unlock(&ptable_lock); |
| 1230 | lock->ptable = NULL; |
| 1231 | } |
| 1232 | |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1233 | /** |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1234 | * Updates the hypervisor page table such that the given physical address range |
| 1235 | * is mapped into the address space at the corresponding address range in the |
| 1236 | * architecture-agnostic mode provided. |
| 1237 | */ |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1238 | void *mm_identity_map(struct mm_stage1_locked stage1_locked, paddr_t begin, |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1239 | paddr_t end, mm_mode_t mode, struct mpool *ppool) |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1240 | { |
Karl Meakin | 1fd4b82 | 2025-02-01 17:13:47 +0000 | [diff] [blame] | 1241 | struct mm_flags flags = mm_mode_to_flags(mode); |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1242 | |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 1243 | assert(stage1_locked.ptable->stage1); |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1244 | if (mm_ptable_identity_update(stage1_locked.ptable, begin, end, |
Andrew Scull | 73b8954 | 2019-11-20 17:31:26 +0000 | [diff] [blame] | 1245 | arch_mm_mode_to_stage1_attrs(mode), flags, |
| 1246 | ppool)) { |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 1247 | return ptr_from_va(va_from_pa(begin)); |
Andrew Scull | 8087132 | 2018-08-06 12:04:09 +0100 | [diff] [blame] | 1248 | } |
| 1249 | |
| 1250 | return NULL; |
| 1251 | } |
| 1252 | |
| 1253 | /** |
| 1254 | * Updates the hypervisor table such that the given physical address range is |
| 1255 | * not mapped in the address space. |
| 1256 | */ |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1257 | bool mm_unmap(struct mm_stage1_locked stage1_locked, paddr_t begin, paddr_t end, |
| 1258 | struct mpool *ppool) |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1259 | { |
Karl Meakin | 07a69ab | 2025-02-07 14:53:19 +0000 | [diff] [blame] | 1260 | mm_mode_t mode = MM_MODE_UNMAPPED_MASK; |
Andrew Scull | 73b8954 | 2019-11-20 17:31:26 +0000 | [diff] [blame] | 1261 | |
| 1262 | return mm_identity_map(stage1_locked, begin, end, mode, ppool); |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1263 | } |
| 1264 | |
| 1265 | /** |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1266 | * Defragments the hypervisor page table. |
| 1267 | */ |
| 1268 | void mm_defrag(struct mm_stage1_locked stage1_locked, struct mpool *ppool) |
| 1269 | { |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 1270 | assert(stage1_locked.ptable->stage1); |
| 1271 | mm_ptable_defrag(stage1_locked.ptable, false, ppool); |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1272 | } |
| 1273 | |
| 1274 | /** |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1275 | * Initialises memory management for the hypervisor itself. |
| 1276 | */ |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 1277 | bool mm_init(struct mpool *ppool) |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1278 | { |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1279 | /* Locking is not enabled yet so fake it, */ |
| 1280 | struct mm_stage1_locked stage1_locked = mm_stage1_lock_unsafe(); |
| 1281 | |
Karl Meakin | e8937d9 | 2024-03-19 16:04:25 +0000 | [diff] [blame] | 1282 | dlog_info("text: %#lx - %#lx\n", pa_addr(layout_text_begin()), |
Andrew Walbran | 17eebf9 | 2020-02-05 16:35:49 +0000 | [diff] [blame] | 1283 | pa_addr(layout_text_end())); |
Karl Meakin | e8937d9 | 2024-03-19 16:04:25 +0000 | [diff] [blame] | 1284 | dlog_info("rodata: %#lx - %#lx\n", pa_addr(layout_rodata_begin()), |
Andrew Walbran | 17eebf9 | 2020-02-05 16:35:49 +0000 | [diff] [blame] | 1285 | pa_addr(layout_rodata_end())); |
Karl Meakin | e8937d9 | 2024-03-19 16:04:25 +0000 | [diff] [blame] | 1286 | dlog_info("data: %#lx - %#lx\n", pa_addr(layout_data_begin()), |
Andrew Walbran | 17eebf9 | 2020-02-05 16:35:49 +0000 | [diff] [blame] | 1287 | pa_addr(layout_data_end())); |
Karl Meakin | e8937d9 | 2024-03-19 16:04:25 +0000 | [diff] [blame] | 1288 | dlog_info("stacks: %#lx - %#lx\n", pa_addr(layout_stacks_begin()), |
Maksims Svecovs | 134b8f9 | 2022-03-04 15:14:09 +0000 | [diff] [blame] | 1289 | pa_addr(layout_stacks_end())); |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1290 | |
Raghu Krishnamurthy | 0132b51 | 2021-02-03 14:13:26 -0800 | [diff] [blame] | 1291 | /* ASID 0 is reserved for use by the hypervisor. */ |
Karl Meakin | 0f506a1 | 2025-02-08 23:28:45 +0000 | [diff] [blame] | 1292 | if (!mm_ptable_init(&ptable, 0, true, ppool)) { |
Andrew Walbran | 17eebf9 | 2020-02-05 16:35:49 +0000 | [diff] [blame] | 1293 | dlog_error("Unable to allocate memory for page table.\n"); |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1294 | return false; |
| 1295 | } |
| 1296 | |
Arunachalam Ganapathy | 0f0f706 | 2022-01-26 17:09:53 +0000 | [diff] [blame] | 1297 | /* Initialize arch_mm before calling below mapping routines */ |
Karl Meakin | e1aeb1d | 2025-02-08 00:35:14 +0000 | [diff] [blame] | 1298 | if (!arch_mm_init(&ptable)) { |
Arunachalam Ganapathy | 0f0f706 | 2022-01-26 17:09:53 +0000 | [diff] [blame] | 1299 | return false; |
| 1300 | } |
| 1301 | |
Andrew Walbran | 4869936 | 2019-05-20 14:38:00 +0100 | [diff] [blame] | 1302 | /* Let console driver map pages for itself. */ |
Andrew Scull | 3c0a90a | 2019-07-01 11:55:53 +0100 | [diff] [blame] | 1303 | plat_console_mm_init(stage1_locked, ppool); |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1304 | |
| 1305 | /* Map each section. */ |
Raghu Krishnamurthy | 472a882 | 2022-10-04 21:28:59 -0700 | [diff] [blame] | 1306 | CHECK(mm_identity_map(stage1_locked, layout_text_begin(), |
| 1307 | layout_text_end(), MM_MODE_X, ppool) != NULL); |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1308 | |
Raghu Krishnamurthy | 472a882 | 2022-10-04 21:28:59 -0700 | [diff] [blame] | 1309 | CHECK(mm_identity_map(stage1_locked, layout_rodata_begin(), |
| 1310 | layout_rodata_end(), MM_MODE_R, ppool) != NULL); |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1311 | |
Raghu Krishnamurthy | 472a882 | 2022-10-04 21:28:59 -0700 | [diff] [blame] | 1312 | CHECK(mm_identity_map(stage1_locked, layout_data_begin(), |
| 1313 | layout_data_end(), MM_MODE_R | MM_MODE_W, |
| 1314 | ppool) != NULL); |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1315 | |
Maksims Svecovs | 134b8f9 | 2022-03-04 15:14:09 +0000 | [diff] [blame] | 1316 | /* Arch-specific stack mapping. */ |
Raghu Krishnamurthy | 472a882 | 2022-10-04 21:28:59 -0700 | [diff] [blame] | 1317 | CHECK(arch_stack_mm_init(stage1_locked, ppool)); |
Maksims Svecovs | 134b8f9 | 2022-03-04 15:14:09 +0000 | [diff] [blame] | 1318 | |
Arunachalam Ganapathy | 0f0f706 | 2022-01-26 17:09:53 +0000 | [diff] [blame] | 1319 | return true; |
Wedson Almeida Filho | fdf4afc | 2018-07-19 15:45:21 +0100 | [diff] [blame] | 1320 | } |