Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 1 | /* |
Andrew Walbran | 692b325 | 2019-03-07 15:51:31 +0000 | [diff] [blame] | 2 | * Copyright 2018 The Hafnium Authors. |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * https://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 17 | #include <gmock/gmock.h> |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 18 | |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 19 | extern "C" { |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 20 | #include "hf/arch/mm.h" |
| 21 | |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 22 | #include "hf/mm.h" |
| 23 | #include "hf/mpool.h" |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 24 | } |
| 25 | |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 26 | #include <limits> |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 27 | #include <memory> |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 28 | #include <span> |
| 29 | #include <vector> |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 30 | |
Andrew Scull | 232d560 | 2018-10-15 11:07:45 +0100 | [diff] [blame] | 31 | namespace |
| 32 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 33 | using namespace ::std::placeholders; |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 34 | |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 35 | using ::testing::AllOf; |
| 36 | using ::testing::Contains; |
| 37 | using ::testing::Each; |
| 38 | using ::testing::Eq; |
Andrew Scull | 164f815 | 2019-11-19 14:29:55 +0000 | [diff] [blame^] | 39 | using ::testing::Not; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 40 | using ::testing::SizeIs; |
| 41 | using ::testing::Truly; |
| 42 | |
| 43 | constexpr size_t TEST_HEAP_SIZE = PAGE_SIZE * 16; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 44 | const int TOP_LEVEL = arch_mm_stage2_max_level(); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 45 | const paddr_t VM_MEM_END = pa_init(0x200'0000'0000); |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 46 | |
| 47 | /** |
| 48 | * Calculates the size of the address space represented by a page table entry at |
| 49 | * the given level. |
| 50 | */ |
Andrew Scull | 232d560 | 2018-10-15 11:07:45 +0100 | [diff] [blame] | 51 | size_t mm_entry_size(int level) |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 52 | { |
| 53 | return UINT64_C(1) << (PAGE_BITS + level * PAGE_LEVEL_BITS); |
| 54 | } |
| 55 | |
| 56 | /** |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 57 | * Checks whether the address is mapped in the address space. |
| 58 | */ |
| 59 | bool mm_vm_is_mapped(struct mm_ptable *t, ipaddr_t ipa) |
| 60 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 61 | uint32_t mode; |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 62 | return mm_vm_get_mode(t, ipa, ipa_add(ipa, 1), &mode) && |
| 63 | (mode & MM_MODE_INVALID) == 0; |
| 64 | } |
| 65 | |
| 66 | /** |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 67 | * Get an STL representation of the page table. |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 68 | */ |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 69 | std::span<pte_t, MM_PTE_PER_PAGE> get_table(paddr_t pa) |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 70 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 71 | auto table = reinterpret_cast<struct mm_page_table *>( |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 72 | ptr_from_va(va_from_pa(pa))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 73 | return std::span<pte_t>(table->entries, std::end(table->entries)); |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | /** |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 77 | * Get an STL representation of the ptable. |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 78 | */ |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 79 | std::vector<std::span<pte_t, MM_PTE_PER_PAGE>> get_ptable( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 80 | const struct mm_ptable &ptable) |
Andrew Scull | 4e5f814 | 2018-10-12 14:37:19 +0100 | [diff] [blame] | 81 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 82 | std::vector<std::span<pte_t, MM_PTE_PER_PAGE>> all; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 83 | const uint8_t root_table_count = arch_mm_stage2_root_table_count(); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 84 | for (uint8_t i = 0; i < root_table_count; ++i) { |
| 85 | all.push_back(get_table( |
| 86 | pa_add(ptable.root, i * sizeof(struct mm_page_table)))); |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 87 | } |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 88 | return all; |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 89 | } |
| 90 | |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 91 | class mm : public ::testing::Test |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 92 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 93 | void SetUp() override |
| 94 | { |
| 95 | /* |
| 96 | * TODO: replace with direct use of stdlib allocator so |
| 97 | * sanitizers are more effective. |
| 98 | */ |
| 99 | test_heap = std::make_unique<uint8_t[]>(TEST_HEAP_SIZE); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 100 | mpool_init(&ppool, sizeof(struct mm_page_table)); |
| 101 | mpool_add_chunk(&ppool, test_heap.get(), TEST_HEAP_SIZE); |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 102 | } |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 103 | |
| 104 | std::unique_ptr<uint8_t[]> test_heap; |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 105 | |
| 106 | protected: |
| 107 | struct mpool ppool; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 108 | }; |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 109 | |
| 110 | /** |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 111 | * A new table is initially empty. |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 112 | */ |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 113 | TEST_F(mm, ptable_init_empty) |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 114 | { |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 115 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 116 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 117 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 118 | get_ptable(ptable), |
| 119 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
| 120 | mm_vm_fini(&ptable, &ppool); |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 121 | } |
| 122 | |
| 123 | /** |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 124 | * Each new concatenated table is initially empty. |
| 125 | */ |
| 126 | TEST_F(mm, ptable_init_concatenated_empty) |
| 127 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 128 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 129 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 130 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 131 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 132 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 133 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | /** |
| 137 | * Only the first page is mapped with all others left absent. |
| 138 | */ |
| 139 | TEST_F(mm, map_first_page) |
| 140 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 141 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 142 | const paddr_t page_begin = pa_init(0); |
| 143 | const paddr_t page_end = pa_add(page_begin, PAGE_SIZE); |
| 144 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 145 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 146 | ASSERT_TRUE(mm_vm_identity_map(&ptable, page_begin, page_end, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 147 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 148 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 149 | auto tables = get_ptable(ptable); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 150 | EXPECT_THAT(tables, SizeIs(4)); |
| 151 | ASSERT_THAT(TOP_LEVEL, Eq(2)); |
| 152 | |
| 153 | /* Check that the first page is mapped and nothing else. */ |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 154 | EXPECT_THAT(std::span(tables).last(3), |
| 155 | Each(Each(arch_mm_absent_pte(TOP_LEVEL)))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 156 | |
| 157 | auto table_l2 = tables.front(); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 158 | EXPECT_THAT(table_l2.subspan(1), Each(arch_mm_absent_pte(TOP_LEVEL))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 159 | ASSERT_TRUE(arch_mm_pte_is_table(table_l2[0], TOP_LEVEL)); |
| 160 | |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 161 | auto table_l1 = |
| 162 | get_table(arch_mm_table_from_pte(table_l2[0], TOP_LEVEL)); |
| 163 | EXPECT_THAT(table_l1.subspan(1), |
| 164 | Each(arch_mm_absent_pte(TOP_LEVEL - 1))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 165 | ASSERT_TRUE(arch_mm_pte_is_table(table_l1[0], TOP_LEVEL - 1)); |
| 166 | |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 167 | auto table_l0 = |
| 168 | get_table(arch_mm_table_from_pte(table_l1[0], TOP_LEVEL - 1)); |
| 169 | EXPECT_THAT(table_l0.subspan(1), |
| 170 | Each(arch_mm_absent_pte(TOP_LEVEL - 2))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 171 | ASSERT_TRUE(arch_mm_pte_is_block(table_l0[0], TOP_LEVEL - 2)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 172 | EXPECT_THAT(pa_addr(arch_mm_block_from_pte(table_l0[0], TOP_LEVEL - 2)), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 173 | Eq(pa_addr(page_begin))); |
| 174 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 175 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 176 | } |
| 177 | |
| 178 | /** |
| 179 | * The start address is rounded down and the end address is rounded up to page |
| 180 | * boundaries. |
| 181 | */ |
| 182 | TEST_F(mm, map_round_to_page) |
| 183 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 184 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 185 | const paddr_t map_begin = pa_init(0x200'0000'0000 - PAGE_SIZE + 23); |
| 186 | const paddr_t map_end = pa_add(map_begin, 268); |
| 187 | ipaddr_t ipa = ipa_init(-1); |
| 188 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 189 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 190 | ASSERT_TRUE(mm_vm_identity_map(&ptable, map_begin, map_end, mode, &ipa, |
| 191 | &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 192 | EXPECT_THAT(ipa_addr(ipa), Eq(pa_addr(map_begin))); |
| 193 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 194 | auto tables = get_ptable(ptable); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 195 | EXPECT_THAT(tables, SizeIs(4)); |
| 196 | ASSERT_THAT(TOP_LEVEL, Eq(2)); |
| 197 | |
| 198 | /* Check that the last page is mapped, and nothing else. */ |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 199 | EXPECT_THAT(std::span(tables).first(3), |
| 200 | Each(Each(arch_mm_absent_pte(TOP_LEVEL)))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 201 | |
| 202 | auto table_l2 = tables.back(); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 203 | EXPECT_THAT(table_l2.first(table_l2.size() - 1), |
| 204 | Each(arch_mm_absent_pte(TOP_LEVEL))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 205 | ASSERT_TRUE(arch_mm_pte_is_table(table_l2.last(1)[0], TOP_LEVEL)); |
| 206 | |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 207 | auto table_l1 = get_table( |
| 208 | arch_mm_table_from_pte(table_l2.last(1)[0], TOP_LEVEL)); |
| 209 | EXPECT_THAT(table_l1.first(table_l1.size() - 1), |
| 210 | Each(arch_mm_absent_pte(TOP_LEVEL - 1))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 211 | ASSERT_TRUE(arch_mm_pte_is_table(table_l1.last(1)[0], TOP_LEVEL - 1)); |
| 212 | |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 213 | auto table_l0 = get_table( |
| 214 | arch_mm_table_from_pte(table_l1.last(1)[0], TOP_LEVEL - 1)); |
| 215 | EXPECT_THAT(table_l0.first(table_l0.size() - 1), |
| 216 | Each(arch_mm_absent_pte(TOP_LEVEL - 2))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 217 | ASSERT_TRUE(arch_mm_pte_is_block(table_l0.last(1)[0], TOP_LEVEL - 2)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 218 | EXPECT_THAT(pa_addr(arch_mm_block_from_pte(table_l0.last(1)[0], |
| 219 | TOP_LEVEL - 2)), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 220 | Eq(0x200'0000'0000 - PAGE_SIZE)); |
| 221 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 222 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 223 | } |
| 224 | |
| 225 | /** |
| 226 | * Map a two page range over the boundary of two tables. |
| 227 | */ |
| 228 | TEST_F(mm, map_across_tables) |
| 229 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 230 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 231 | const paddr_t map_begin = pa_init(0x80'0000'0000 - PAGE_SIZE); |
| 232 | const paddr_t map_end = pa_add(map_begin, 2 * PAGE_SIZE); |
| 233 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 234 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 235 | ASSERT_TRUE(mm_vm_identity_map(&ptable, map_begin, map_end, mode, |
| 236 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 237 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 238 | auto tables = get_ptable(ptable); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 239 | EXPECT_THAT(tables, SizeIs(4)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 240 | EXPECT_THAT(std::span(tables).last(2), |
| 241 | Each(Each(arch_mm_absent_pte(TOP_LEVEL)))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 242 | ASSERT_THAT(TOP_LEVEL, Eq(2)); |
| 243 | |
| 244 | /* Check only the last page of the first table is mapped. */ |
| 245 | auto table0_l2 = tables.front(); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 246 | EXPECT_THAT(table0_l2.first(table0_l2.size() - 1), |
| 247 | Each(arch_mm_absent_pte(TOP_LEVEL))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 248 | ASSERT_TRUE(arch_mm_pte_is_table(table0_l2.last(1)[0], TOP_LEVEL)); |
| 249 | |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 250 | auto table0_l1 = get_table( |
| 251 | arch_mm_table_from_pte(table0_l2.last(1)[0], TOP_LEVEL)); |
| 252 | EXPECT_THAT(table0_l1.first(table0_l1.size() - 1), |
| 253 | Each(arch_mm_absent_pte(TOP_LEVEL - 1))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 254 | ASSERT_TRUE(arch_mm_pte_is_table(table0_l1.last(1)[0], TOP_LEVEL - 1)); |
| 255 | |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 256 | auto table0_l0 = get_table( |
| 257 | arch_mm_table_from_pte(table0_l1.last(1)[0], TOP_LEVEL - 1)); |
| 258 | EXPECT_THAT(table0_l0.first(table0_l0.size() - 1), |
| 259 | Each(arch_mm_absent_pte(TOP_LEVEL - 2))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 260 | ASSERT_TRUE(arch_mm_pte_is_block(table0_l0.last(1)[0], TOP_LEVEL - 2)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 261 | EXPECT_THAT(pa_addr(arch_mm_block_from_pte(table0_l0.last(1)[0], |
| 262 | TOP_LEVEL - 2)), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 263 | Eq(pa_addr(map_begin))); |
| 264 | |
Andrew Scull | 164f815 | 2019-11-19 14:29:55 +0000 | [diff] [blame^] | 265 | /* Check only the first page of the second table is mapped. */ |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 266 | auto table1_l2 = tables[1]; |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 267 | EXPECT_THAT(table1_l2.subspan(1), Each(arch_mm_absent_pte(TOP_LEVEL))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 268 | ASSERT_TRUE(arch_mm_pte_is_table(table1_l2[0], TOP_LEVEL)); |
| 269 | |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 270 | auto table1_l1 = |
| 271 | get_table(arch_mm_table_from_pte(table1_l2[0], TOP_LEVEL)); |
| 272 | EXPECT_THAT(table1_l1.subspan(1), |
| 273 | Each(arch_mm_absent_pte(TOP_LEVEL - 1))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 274 | ASSERT_TRUE(arch_mm_pte_is_table(table1_l1[0], TOP_LEVEL - 1)); |
| 275 | |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 276 | auto table1_l0 = |
| 277 | get_table(arch_mm_table_from_pte(table1_l1[0], TOP_LEVEL - 1)); |
| 278 | EXPECT_THAT(table1_l0.subspan(1), |
| 279 | Each(arch_mm_absent_pte(TOP_LEVEL - 2))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 280 | ASSERT_TRUE(arch_mm_pte_is_block(table1_l0[0], TOP_LEVEL - 2)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 281 | EXPECT_THAT( |
| 282 | pa_addr(arch_mm_block_from_pte(table1_l0[0], TOP_LEVEL - 2)), |
| 283 | Eq(pa_addr(pa_add(map_begin, PAGE_SIZE)))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 284 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 285 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 286 | } |
| 287 | |
| 288 | /** |
| 289 | * Mapping all of memory creates blocks at the highest level. |
| 290 | */ |
| 291 | TEST_F(mm, map_all_at_top_level) |
| 292 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 293 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 294 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 295 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 296 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 297 | nullptr, &ppool)); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 298 | auto tables = get_ptable(ptable); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 299 | EXPECT_THAT( |
| 300 | tables, |
| 301 | AllOf(SizeIs(4), Each(Each(Truly(std::bind(arch_mm_pte_is_block, |
| 302 | _1, TOP_LEVEL)))))); |
| 303 | for (uint64_t i = 0; i < tables.size(); ++i) { |
| 304 | for (uint64_t j = 0; j < MM_PTE_PER_PAGE; ++j) { |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 305 | EXPECT_THAT(pa_addr(arch_mm_block_from_pte(tables[i][j], |
| 306 | TOP_LEVEL)), |
| 307 | Eq((i * mm_entry_size(TOP_LEVEL + 1)) + |
| 308 | (j * mm_entry_size(TOP_LEVEL)))) |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 309 | << "i=" << i << " j=" << j; |
| 310 | } |
| 311 | } |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 312 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | /** |
| 316 | * Map all memory then trying to map a page again doesn't introduce a special |
| 317 | * mapping for that particular page. |
| 318 | */ |
| 319 | TEST_F(mm, map_already_mapped) |
| 320 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 321 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 322 | ipaddr_t ipa = ipa_init(-1); |
| 323 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 324 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 325 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 326 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 327 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), pa_init(PAGE_SIZE), |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 328 | mode, &ipa, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 329 | EXPECT_THAT(ipa_addr(ipa), Eq(0)); |
| 330 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 331 | get_ptable(ptable), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 332 | AllOf(SizeIs(4), Each(Each(Truly(std::bind(arch_mm_pte_is_block, |
| 333 | _1, TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 334 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 335 | } |
| 336 | |
| 337 | /** |
| 338 | * Mapping a reverse range, i.e. the end comes before the start, is treated as |
| 339 | * an empty range so no mappings are made. |
| 340 | */ |
| 341 | TEST_F(mm, map_reverse_range) |
| 342 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 343 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 344 | ipaddr_t ipa = ipa_init(-1); |
| 345 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 346 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 347 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0x1234'5678), |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 348 | pa_init(0x5000), mode, &ipa, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 349 | EXPECT_THAT(ipa_addr(ipa), Eq(0x1234'5678)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 350 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 351 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 352 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 353 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 354 | } |
| 355 | |
| 356 | /** |
| 357 | * Mapping a reverse range in the same page will map the page because the start |
| 358 | * of the range is rounded down and the end is rounded up. |
| 359 | * |
| 360 | * This serves as a form of documentation of behaviour rather than a |
| 361 | * requirement. Check whether any code relies on this before changing it. |
| 362 | */ |
| 363 | TEST_F(mm, map_reverse_range_quirk) |
| 364 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 365 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 366 | ipaddr_t ipa = ipa_init(-1); |
| 367 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 368 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 369 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(20), pa_init(10), mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 370 | &ipa, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 371 | EXPECT_THAT(ipa_addr(ipa), Eq(20)); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 372 | EXPECT_TRUE(mm_vm_is_mapped(&ptable, ipa)); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 373 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 374 | } |
| 375 | |
| 376 | /** |
| 377 | * Mapping a range up to the maximum address causes the range end to wrap to |
| 378 | * zero as it is rounded up to a page boundary meaning no memory is mapped. |
| 379 | * |
| 380 | * This serves as a form of documentation of behaviour rather than a |
| 381 | * requirement. Check whether any code relies on this before changing it. |
| 382 | */ |
| 383 | TEST_F(mm, map_last_address_quirk) |
| 384 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 385 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 386 | ipaddr_t ipa = ipa_init(-1); |
| 387 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 388 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 389 | ASSERT_TRUE(mm_vm_identity_map( |
| 390 | &ptable, pa_init(0), |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 391 | pa_init(std::numeric_limits<uintpaddr_t>::max()), mode, &ipa, |
| 392 | &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 393 | EXPECT_THAT(ipa_addr(ipa), Eq(0)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 394 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 395 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 396 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 397 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 398 | } |
| 399 | |
| 400 | /** |
| 401 | * Mapping a range that goes beyond the available memory clamps to the available |
| 402 | * range. |
| 403 | */ |
| 404 | TEST_F(mm, map_clamp_to_range) |
| 405 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 406 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 407 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 408 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 409 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), |
| 410 | pa_init(0xf32'0000'0000'0000), mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 411 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 412 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 413 | get_ptable(ptable), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 414 | AllOf(SizeIs(4), Each(Each(Truly(std::bind(arch_mm_pte_is_block, |
| 415 | _1, TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 416 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 417 | } |
| 418 | |
| 419 | /** |
| 420 | * Mapping a range outside of the available memory is ignored and doesn't alter |
| 421 | * the page tables. |
| 422 | */ |
| 423 | TEST_F(mm, map_ignore_out_of_range) |
| 424 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 425 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 426 | ipaddr_t ipa = ipa_init(-1); |
| 427 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 428 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 429 | ASSERT_TRUE(mm_vm_identity_map(&ptable, VM_MEM_END, |
| 430 | pa_init(0xf0'0000'0000'0000), mode, &ipa, |
| 431 | &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 432 | EXPECT_THAT(ipa_addr(ipa), Eq(pa_addr(VM_MEM_END))); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 433 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 434 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 435 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 436 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 437 | } |
| 438 | |
| 439 | /** |
| 440 | * Map a single page and then map all of memory which replaces the single page |
| 441 | * mapping with a higher level block mapping. |
| 442 | */ |
| 443 | TEST_F(mm, map_block_replaces_table) |
| 444 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 445 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 446 | const paddr_t page_begin = pa_init(34567 * PAGE_SIZE); |
| 447 | const paddr_t page_end = pa_add(page_begin, PAGE_SIZE); |
| 448 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 449 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 450 | ASSERT_TRUE(mm_vm_identity_map(&ptable, page_begin, page_end, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 451 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 452 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 453 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 454 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 455 | get_ptable(ptable), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 456 | AllOf(SizeIs(4), Each(Each(Truly(std::bind(arch_mm_pte_is_block, |
| 457 | _1, TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 458 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 459 | } |
| 460 | |
| 461 | /** |
| 462 | * Map all memory at the top level, unmapping a page and remapping at a lower |
| 463 | * level does not result in all memory being mapped at the top level again. |
| 464 | */ |
| 465 | TEST_F(mm, map_does_not_defrag) |
| 466 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 467 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 468 | const paddr_t page_begin = pa_init(12000 * PAGE_SIZE); |
| 469 | const paddr_t page_end = pa_add(page_begin, PAGE_SIZE); |
| 470 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 471 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 472 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 473 | nullptr, &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 474 | ASSERT_TRUE(mm_vm_unmap(&ptable, page_begin, page_end, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 475 | ASSERT_TRUE(mm_vm_identity_map(&ptable, page_begin, page_end, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 476 | nullptr, &ppool)); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 477 | EXPECT_THAT(get_ptable(ptable), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 478 | AllOf(SizeIs(4), |
| 479 | Each(Each(Truly(std::bind(arch_mm_pte_is_present, _1, |
| 480 | TOP_LEVEL)))), |
| 481 | Contains(Contains(Truly(std::bind( |
| 482 | arch_mm_pte_is_block, _1, TOP_LEVEL)))), |
| 483 | Contains(Contains(Truly(std::bind( |
| 484 | arch_mm_pte_is_table, _1, TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 485 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 486 | } |
| 487 | |
| 488 | /** |
| 489 | * If nothing is mapped, unmapping the hypervisor has no effect. |
| 490 | */ |
| 491 | TEST_F(mm, vm_unmap_hypervisor_not_mapped) |
| 492 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 493 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 494 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 495 | EXPECT_TRUE(mm_vm_unmap_hypervisor(&ptable, &ppool)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 496 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 497 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 498 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 499 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 500 | } |
| 501 | |
| 502 | /** |
| 503 | * If range is not mapped, unmapping has no effect. |
| 504 | */ |
| 505 | TEST_F(mm, unmap_not_mapped) |
| 506 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 507 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 508 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 509 | EXPECT_TRUE( |
| 510 | mm_vm_unmap(&ptable, pa_init(12345), pa_init(987652), &ppool)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 511 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 512 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 513 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 514 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 515 | } |
| 516 | |
| 517 | /** |
| 518 | * Unmapping everything should result in an empty page table with no subtables. |
| 519 | */ |
| 520 | TEST_F(mm, unmap_all) |
| 521 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 522 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 523 | const paddr_t l0_begin = pa_init(uintpaddr_t(524421) * PAGE_SIZE); |
| 524 | const paddr_t l0_end = pa_add(l0_begin, 17 * PAGE_SIZE); |
| 525 | const paddr_t l1_begin = pa_init(3 * mm_entry_size(1)); |
| 526 | const paddr_t l1_end = pa_add(l1_begin, 5 * mm_entry_size(1)); |
| 527 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 528 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 529 | ASSERT_TRUE(mm_vm_identity_map(&ptable, l0_begin, l0_end, mode, nullptr, |
| 530 | &ppool)); |
| 531 | ASSERT_TRUE(mm_vm_identity_map(&ptable, l1_begin, l1_end, mode, nullptr, |
| 532 | &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 533 | EXPECT_TRUE(mm_vm_unmap(&ptable, pa_init(0), VM_MEM_END, &ppool)); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 534 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 535 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 536 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 537 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 538 | } |
| 539 | |
| 540 | /** |
| 541 | * Unmap range is rounded to the containing pages. |
| 542 | */ |
| 543 | TEST_F(mm, unmap_round_to_page) |
| 544 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 545 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 546 | const paddr_t map_begin = pa_init(0x160'0000'0000 + PAGE_SIZE); |
| 547 | const paddr_t map_end = pa_add(map_begin, PAGE_SIZE); |
| 548 | struct mm_ptable ptable; |
Andrew Scull | 164f815 | 2019-11-19 14:29:55 +0000 | [diff] [blame^] | 549 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 550 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 551 | ASSERT_TRUE(mm_vm_identity_map(&ptable, map_begin, map_end, mode, |
| 552 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 553 | ASSERT_TRUE(mm_vm_unmap(&ptable, pa_add(map_begin, 93), |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 554 | pa_add(map_begin, 99), &ppool)); |
Andrew Scull | 164f815 | 2019-11-19 14:29:55 +0000 | [diff] [blame^] | 555 | |
| 556 | auto tables = get_ptable(ptable); |
| 557 | constexpr auto l3_index = 2; |
| 558 | |
| 559 | /* Check all other top level entries are empty... */ |
| 560 | EXPECT_THAT(std::span(tables).first(l3_index), |
| 561 | Each(Each(arch_mm_absent_pte(TOP_LEVEL)))); |
| 562 | EXPECT_THAT(std::span(tables).subspan(l3_index + 1), |
| 563 | Each(Each(arch_mm_absent_pte(TOP_LEVEL)))); |
| 564 | |
| 565 | /* Except the mapped page which is absent. */ |
| 566 | auto table_l2 = tables[l3_index]; |
| 567 | constexpr auto l2_index = 384; |
| 568 | EXPECT_THAT(table_l2.first(l2_index), |
| 569 | Each(arch_mm_absent_pte(TOP_LEVEL))); |
| 570 | ASSERT_TRUE(arch_mm_pte_is_table(table_l2[l2_index], TOP_LEVEL)); |
| 571 | EXPECT_THAT(table_l2.subspan(l2_index + 1), |
| 572 | Each(arch_mm_absent_pte(TOP_LEVEL))); |
| 573 | |
| 574 | auto table_l1 = get_table( |
| 575 | arch_mm_table_from_pte(table_l2[l2_index], TOP_LEVEL)); |
| 576 | ASSERT_TRUE(arch_mm_pte_is_table(table_l1.first(1)[0], TOP_LEVEL - 1)); |
| 577 | EXPECT_THAT(table_l1.subspan(1), |
| 578 | Each(arch_mm_absent_pte(TOP_LEVEL - 1))); |
| 579 | |
| 580 | auto table_l0 = get_table( |
| 581 | arch_mm_table_from_pte(table_l1.first(1)[0], TOP_LEVEL - 1)); |
| 582 | EXPECT_THAT(table_l0, Each(arch_mm_absent_pte(TOP_LEVEL - 2))); |
| 583 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 584 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 585 | } |
| 586 | |
| 587 | /** |
| 588 | * Unmap a range that of page mappings that spans multiple concatenated tables. |
| 589 | */ |
| 590 | TEST_F(mm, unmap_across_tables) |
| 591 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 592 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 593 | const paddr_t map_begin = pa_init(0x180'0000'0000 - PAGE_SIZE); |
| 594 | const paddr_t map_end = pa_add(map_begin, 2 * PAGE_SIZE); |
| 595 | struct mm_ptable ptable; |
Andrew Scull | 164f815 | 2019-11-19 14:29:55 +0000 | [diff] [blame^] | 596 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 597 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 598 | ASSERT_TRUE(mm_vm_identity_map(&ptable, map_begin, map_end, mode, |
| 599 | nullptr, &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 600 | ASSERT_TRUE(mm_vm_unmap(&ptable, map_begin, map_end, &ppool)); |
Andrew Scull | 164f815 | 2019-11-19 14:29:55 +0000 | [diff] [blame^] | 601 | |
| 602 | auto tables = get_ptable(ptable); |
| 603 | |
| 604 | /* Check the untouched tables are empty. */ |
| 605 | EXPECT_THAT(std::span(tables).first(2), |
| 606 | Each(Each(arch_mm_absent_pte(TOP_LEVEL)))); |
| 607 | |
| 608 | /* Check the last page is explicity marked as absent. */ |
| 609 | auto table2_l2 = tables[2]; |
| 610 | EXPECT_THAT(table2_l2.first(table2_l2.size() - 1), |
| 611 | Each(arch_mm_absent_pte(TOP_LEVEL))); |
| 612 | ASSERT_TRUE(arch_mm_pte_is_table(table2_l2.last(1)[0], TOP_LEVEL)); |
| 613 | |
| 614 | auto table2_l1 = get_table( |
| 615 | arch_mm_table_from_pte(table2_l2.last(1)[0], TOP_LEVEL)); |
| 616 | EXPECT_THAT(table2_l1.first(table2_l1.size() - 1), |
| 617 | Each(arch_mm_absent_pte(TOP_LEVEL - 1))); |
| 618 | ASSERT_TRUE(arch_mm_pte_is_table(table2_l1.last(1)[0], TOP_LEVEL - 1)); |
| 619 | |
| 620 | auto table2_l0 = get_table( |
| 621 | arch_mm_table_from_pte(table2_l1.last(1)[0], TOP_LEVEL - 1)); |
| 622 | EXPECT_THAT(table2_l0, Each(arch_mm_absent_pte(TOP_LEVEL - 2))); |
| 623 | |
| 624 | /* Check the first page is explicitly marked as absent. */ |
| 625 | auto table3_l2 = tables[3]; |
| 626 | ASSERT_TRUE(arch_mm_pte_is_table(table3_l2.first(1)[0], TOP_LEVEL)); |
| 627 | EXPECT_THAT(table3_l2.subspan(1), Each(arch_mm_absent_pte(TOP_LEVEL))); |
| 628 | |
| 629 | auto table3_l1 = get_table( |
| 630 | arch_mm_table_from_pte(table3_l2.first(1)[0], TOP_LEVEL)); |
| 631 | ASSERT_TRUE(arch_mm_pte_is_table(table3_l1.first(1)[0], TOP_LEVEL - 1)); |
| 632 | EXPECT_THAT(table3_l1.subspan(1), |
| 633 | Each(arch_mm_absent_pte(TOP_LEVEL - 1))); |
| 634 | |
| 635 | auto table3_l0 = get_table( |
| 636 | arch_mm_table_from_pte(table3_l1.first(1)[0], TOP_LEVEL - 1)); |
| 637 | EXPECT_THAT(table3_l0, Each(arch_mm_absent_pte(TOP_LEVEL - 2))); |
| 638 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 639 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 640 | } |
| 641 | |
| 642 | /** |
| 643 | * Unmapping outside the range of memory had no effect. |
| 644 | */ |
| 645 | TEST_F(mm, unmap_out_of_range) |
| 646 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 647 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 648 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 649 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 650 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 651 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 652 | ASSERT_TRUE(mm_vm_unmap(&ptable, VM_MEM_END, pa_init(0x4000'0000'0000), |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 653 | &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 654 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 655 | get_ptable(ptable), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 656 | AllOf(SizeIs(4), Each(Each(Truly(std::bind(arch_mm_pte_is_block, |
| 657 | _1, TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 658 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 659 | } |
| 660 | |
| 661 | /** |
| 662 | * Unmapping a reverse range, i.e. the end comes before the start, is treated as |
| 663 | * an empty range so no change is made. |
| 664 | */ |
| 665 | TEST_F(mm, unmap_reverse_range) |
| 666 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 667 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 668 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 669 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 670 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 671 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 672 | ASSERT_TRUE(mm_vm_unmap(&ptable, pa_init(0x80'a000'0000), pa_init(27), |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 673 | &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 674 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 675 | get_ptable(ptable), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 676 | AllOf(SizeIs(4), Each(Each(Truly(std::bind(arch_mm_pte_is_block, |
| 677 | _1, TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 678 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 679 | } |
| 680 | |
| 681 | /** |
| 682 | * Unmapping a reverse range in the same page will unmap the page because the |
| 683 | * start of the range is rounded down and the end is rounded up. |
| 684 | * |
| 685 | * This serves as a form of documentation of behaviour rather than a |
| 686 | * requirement. Check whether any code relies on this before changing it. |
| 687 | */ |
| 688 | TEST_F(mm, unmap_reverse_range_quirk) |
| 689 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 690 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 691 | const paddr_t page_begin = pa_init(0x180'0000'0000); |
| 692 | const paddr_t page_end = pa_add(page_begin, PAGE_SIZE); |
| 693 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 694 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 695 | ASSERT_TRUE(mm_vm_identity_map(&ptable, page_begin, page_end, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 696 | nullptr, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 697 | ASSERT_TRUE(mm_vm_unmap(&ptable, pa_add(page_begin, 100), |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 698 | pa_add(page_begin, 50), &ppool)); |
Andrew Scull | 164f815 | 2019-11-19 14:29:55 +0000 | [diff] [blame^] | 699 | |
| 700 | auto tables = get_ptable(ptable); |
| 701 | constexpr auto l3_index = 3; |
| 702 | |
| 703 | /* Check all other top level entries are empty... */ |
| 704 | EXPECT_THAT(std::span(tables).first(l3_index), |
| 705 | Each(Each(arch_mm_absent_pte(TOP_LEVEL)))); |
| 706 | |
| 707 | /* Except the mapped page which is absent. */ |
| 708 | auto table_l2 = tables[l3_index]; |
| 709 | ASSERT_TRUE(arch_mm_pte_is_table(table_l2.first(1)[0], TOP_LEVEL)); |
| 710 | EXPECT_THAT(table_l2.subspan(1), Each(arch_mm_absent_pte(TOP_LEVEL))); |
| 711 | |
| 712 | auto table_l1 = get_table( |
| 713 | arch_mm_table_from_pte(table_l2.first(1)[0], TOP_LEVEL)); |
| 714 | ASSERT_TRUE(arch_mm_pte_is_table(table_l1.first(1)[0], TOP_LEVEL - 1)); |
| 715 | EXPECT_THAT(table_l1.subspan(1), |
| 716 | Each(arch_mm_absent_pte(TOP_LEVEL - 1))); |
| 717 | |
| 718 | auto table_l0 = get_table( |
| 719 | arch_mm_table_from_pte(table_l1.first(1)[0], TOP_LEVEL - 1)); |
| 720 | EXPECT_THAT(table_l0, Each(arch_mm_absent_pte(TOP_LEVEL - 2))); |
| 721 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 722 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 723 | } |
| 724 | |
| 725 | /** |
| 726 | * Unmapping a range up to the maximum address causes the range end to wrap to |
| 727 | * zero as it is rounded up to a page boundary meaning no change is made. |
| 728 | * |
| 729 | * This serves as a form of documentation of behaviour rather than a |
| 730 | * requirement. Check whether any code relies on this before changing it. |
| 731 | */ |
| 732 | TEST_F(mm, unmap_last_address_quirk) |
| 733 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 734 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 735 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 736 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 737 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 738 | nullptr, &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 739 | ASSERT_TRUE(mm_vm_unmap( |
| 740 | &ptable, pa_init(0), |
| 741 | pa_init(std::numeric_limits<uintpaddr_t>::max()), &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 742 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 743 | get_ptable(ptable), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 744 | AllOf(SizeIs(4), Each(Each(Truly(std::bind(arch_mm_pte_is_block, |
| 745 | _1, TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 746 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 747 | } |
| 748 | |
| 749 | /** |
| 750 | * Mapping then unmapping a page does not defrag the table. |
| 751 | */ |
| 752 | TEST_F(mm, unmap_does_not_defrag) |
| 753 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 754 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 755 | const paddr_t l0_begin = pa_init(5555 * PAGE_SIZE); |
| 756 | const paddr_t l0_end = pa_add(l0_begin, 13 * PAGE_SIZE); |
| 757 | const paddr_t l1_begin = pa_init(666 * mm_entry_size(1)); |
| 758 | const paddr_t l1_end = pa_add(l1_begin, 5 * mm_entry_size(1)); |
| 759 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 760 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 761 | ASSERT_TRUE(mm_vm_identity_map(&ptable, l0_begin, l0_end, mode, nullptr, |
| 762 | &ppool)); |
| 763 | ASSERT_TRUE(mm_vm_identity_map(&ptable, l1_begin, l1_end, mode, nullptr, |
| 764 | &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 765 | ASSERT_TRUE(mm_vm_unmap(&ptable, l0_begin, l0_end, &ppool)); |
| 766 | ASSERT_TRUE(mm_vm_unmap(&ptable, l1_begin, l1_end, &ppool)); |
Andrew Scull | 164f815 | 2019-11-19 14:29:55 +0000 | [diff] [blame^] | 767 | EXPECT_THAT(get_ptable(ptable), |
| 768 | AllOf(SizeIs(4), |
| 769 | Not(Each(Each(arch_mm_absent_pte(TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 770 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 771 | } |
| 772 | |
| 773 | /** |
| 774 | * Nothing is mapped in an empty table. |
| 775 | */ |
| 776 | TEST_F(mm, is_mapped_empty) |
| 777 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 778 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 779 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 780 | EXPECT_FALSE(mm_vm_is_mapped(&ptable, ipa_init(0))); |
| 781 | EXPECT_FALSE(mm_vm_is_mapped(&ptable, ipa_init(0x8123'2344))); |
| 782 | EXPECT_FALSE(mm_vm_is_mapped(&ptable, ipa_init(0x1e0'0000'0073))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 783 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 784 | } |
| 785 | |
| 786 | /** |
| 787 | * Everything is mapped in a full table. |
| 788 | */ |
| 789 | TEST_F(mm, is_mapped_all) |
| 790 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 791 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 792 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 793 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 794 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 795 | nullptr, &ppool)); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 796 | EXPECT_TRUE(mm_vm_is_mapped(&ptable, ipa_init(0))); |
| 797 | EXPECT_TRUE(mm_vm_is_mapped(&ptable, ipa_init(0xf247'a7b3))); |
| 798 | EXPECT_TRUE(mm_vm_is_mapped(&ptable, ipa_init(0x1ff'7bfa'983b))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 799 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 800 | } |
| 801 | |
| 802 | /** |
| 803 | * A page is mapped for the range [begin, end). |
| 804 | */ |
| 805 | TEST_F(mm, is_mapped_page) |
| 806 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 807 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 808 | const paddr_t page_begin = pa_init(0x100'0000'0000); |
| 809 | const paddr_t page_end = pa_add(page_begin, PAGE_SIZE); |
| 810 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 811 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 812 | ASSERT_TRUE(mm_vm_identity_map(&ptable, page_begin, page_end, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 813 | nullptr, &ppool)); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 814 | EXPECT_TRUE(mm_vm_is_mapped(&ptable, ipa_from_pa(page_begin))); |
| 815 | EXPECT_TRUE( |
| 816 | mm_vm_is_mapped(&ptable, ipa_from_pa(pa_add(page_begin, 127)))); |
| 817 | EXPECT_FALSE(mm_vm_is_mapped(&ptable, ipa_from_pa(page_end))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 818 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 819 | } |
| 820 | |
| 821 | /** |
| 822 | * Everything out of range is not mapped. |
| 823 | */ |
| 824 | TEST_F(mm, is_mapped_out_of_range) |
| 825 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 826 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 827 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 828 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 829 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 830 | nullptr, &ppool)); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 831 | EXPECT_FALSE(mm_vm_is_mapped(&ptable, ipa_from_pa(VM_MEM_END))); |
| 832 | EXPECT_FALSE(mm_vm_is_mapped(&ptable, ipa_init(0x1000'adb7'8123))); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 833 | EXPECT_FALSE(mm_vm_is_mapped( |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 834 | &ptable, ipa_init(std::numeric_limits<uintpaddr_t>::max()))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 835 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 836 | } |
| 837 | |
| 838 | /** |
| 839 | * The mode of unmapped addresses can be retrieved and is set to invalid, |
| 840 | * unowned and shared. |
| 841 | */ |
| 842 | TEST_F(mm, get_mode_empty) |
| 843 | { |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 844 | constexpr int default_mode = |
| 845 | MM_MODE_INVALID | MM_MODE_UNOWNED | MM_MODE_SHARED; |
| 846 | struct mm_ptable ptable; |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 847 | uint32_t read_mode; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 848 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 849 | |
| 850 | read_mode = 0; |
| 851 | EXPECT_TRUE( |
| 852 | mm_vm_get_mode(&ptable, ipa_init(0), ipa_init(20), &read_mode)); |
| 853 | EXPECT_THAT(read_mode, Eq(default_mode)); |
| 854 | |
| 855 | read_mode = 0; |
| 856 | EXPECT_TRUE(mm_vm_get_mode(&ptable, ipa_init(0x3c97'654d), |
| 857 | ipa_init(0x3c97'e000), &read_mode)); |
| 858 | EXPECT_THAT(read_mode, Eq(default_mode)); |
| 859 | |
| 860 | read_mode = 0; |
| 861 | EXPECT_TRUE(mm_vm_get_mode(&ptable, ipa_init(0x5f'ffff'ffff), |
| 862 | ipa_init(0x1ff'ffff'ffff), &read_mode)); |
| 863 | EXPECT_THAT(read_mode, Eq(default_mode)); |
| 864 | |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 865 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 866 | } |
| 867 | |
| 868 | /** |
| 869 | * Get the mode of a range comprised of individual pages which are either side |
| 870 | * of a root table boundary. |
| 871 | */ |
| 872 | TEST_F(mm, get_mode_pages_across_tables) |
| 873 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 874 | constexpr uint32_t mode = MM_MODE_INVALID | MM_MODE_SHARED; |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 875 | const paddr_t map_begin = pa_init(0x180'0000'0000 - PAGE_SIZE); |
| 876 | const paddr_t map_end = pa_add(map_begin, 2 * PAGE_SIZE); |
| 877 | struct mm_ptable ptable; |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 878 | uint32_t read_mode; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 879 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 880 | ASSERT_TRUE(mm_vm_identity_map(&ptable, map_begin, map_end, mode, |
| 881 | nullptr, &ppool)); |
| 882 | |
| 883 | read_mode = 0; |
| 884 | EXPECT_TRUE(mm_vm_get_mode(&ptable, ipa_from_pa(map_begin), |
| 885 | ipa_from_pa(pa_add(map_begin, PAGE_SIZE)), |
| 886 | &read_mode)); |
| 887 | EXPECT_THAT(read_mode, Eq(mode)); |
| 888 | |
| 889 | EXPECT_FALSE(mm_vm_get_mode(&ptable, ipa_init(0), |
| 890 | ipa_from_pa(pa_add(map_begin, PAGE_SIZE)), |
| 891 | &read_mode)); |
| 892 | |
| 893 | read_mode = 0; |
| 894 | EXPECT_TRUE(mm_vm_get_mode(&ptable, ipa_from_pa(map_begin), |
| 895 | ipa_from_pa(map_end), &read_mode)); |
| 896 | EXPECT_THAT(read_mode, Eq(mode)); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 897 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 898 | } |
| 899 | |
| 900 | /** |
| 901 | * Anything out of range fail to retrieve the mode. |
| 902 | */ |
| 903 | TEST_F(mm, get_mode_out_of_range) |
| 904 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 905 | constexpr uint32_t mode = MM_MODE_UNOWNED; |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 906 | struct mm_ptable ptable; |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 907 | uint32_t read_mode; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 908 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 81e8509 | 2018-12-12 12:56:20 +0000 | [diff] [blame] | 909 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
| 910 | nullptr, &ppool)); |
| 911 | EXPECT_FALSE(mm_vm_get_mode(&ptable, ipa_init(0), |
| 912 | ipa_from_pa(pa_add(VM_MEM_END, 1)), |
| 913 | &read_mode)); |
| 914 | EXPECT_FALSE(mm_vm_get_mode(&ptable, ipa_from_pa(VM_MEM_END), |
| 915 | ipa_from_pa(pa_add(VM_MEM_END, 1)), |
| 916 | &read_mode)); |
| 917 | EXPECT_FALSE(mm_vm_get_mode(&ptable, ipa_init(0x1'1234'1234'1234), |
| 918 | ipa_init(2'0000'0000'0000), &read_mode)); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 919 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 920 | } |
| 921 | |
| 922 | /** |
| 923 | * Defragging an entirely empty table has no effect. |
| 924 | */ |
| 925 | TEST_F(mm, defrag_empty) |
| 926 | { |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 927 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 928 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
| 929 | mm_vm_defrag(&ptable, &ppool); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 930 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 931 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 932 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 933 | mm_vm_fini(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 934 | } |
| 935 | |
| 936 | /** |
| 937 | * Defragging a table with some empty subtables (even nested) results in |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 938 | * an empty table. |
| 939 | */ |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 940 | TEST_F(mm, defrag_empty_subtables) |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 941 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 942 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 943 | const paddr_t l0_begin = pa_init(120000 * PAGE_SIZE); |
| 944 | const paddr_t l0_end = pa_add(l0_begin, PAGE_SIZE); |
| 945 | const paddr_t l1_begin = pa_init(3 * mm_entry_size(1)); |
| 946 | const paddr_t l1_end = pa_add(l1_begin, 5 * mm_entry_size(1)); |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 947 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 948 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 949 | ASSERT_TRUE(mm_vm_identity_map(&ptable, l0_begin, l0_end, mode, nullptr, |
| 950 | &ppool)); |
Andrew Scull | 12122ce | 2019-11-19 14:21:07 +0000 | [diff] [blame] | 951 | ASSERT_TRUE(mm_vm_identity_map(&ptable, l1_begin, l1_end, mode, nullptr, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 952 | &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 953 | ASSERT_TRUE(mm_vm_unmap(&ptable, l0_begin, l0_end, &ppool)); |
| 954 | ASSERT_TRUE(mm_vm_unmap(&ptable, l1_begin, l1_end, &ppool)); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 955 | mm_vm_defrag(&ptable, &ppool); |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 956 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 957 | get_ptable(ptable), |
Andrew Scull | 3681b8d | 2018-12-12 14:22:59 +0000 | [diff] [blame] | 958 | AllOf(SizeIs(4), Each(Each(arch_mm_absent_pte(TOP_LEVEL))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 959 | mm_vm_fini(&ptable, &ppool); |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 960 | } |
| 961 | |
| 962 | /** |
| 963 | * Any subtable with all blocks with the same attributes should be replaced |
| 964 | * with a single block. |
| 965 | */ |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 966 | TEST_F(mm, defrag_block_subtables) |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 967 | { |
Andrew Walbran | 1281ed4 | 2019-10-22 17:23:40 +0100 | [diff] [blame] | 968 | constexpr uint32_t mode = 0; |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 969 | const paddr_t begin = pa_init(39456 * mm_entry_size(1)); |
| 970 | const paddr_t middle = pa_add(begin, 67 * PAGE_SIZE); |
| 971 | const paddr_t end = pa_add(begin, 4 * mm_entry_size(1)); |
Andrew Walbran | 9fa106c | 2018-09-28 14:19:29 +0100 | [diff] [blame] | 972 | struct mm_ptable ptable; |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 973 | ASSERT_TRUE(mm_vm_init(&ptable, &ppool)); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 974 | ASSERT_TRUE(mm_vm_identity_map(&ptable, pa_init(0), VM_MEM_END, mode, |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 975 | nullptr, &ppool)); |
Andrew Scull | da24197 | 2019-01-05 18:17:48 +0000 | [diff] [blame] | 976 | ASSERT_TRUE(mm_vm_unmap(&ptable, begin, end, &ppool)); |
Wedson Almeida Filho | 22d5eaa | 2018-12-16 00:38:49 +0000 | [diff] [blame] | 977 | ASSERT_TRUE(mm_vm_identity_map(&ptable, begin, middle, mode, nullptr, |
| 978 | &ppool)); |
| 979 | ASSERT_TRUE(mm_vm_identity_map(&ptable, middle, end, mode, nullptr, |
| 980 | &ppool)); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 981 | mm_vm_defrag(&ptable, &ppool); |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 982 | EXPECT_THAT( |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 983 | get_ptable(ptable), |
Andrew Scull | 1ba470e | 2018-10-31 15:14:31 +0000 | [diff] [blame] | 984 | AllOf(SizeIs(4), Each(Each(Truly(std::bind(arch_mm_pte_is_block, |
| 985 | _1, TOP_LEVEL)))))); |
Andrew Scull | da3df7f | 2019-01-05 17:49:27 +0000 | [diff] [blame] | 986 | mm_vm_fini(&ptable, &ppool); |
Andrew Walbran | 6324fc9 | 2018-10-03 11:46:43 +0100 | [diff] [blame] | 987 | } |
| 988 | |
Andrew Scull | 232d560 | 2018-10-15 11:07:45 +0100 | [diff] [blame] | 989 | } /* namespace */ |