Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 1 | /* |
Andrew Walbran | 692b325 | 2019-03-07 15:51:31 +0000 | [diff] [blame] | 2 | * Copyright 2018 The Hafnium Authors. |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 3 | * |
Andrew Walbran | e959ec1 | 2020-06-17 15:01:09 +0100 | [diff] [blame] | 4 | * Use of this source code is governed by a BSD-style |
| 5 | * license that can be found in the LICENSE file or at |
| 6 | * https://opensource.org/licenses/BSD-3-Clause. |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
Andrew Scull | 9a6384b | 2019-01-02 12:08:40 +0000 | [diff] [blame] | 9 | #include "hf/arch/cpu.h" |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 10 | |
Fuad Tabba | 5c73843 | 2019-12-02 11:02:42 +0000 | [diff] [blame] | 11 | #include "hf/cpu.h" |
Andrew Walbran | b5ab43c | 2020-04-30 11:32:54 +0100 | [diff] [blame] | 12 | #include "hf/ffa.h" |
Madhukar Pappireddy | 2185d0b | 2021-08-03 12:12:48 -0500 | [diff] [blame] | 13 | #include "hf/plat/interrupts.h" |
Andrew Walbran | d4d2fa1 | 2019-10-01 16:47:25 +0100 | [diff] [blame] | 14 | |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 15 | void arch_irq_disable(void) |
| 16 | { |
| 17 | /* TODO */ |
| 18 | } |
| 19 | |
| 20 | void arch_irq_enable(void) |
| 21 | { |
| 22 | /* TODO */ |
| 23 | } |
| 24 | |
Fuad Tabba | 5c73843 | 2019-12-02 11:02:42 +0000 | [diff] [blame] | 25 | void arch_regs_reset(struct vcpu *vcpu) |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 26 | { |
| 27 | /* TODO */ |
Fuad Tabba | 5c73843 | 2019-12-02 11:02:42 +0000 | [diff] [blame] | 28 | (void)vcpu; |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 29 | } |
| 30 | |
| 31 | void arch_regs_set_pc_arg(struct arch_regs *r, ipaddr_t pc, uintreg_t arg) |
| 32 | { |
| 33 | (void)pc; |
Andrew Walbran | f65cfa2 | 2019-12-05 11:38:18 +0000 | [diff] [blame] | 34 | r->arg[0] = arg; |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 35 | } |
| 36 | |
J-Alves | b7800a1 | 2022-01-25 17:55:53 +0000 | [diff] [blame] | 37 | bool arch_regs_reg_num_valid(const unsigned int gp_reg_num) |
| 38 | { |
| 39 | (void)gp_reg_num; |
| 40 | return false; |
| 41 | } |
| 42 | |
| 43 | void arch_regs_set_gp_reg(struct arch_regs *r, uintreg_t value, |
| 44 | const unsigned int gp_reg_num) |
| 45 | { |
| 46 | (void)r; |
| 47 | (void)value; |
| 48 | (void)gp_reg_num; |
| 49 | } |
| 50 | |
Andrew Walbran | b5ab43c | 2020-04-30 11:32:54 +0100 | [diff] [blame] | 51 | void arch_regs_set_retval(struct arch_regs *r, struct ffa_value v) |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 52 | { |
Andrew Walbran | f65cfa2 | 2019-12-05 11:38:18 +0000 | [diff] [blame] | 53 | r->arg[0] = v.func; |
| 54 | r->arg[1] = v.arg1; |
| 55 | r->arg[2] = v.arg2; |
| 56 | r->arg[3] = v.arg3; |
| 57 | r->arg[4] = v.arg4; |
| 58 | r->arg[5] = v.arg5; |
| 59 | r->arg[6] = v.arg6; |
| 60 | r->arg[7] = v.arg7; |
Andrew Scull | 11a4a0c | 2018-12-29 11:38:31 +0000 | [diff] [blame] | 61 | } |
Olivier Deprez | e6f7b9d | 2021-02-01 11:55:48 +0100 | [diff] [blame] | 62 | |
| 63 | void arch_cpu_init(struct cpu *c, ipaddr_t entry_point) |
| 64 | { |
| 65 | (void)c; |
| 66 | (void)entry_point; |
Madhukar Pappireddy | 72454a1 | 2021-08-03 12:21:46 -0500 | [diff] [blame] | 67 | |
| 68 | plat_interrupts_controller_hw_init(c); |
Olivier Deprez | e6f7b9d | 2021-02-01 11:55:48 +0100 | [diff] [blame] | 69 | } |