blob: 3b1b1e3139bba45215d3bf52b75ba2d7ae6e01a8 [file] [log] [blame]
julhal012c18fbf2021-02-01 08:29:28 +00001/*
2 * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef TS_PLATFORM_INTERFACE_DEVICE_REGION_H
8#define TS_PLATFORM_INTERFACE_DEVICE_REGION_H
9
10#include <stddef.h>
11#include <stdint.h>
12
13#ifdef __cplusplus
14extern "C" {
15#endif
16
17/**
18 * Defines a structure for describing a contiguous IO memory region
19 * and other configuration information about a peripheral. This may be based on
20 * buildtime or runtime configuration information e.g. from device tree.
21 */
22struct device_region
23{
24 char dev_class[16]; /**< Identifier for class of device e.g. 'trng' */
25 int dev_instance; /**< Instance of the class of device on a platform */
julhal0137e1aea2021-02-09 15:22:20 +000026 uintptr_t base_addr; /**< Base address or region */
Michael Zhaoccd689a2025-04-03 22:40:39 +010027 uintptr_t phys_addr; /**< Physical address of the region */
julhal012c18fbf2021-02-01 08:29:28 +000028 size_t io_region_size; /**< Size of I/O region in bytes */
29};
30
31#ifdef __cplusplus
32}
33#endif
34
35#endif /* TS_PLATFORM_INTERFACE_DEVICE_REGION_H */