blob: dc8379e97e37030f74ddc4785084f1e097ffd76f [file] [log] [blame]
Soby Mathewb4c6df42022-11-09 11:13:29 +00001/*
2 * SPDX-License-Identifier: BSD-3-Clause
3 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
4 */
5
6#include <arch.h>
7#include <debug.h>
8#include <gic.h>
9#include <host_utils.h>
10#include <platform_api.h>
11#include <rmm_el3_ifc.h>
12#include <stdint.h>
13#include <xlat_tables.h>
14
15#define RMM_EL3_IFC_ABI_VERSION (RMM_EL3_IFC_SUPPORTED_VERSION)
16#define RMM_EL3_MAX_CPUS (1U)
17
18/*
19 * Define and set the Boot Interface arguments.
20 */
21static unsigned char el3_rmm_shared_buffer[PAGE_SIZE] __aligned(PAGE_SIZE);
22
23/*
24 * Create a basic boot manifest.
25 */
26static struct rmm_core_manifest *boot_manifest =
27 (struct rmm_core_manifest *)el3_rmm_shared_buffer;
28
29/*
30 * Performs some initialization needed before RMM can be ran, such as
31 * setting up callbacks for sysreg access.
32 */
33static void setup_sysreg_and_boot_manifest(void)
34{
35 /*
Javier Almansa Sobrino9929a792022-11-22 16:11:13 +000036 * By default, set current CPU to be CPU0.
37 * Fake host doesn't support using more than one CPU.
38 */
39 host_util_set_cpuid(0U);
40
41 /*
Soby Mathewb4c6df42022-11-09 11:13:29 +000042 * Initialize ID_AA64MMFR0_EL1 with a physical address
43 * range of 48 bits (PARange bits set to 0b0101)
44 */
45 (void)host_util_set_default_sysreg_cb("id_aa64mmfr0_el1",
46 INPLACE(ID_AA64MMFR0_EL1_PARANGE, 5UL));
47
48 /*
49 * Initialize ICH_VTR_EL2 with 6 preemption bits.
50 * (PREbits is equal number of preemption bits minus one)
51 */
52 (void)host_util_set_default_sysreg_cb("ich_vtr_el2",
53 INPLACE(ICH_VTR_EL2_PRE_BITS, 5UL));
54
55 /* SCTLR_EL2 is reset to zero */
56 (void)host_util_set_default_sysreg_cb("sctlr_el2", 0UL);
57
Javier Almansa Sobrino9929a792022-11-22 16:11:13 +000058 /* TPIDR_EL2 is reset to zero */
59 (void)host_util_set_default_sysreg_cb("tpidr_el2", 0UL);
60
Soby Mathewb4c6df42022-11-09 11:13:29 +000061 /* Initialize the boot manifest */
62 boot_manifest->version = RMM_EL3_IFC_SUPPORTED_VERSION;
63 boot_manifest->plat_data = (uintptr_t)NULL;
Javier Almansa Sobrino9929a792022-11-22 16:11:13 +000064
65 /* Store current CPU ID into tpidr_el2 */
66 write_tpidr_el2(0);
Soby Mathewb4c6df42022-11-09 11:13:29 +000067}
68
69/*
70 * Function to emulate the MMU enablement for the fake_host architecture.
71 */
72static void enable_fake_host_mmu(void)
73{
74 write_sctlr_el2(SCTLR_EL2_WXN | SCTLR_EL2_M);
75}
76
77void rmm_main(void);
78
79int main(int argc, char *argv[])
80{
81 (void)argc;
82 (void)argv;
83
Soby Mathewb4c6df42022-11-09 11:13:29 +000084 VERBOSE("RMM: Beginning of Fake Host execution\n");
85
Javier Almansa Sobrino9929a792022-11-22 16:11:13 +000086 setup_sysreg_and_boot_manifest();
87
Soby Mathewb4c6df42022-11-09 11:13:29 +000088 plat_setup(0UL,
89 RMM_EL3_IFC_ABI_VERSION,
90 RMM_EL3_MAX_CPUS,
91 (uintptr_t)&el3_rmm_shared_buffer);
92
93 /*
94 * Enable the MMU. This is needed as some initialization code
95 * called by rmm_main() asserts that the mmu is enabled.
96 */
97 enable_fake_host_mmu();
98
Javier Almansa Sobrinoc4ad5b02022-07-05 19:05:14 +010099 /* Start RMM */
Soby Mathewb4c6df42022-11-09 11:13:29 +0000100 rmm_main();
101
102 VERBOSE("RMM: Fake Host execution completed\n");
103
104 return 0;
105}