blob: 5478dde6cf60362e1efe75435da7de4878257fb4 [file] [log] [blame]
Soby Mathewb4c6df42022-11-09 11:13:29 +00001/*
2 * SPDX-License-Identifier: BSD-3-Clause
3 * SPDX-FileCopyrightText: Copyright TF-RMM Contributors.
4 */
AlexeiFedorov7c5001a2022-12-14 13:22:33 +00005
Javier Almansa Sobrinof6fff692024-02-02 17:13:57 +00006#include <arch_features.h>
AlexeiFedorovffef39a2024-10-28 16:35:21 +00007#include <arm_memory.h>
Soby Mathewb4c6df42022-11-09 11:13:29 +00008#include <debug.h>
Soby Mathewb4c6df42022-11-09 11:13:29 +00009#include <pl011.h>
10#include <plat_common.h>
AlexeiFedorovee2fc822023-10-31 14:54:39 +000011#include <platform_api.h>
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000012#include <rmm_el3_ifc.h>
Soby Mathewb4c6df42022-11-09 11:13:29 +000013#include <sizes.h>
Soby Mathew9dcdb152024-02-27 15:15:28 +000014#include <string.h>
Soby Mathewb4c6df42022-11-09 11:13:29 +000015#include <xlat_tables.h>
16
Soby Mathew9b2de242024-02-27 16:08:42 +000017#define ARM_RMM_UART MAP_REGION_FLAT( \
AlexeiFedorovffef39a2024-10-28 16:35:21 +000018 0, \
Soby Mathew8218e082024-02-26 14:09:28 +000019 SZ_4K, \
20 (MT_DEVICE | MT_RW | MT_REALM))
Soby Mathewb4c6df42022-11-09 11:13:29 +000021
Soby Mathewb4c6df42022-11-09 11:13:29 +000022/*
23 * Local platform setup for RMM.
24 *
25 * This function will only be invoked during
26 * warm boot and is expected to setup architecture and platform
27 * components local to a PE executing RMM.
28 */
AlexeiFedorovb0de4d52023-10-10 11:46:16 +010029/* coverity[misra_c_2012_rule_8_7_violation:SUPPRESS] */
Soby Mathewb4c6df42022-11-09 11:13:29 +000030void plat_warmboot_setup(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3)
31{
32 /* Avoid MISRA C:2012-2.7 warnings */
33 (void)x0;
34 (void)x1;
35 (void)x2;
36 (void)x3;
37
38 if (plat_cmn_warmboot_setup() != 0) {
39 panic();
40 }
41}
42
43/*
44 * Global platform setup for RMM.
45 *
46 * This function will only be invoked once during cold boot
47 * and is expected to setup architecture and platform components
48 * common for all PEs executing RMM. The translation tables should
49 * be initialized by this function.
50 */
AlexeiFedorovb0de4d52023-10-10 11:46:16 +010051/* coverity[misra_c_2012_rule_8_7_violation:SUPPRESS] */
Soby Mathewb4c6df42022-11-09 11:13:29 +000052void plat_setup(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3)
53{
AlexeiFedorov7c5001a2022-12-14 13:22:33 +000054 int ret;
AlexeiFedorovffef39a2024-10-28 16:35:21 +000055 struct memory_info *plat_memory_info;
Soby Mathew9dcdb152024-02-27 15:15:28 +000056 struct console_list *csl_list;
57 struct console_info *console_ptr;
AlexeiFedorov037add62024-10-30 15:53:05 +000058 const enum dev_type type[] = {DEV_RANGE_COHERENT, DEV_RANGE_NON_COHERENT};
Soby Mathewb4c6df42022-11-09 11:13:29 +000059
Javier Almansa Sobrinocd599e22023-06-28 12:28:00 +010060 /* TBD Initialize UART for early log */
61 struct xlat_mmap_region plat_regions[] = {
Soby Mathew9b2de242024-02-27 16:08:42 +000062 ARM_RMM_UART,
Javier Almansa Sobrinocd599e22023-06-28 12:28:00 +010063 {0}
64 };
65
Soby Mathew9dcdb152024-02-27 15:15:28 +000066 /* Initialize the RMM-EL3 interface*/
67 ret = plat_cmn_init_el3_ifc(x0, x1, x2, x3);
68 if (ret != E_RMM_BOOT_SUCCESS) {
69 rmm_el3_ifc_report_fail_to_el3(ret);
AlexeiFedorov44a76a32023-08-29 16:53:26 +010070 }
Soby Mathewb4c6df42022-11-09 11:13:29 +000071
Soby Mathew9dcdb152024-02-27 15:15:28 +000072 /* Initialize console first */
73 ret = rmm_el3_ifc_get_console_list_pa(&csl_list);
74 if (ret != 0) {
75 rmm_el3_ifc_report_fail_to_el3(ret);
76 }
77
78 /* If console_info is present, we need it to be pl011 */
79 if (csl_list->num_consoles != 0UL) {
80 uintptr_t uart_base;
81 unsigned int uart_clk, uart_baud;
82
83 console_ptr = &csl_list->consoles[0];
84
85 if (strncmp(console_ptr->name, "pl011", sizeof("pl011")) != 0) {
86 rmm_el3_ifc_report_fail_to_el3(E_RMM_BOOT_UNKNOWN_ERROR);
87 }
88
89 uart_base = console_ptr->base;
90 uart_clk = (unsigned int)console_ptr->clk_in_hz;
91 uart_baud = (unsigned int)console_ptr->baud_rate;
92
93 /* RMM currently only supports one console */
94 ret = pl011_init(uart_base, uart_clk, uart_baud);
95 if (ret != 0) {
96 rmm_el3_ifc_report_fail_to_el3(E_RMM_BOOT_UNKNOWN_ERROR);
97 }
98
99 plat_regions[0].base_pa = uart_base;
100 plat_regions[0].base_va = uart_base;
Javier Almansa Sobrinof6fff692024-02-02 17:13:57 +0000101 }
102
Mate Toth-Pal833bf632023-02-27 13:33:58 +0100103 /* Carry on with the rest of the system setup */
Soby Mathew9dcdb152024-02-27 15:15:28 +0000104 ret = plat_cmn_setup(plat_regions, 1U);
Javier Almansa Sobrinoed932592023-01-24 12:50:41 +0000105 if (ret != 0) {
106 ERROR("%s (%u): Failed to setup the platform (%i)\n",
107 __func__, __LINE__, ret);
Javier Almansa Sobrinof6fff692024-02-02 17:13:57 +0000108 rmm_el3_ifc_report_fail_to_el3(E_RMM_BOOT_UNKNOWN_ERROR);
Soby Mathewb4c6df42022-11-09 11:13:29 +0000109 }
110
AlexeiFedorov7c5001a2022-12-14 13:22:33 +0000111 /*
112 * Validate DRAM data and get pointer
113 * to the platform DRAM info structure
114 */
115 ret = rmm_el3_ifc_get_dram_data_validated_pa(
AlexeiFedorovffef39a2024-10-28 16:35:21 +0000116 PLAT_ARM_MAX_MEM_BANKS,
117 &plat_memory_info);
AlexeiFedorov7c5001a2022-12-14 13:22:33 +0000118 if (ret != E_RMM_BOOT_SUCCESS) {
119 ERROR("DRAM data error\n");
120 rmm_el3_ifc_report_fail_to_el3(ret);
121 }
122
Soby Mathew9b2de242024-02-27 16:08:42 +0000123 /* Set up Arm DRAM layout */
AlexeiFedorovffef39a2024-10-28 16:35:21 +0000124 arm_set_dram_layout(plat_memory_info);
125
126 /* cppcheck-suppress misra-c2012-14.2 */
127 for (unsigned int i = 0U; i < ARRAY_SIZE(type); i++) {
128 /*
129 * Validate device address ranges data and get pointer
130 * to the platform device address ranges info structure
131 */
132 ret = rmm_el3_ifc_get_dev_range_validated_pa(
133 PLAT_ARM_MAX_MEM_BANKS,
134 &plat_memory_info,
135 type[i]);
136 if (ret == E_RMM_BOOT_MANIFEST_VERSION_NOT_SUPPORTED) {
137 break;
138 }
139
140 if (ret != E_RMM_BOOT_SUCCESS) {
141 ERROR("Device address ranges data error\n");
142 rmm_el3_ifc_report_fail_to_el3(ret);
143 }
144
145 if (plat_memory_info != NULL) {
146 /* Set up Arm device address ranges layout */
147 arm_set_dev_layout(plat_memory_info, type[i]);
148 }
149 }
AlexeiFedorov7c5001a2022-12-14 13:22:33 +0000150
Soby Mathewb4c6df42022-11-09 11:13:29 +0000151 plat_warmboot_setup(x0, x1, x2, x3);
152}