Ken Liu | ae8224e | 2019-11-12 13:54:59 +0800 | [diff] [blame] | 1 | ############################ |
| 2 | Cooperative Scheduling Rules |
| 3 | ############################ |
| 4 | |
| 5 | :Author: Ashutosh Singh |
| 6 | :Organization: Arm Limited |
| 7 | :Contact: Ashutosh Singh <ashutosh.singh@arm.com> |
Ken Liu | b2adda0 | 2020-01-14 18:24:53 +0800 | [diff] [blame] | 8 | :Status: Accepted |
Ken Liu | ae8224e | 2019-11-12 13:54:59 +0800 | [diff] [blame] | 9 | |
| 10 | TF-M Scheduler - Rules |
| 11 | ====================== |
| 12 | |
| 13 | On ArmV8-M CPUs, NSPE and SPE share the same physical processing element(PE). A |
| 14 | TF-M enabled system need to be able to handle asynchronous events (interrupts) |
| 15 | regardless of current security state of the PE, and that may lead to scheduling |
| 16 | decisions. This introduces significant complexity into TF-M. To keep the |
| 17 | integrity of (NSPE and SPE) schedulers and call paths between NSPE and SPE, |
| 18 | following set of rules are imposed on the TF-M scheduler design. |
| 19 | |
| 20 | Objectives and Requirements |
| 21 | =========================== |
| 22 | |
| 23 | 1. Decoupling of scheduling decisions between NSPE and SPE |
| 24 | 2. Efficient interrupt handling by SPE as well as NSPE |
| 25 | 3. Reduce critical sections on the secure side to not block interrupts |
| 26 | unnecessarily |
| 27 | 4. Scalability to allow simplification/reduction of overheads to scale down the |
| 28 | design for constrained devices |
| 29 | 5. Reduce impact on NSPE software design |
| 30 | |
| 31 | a. NSPE interrupt handling implementation should be independent |
| 32 | b. Impact on the NSPE scheduler should be minimal |
| 33 | c. No assumptions should be made about NSPE's scheduling capabilities |
| 34 | |
| 35 | Scheduler Rules for context switching between SPE and NSPE |
| 36 | ========================================================== |
| 37 | |
| 38 | To allow coherent cooperative scheduling, following set of rules are imposed on |
| 39 | security state changes. |
| 40 | The switching between SPE and NSPE can be triggered in multiple ways. |
| 41 | |
| 42 | `Involuntary security state switch`; when the software has no control over the |
| 43 | switch: |
| 44 | |
| 45 | - A NSPE interrupt take control into NSPE from SPE |
| 46 | - A SPE interrupt takes control into SPE from NSPE |
| 47 | |
| 48 | `Voluntary security state switch`; when software programmatically makes the |
| 49 | switch: |
| 50 | |
| 51 | - A NSPE exception handler returns from NSPE to pre-empted SPE context |
| 52 | - A SPE exception handler returns from SPE to pre-empted NSPE context |
| 53 | - NSPE makes a function call into SPE |
| 54 | - SPE returns a call from NSPE |
| 55 | - SPE makes a function call into NSPE (not covered in current design) |
| 56 | - NSPE returns a call from SPE (not covered in current design) |
| 57 | |
| 58 | In order to maintain the call stack integrity across NSPE and SPE, following |
| 59 | rules are imposed on all security state switches. |
| 60 | |
| 61 | Rules for NSPE Exception handling |
| 62 | --------------------------------- |
| 63 | |
| 64 | 1. **The NSPE exception handler is allowed to trigger a NSPE context switch** |
| 65 | **(regardless of security state of the preempted context.** |
| 66 | |
| 67 | This is expected behaviour of any (RT)OS. |
| 68 | |
| 69 | 2. **The NSPE scheduler must eventually 'restore' the preempted (by** |
| 70 | **exception) context.** |
| 71 | |
| 72 | This is expected behaviour of any (RT)OS. |
| 73 | |
| 74 | 3. **If NSPE exception results in a NSPE context switch, SPM must be informed** |
| 75 | **of the scheduling decision; this must be done BEFORE the execution of** |
| 76 | **newly scheduled-in context.** |
| 77 | |
| 78 | This is to ensures integrity of the call stack when SPE is ready to return a |
| 79 | previous function call from NSPE. |
| 80 | |
| 81 | Rules for SPE Exception handling |
| 82 | -------------------------------- |
| 83 | |
| 84 | 1. **All of the SPE interrupts must have higher priority than NSPE interrupts** |
| 85 | |
| 86 | This is rule is primarily for simplifying the SPM design. |
| 87 | |
| 88 | 2. **The SPE interrupt handler is allowed to trigger a SPE context switch** |
| 89 | **(regardless of security state of the pre-empted context)** |
| 90 | |
| 91 | If the SPE context targeted by the interrupt is not same as current SPE context, |
| 92 | the SPM may choose to switch the current running SPE context based on priority. |
| 93 | |
| 94 | 3. **SPE scheduler must treat pre-empted context as one of the SPE contexts** |
| 95 | |
| 96 | a. If the pre-empted SPE context is SP1, the TCB for SP1 should be used for |
| 97 | saving the context. i.e. the context of SP1 should be saved before |
| 98 | scheduling anything other secure partition. |
| 99 | b. If SP1 was pre-empted by a NSPE interrupt, and subsequent NSPE execution is |
| 100 | pre-empted by SPE exception (before NSPE scheduling decision is communicated |
| 101 | back to SPM) -- SP1 TCB must be used for saving the context |
| 102 | In this case SPM is not yet aware of the NSPE context switch, from SPM's |
| 103 | standpoint SP1 is still executing, so SPM assumes that the preempted context |
| 104 | is SP1. |
| 105 | c. If SP1 was pre-empted by a NSPE interrupt, and subsequent NSPE execution is |
| 106 | pre-empted by SPE exception `after` NSPE scheduling decision is |
| 107 | communicated back to SPM) - a TCB dedicated to NSPE should be used for |
| 108 | saving the context. |
| 109 | |
| 110 | When NSPE scheduler communicates the scheduling decision to SPM, SPM must save |
| 111 | the SP1 context, if a SPE interrupt preempts the currently running NSPE context, |
| 112 | SPM should save the context to a dedicated NSPE TCB. |
| 113 | |
| 114 | d. The SPE scheduler must eventually 'restore' the pre-empted context. |
| 115 | This is an expected behaviour of any scheduler. |
| 116 | |
| 117 | 4. **All of the interrupts belonging to a partition must have same priority.** |
| 118 | |
| 119 | This serializes ISR execution targeted for same partition. |
| 120 | |
| 121 | 5. **In case of nested interrupts, all of the ISRs must run to finish before** |
| 122 | **any service code is allowed to run** |
| 123 | |
| 124 | This is an expected behaviour of any scheduler. |
| 125 | |
| 126 | 6. **If the previously preempted context was a NSPE ISR context, SPE ISR** |
| 127 | **handler must return to preempted NSPE context.** |
| 128 | |
| 129 | This is an expected behaviour of any scheduler to return to preempted context. |
| 130 | |
| 131 | Rules for NSPE to SPM function call (and NSPE scheduler) |
| 132 | -------------------------------------------------------- |
| 133 | |
| 134 | 1. Current NSPE context must have been communicated to SPM, otherwise SPM cannot |
| 135 | guarantee NSPE function calling stack integrity. |
| 136 | |
| 137 | Rules for Function Return from SPE to NSPE with result |
| 138 | ------------------------------------------------------ |
| 139 | |
| 140 | 1. **The result available on SPE side are for currently active NSPE context.** |
| 141 | |
| 142 | To maintain call stack integrity, if SPE is ready to return to NSPE, it can do |
| 143 | function return only if the SPE return path corresponds to currently active NSPE |
| 144 | context. |
| 145 | |
| 146 | 2. **Last entry into secure world happened programmatically (Voluntary** |
| 147 | **security state switch into SPE)** |
| 148 | |
| 149 | i.e. control is voluntarily given back by NSPE, either through a function call, |
| 150 | or a context restore via 'return to SPE from NSPE'. As opposed to a SPE |
| 151 | interrupt bringing back the execution into SPE. |
| 152 | |
| 153 | 3. **The current NSPE call stack has not already been returned with SPM_IDLE.** |
| 154 | |
| 155 | This rule applies if following optional feature is enabled. |
| 156 | |
| 157 | Rules for Return from SPE to NSPE with SPM_IDLE |
| 158 | ----------------------------------------------- |
| 159 | |
| 160 | This is optional part of the design as it introduces significant complexity on |
| 161 | both sides of the security boundary. |
| 162 | It allows yielding of the CPU to NSPE when SPE has not CPU execution to do but |
| 163 | it has not yet finished the previous request(s) from NSPE; i.e. SPE is waiting |
| 164 | on arrival of a SPE interrupt. |
| 165 | |
| 166 | 1. **Last entry into secure world happens programmatically (Voluntary** |
| 167 | **security context switch into SPE)** |
| 168 | |
| 169 | i.e. control is voluntarily given back by NSPE, either through a function call, |
| 170 | or a context restore via 'return to SPE from NSPE'. As opposed to a SPE |
| 171 | interrupt bringing back the execution into SPE. |
| 172 | |
| 173 | 2. **The result for the currently active NSPE entity is not yet available,** |
| 174 | **the called service is waiting (on interrupt/event).** |
| 175 | |
| 176 | SPE request corresponding to currently active NSPE caller is not yet completed |
| 177 | and is waiting on an ISR. |
| 178 | |
| 179 | 3. **The current NSPE call stack has not already been returned with SPM_IDLE.** |
| 180 | |
| 181 | Rules for NSPE pend irq based return from SPE to NSPE |
| 182 | ----------------------------------------------------- |
| 183 | |
| 184 | This is optional part of the design as it introduces significant complexity on |
| 185 | both sides. This works in conjunction with [Rules for Return from SPE to NSPE |
| 186 | with SPM_IDLE](#rules-for-return-from-spe-to-nspe-with-spm_idle). |
| 187 | In this scenario, when SPE is ready with result for a previous call from NSPE, |
| 188 | it raises a pended IRQ to NSPE instead of returning the function call path. |
| 189 | |
| 190 | 1. **The SPE has finished a NSPE request.** |
| 191 | |
| 192 | 2. **The corresponding NSPE context has already been returned with SPM_IDLE.** |
| 193 | |
| 194 | Rules for ISR pre-emption |
| 195 | ------------------------- |
| 196 | |
| 197 | 1. **A higher priority NSPE interrupt is allowed to preempt a lower priority** |
| 198 | **NSPE ISR** |
| 199 | |
| 200 | 2. **A higher priority SPE interrupt is allowed to preempt a lower priority** |
| 201 | **SPE ISR** |
| 202 | |
| 203 | 3. **A SPE interrupt is allowed to preempt NSPE ISR** |
| 204 | |
| 205 | 4. **A NSPE interrupt is not allowed to preempt SPE ISR** |
| 206 | |
| 207 | 5. **All interrupts belonging to a service must have same priority** |
| 208 | |
| 209 | -------------- |
| 210 | |
| 211 | *Copyright (c) 2019, Arm Limited. All rights reserved.* |