FPU: Add FPU test support for AN521

Signed-off-by: Jianliang Shen <jianliang.shen@arm.com>
Change-Id: I989b8fab6bd2b93e8644c67d259f438448f5d69e
diff --git a/platform/ext/target/arm/mps2/an521/CMakeLists.txt b/platform/ext/target/arm/mps2/an521/CMakeLists.txt
index 407ca4d..9459323 100644
--- a/platform/ext/target/arm/mps2/an521/CMakeLists.txt
+++ b/platform/ext/target/arm/mps2/an521/CMakeLists.txt
@@ -50,7 +50,18 @@
     )
     target_link_libraries(CMSIS_5_tfm_ns
         INTERFACE
-            CMSIS_5_RTX_V8MBN
+            $<$<AND:$<C_COMPILER_ID:GNU>,$<STREQUAL:${CONFIG_TFM_FP},hard>>:CMSIS_5_RTX_V8MMFN>
+            $<$<AND:$<C_COMPILER_ID:GNU>,$<STREQUAL:${CONFIG_TFM_FP},soft>>:CMSIS_5_RTX_V8MBN>
+            $<$<C_COMPILER_ID:ARMClang>:CMSIS_5_RTX_V8MBN>
+            $<$<C_COMPILER_ID:IAR>:CMSIS_5_RTX_V8MBN>
+    )
+    target_compile_options(tfm_ns
+        PUBLIC
+            ${COMPILER_CP_FLAG}
+    )
+    target_link_options(tfm_ns
+        PUBLIC
+            ${LINKER_CP_OPTION}
     )
 endif()
 
@@ -119,6 +130,12 @@
         ${COMPILER_CMSE_FLAG}
 )
 
+target_compile_definitions(platform_s
+    PUBLIC
+        $<$<BOOL:${TEST_NS_FPU}>:TEST_NS_FPU>
+        $<$<BOOL:${TEST_S_FPU}>:TEST_S_FPU>
+)
+
 #========================= Platform Non-Secure ================================#
 
 target_sources(platform_ns
@@ -129,6 +146,8 @@
         retarget/platform_retarget_dev.c
         cmsis_core/system_cmsdk_mps2_an521.c
         $<$<BOOL:${TFM_PARTITION_PLATFORM}>:${CMAKE_CURRENT_SOURCE_DIR}/plat_test.c>
+    INTERFACE
+        $<$<BOOL:${TEST_NS_FPU}>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_core/an521_ns_init.c>
 )
 
 target_include_directories(platform_ns
diff --git a/platform/ext/target/arm/mps2/an521/cmsis_core/an521_ns_init.c b/platform/ext/target/arm/mps2/an521/cmsis_core/an521_ns_init.c
new file mode 100644
index 0000000..1e7587c
--- /dev/null
+++ b/platform/ext/target/arm/mps2/an521/cmsis_core/an521_ns_init.c
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2022, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include "cmsis.h"
+#include "tfm_peripherals_def.h"
+#include "uart_stdout.h"
+#include "Driver_USART.h"
+#include "test_interrupt.h"
+
+int32_t tfm_ns_platform_init (void)
+{
+    /* Register FPU non-secure test interrupt handler */
+    NVIC_SetVector(TFM_FPU_NS_TEST_IRQ, (uint32_t)TFM_FPU_NS_TEST_Handler);
+
+    /* Enable FPU non-secure test interrupt */
+    NVIC_EnableIRQ(TFM_FPU_NS_TEST_IRQ);
+
+    stdio_init();
+
+    return ARM_DRIVER_OK;
+}
diff --git a/platform/ext/target/arm/mps2/an521/cmsis_core/cmsis_cpu.h b/platform/ext/target/arm/mps2/an521/cmsis_core/cmsis_cpu.h
index b94fcd9..f3ee2ae 100644
--- a/platform/ext/target/arm/mps2/an521/cmsis_core/cmsis_cpu.h
+++ b/platform/ext/target/arm/mps2/an521/cmsis_core/cmsis_cpu.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2018 ARM Limited
+ * Copyright (c) 2016-2022 ARM Limited
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -24,7 +24,7 @@
 #define __VTOR_PRESENT            1U        /* VTOR present */
 #define __NVIC_PRIO_BITS          3U        /* Number of Bits used for Priority Levels */
 #define __Vendor_SysTickConfig    0U        /* Set to 1 if different SysTick Config is used */
-#define __FPU_PRESENT             0U        /* no FPU present */
+#define __FPU_PRESENT             1U        /* FPU present */
 #define __DSP_PRESENT             0U        /* no DSP extension present */
 
 #include "core_cm33.h"
diff --git a/platform/ext/target/arm/mps2/an521/preload.cmake b/platform/ext/target/arm/mps2/an521/preload.cmake
index 436fed7..c40a092 100644
--- a/platform/ext/target/arm/mps2/an521/preload.cmake
+++ b/platform/ext/target/arm/mps2/an521/preload.cmake
@@ -1,5 +1,5 @@
 #-------------------------------------------------------------------------------
-# Copyright (c) 2020, Arm Limited. All rights reserved.
+# Copyright (c) 2020-2022, Arm Limited. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -14,3 +14,4 @@
 set(TFM_SYSTEM_PROCESSOR cortex-m33)
 set(TFM_SYSTEM_ARCHITECTURE armv8-m.main)
 set(TFM_SYSTEM_DSP OFF)
+set(CONFIG_TFM_FP_ARCH "fpv5-d16")
diff --git a/platform/ext/target/arm/mps2/an521/tfm_hal_platform.c b/platform/ext/target/arm/mps2/an521/tfm_hal_platform.c
index c087635..f0d303e 100644
--- a/platform/ext/target/arm/mps2/an521/tfm_hal_platform.c
+++ b/platform/ext/target/arm/mps2/an521/tfm_hal_platform.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021, Arm Limited. All rights reserved.
+ * Copyright (c) 2021-2022, Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  *
@@ -10,6 +10,9 @@
 #include "tfm_hal_platform.h"
 #include "tfm_plat_defs.h"
 #include "uart_stdout.h"
+#if defined(TEST_NS_FPU) || defined(TEST_S_FPU)
+#include "test_interrupt.h"
+#endif
 
 extern const struct memory_region_limits memory_regions;
 
@@ -59,6 +62,22 @@
         FIH_RET(fih_int_encode(TFM_HAL_ERROR_GENERIC));
     }
 
+#if defined(TEST_S_FPU) || defined(TEST_NS_FPU)
+    /* Set IRQn in secure mode */
+    NVIC_ClearTargetState(TFM_FPU_S_TEST_IRQ);
+
+    /* Register FPU secure test interrupt handler */
+    NVIC_SetVector(TFM_FPU_S_TEST_IRQ, (uint32_t)TFM_FPU_S_TEST_Handler);
+
+    /* Enable FPU secure test interrupt */
+    NVIC_EnableIRQ(TFM_FPU_S_TEST_IRQ);
+#endif
+
+#if defined(TEST_NS_FPU)
+    /* Set IRQn in non-secure mode */
+    NVIC_SetTargetState(TFM_FPU_NS_TEST_IRQ);
+#endif
+
     FIH_RET(fih_int_encode(TFM_HAL_SUCCESS));
 }
 
diff --git a/platform/ext/target/arm/mps2/an521/tfm_peripherals_def.h b/platform/ext/target/arm/mps2/an521/tfm_peripherals_def.h
index 00e9b36..e403806 100644
--- a/platform/ext/target/arm/mps2/an521/tfm_peripherals_def.h
+++ b/platform/ext/target/arm/mps2/an521/tfm_peripherals_def.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2021, Arm Limited. All rights reserved.
+ * Copyright (c) 2018-2022, Arm Limited. All rights reserved.
  * Copyright (c) 2020, Cypress Semiconductor Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
@@ -25,6 +25,8 @@
 #define TFM_TIMER1_IRQ           (TIMER1_IRQn)
 #define FF_TEST_UART_IRQ         (UARTTX2_IRQn)
 #define FF_TEST_UART_IRQ_Handler UARTTX2_Handler
+#define TFM_FPU_S_TEST_IRQ       (UART0_IRQn)
+#define TFM_FPU_NS_TEST_IRQ      (UART1_IRQn)
 
 struct platform_data_t;