| commit | f0ef274261e332e0586d3b013cd4100e52c219a0 | [log] [tgz] |
|---|---|---|
| author | shejia01 <jianliang.shen@arm.com> | Mon Jun 06 14:24:14 2022 +0800 |
| committer | Jianliang Shen <jianliang.shen@arm.com> | Wed Jul 20 14:23:11 2022 +0800 |
| tree | 2b934f1c2ee2aedc96059b0eb78db149c907e7b1 | |
| parent | 22e4bb5f611d788fc9974003b3f22ab461c493bd [diff] |
FPU: Added interrupts for FPU test purposes Using timer interrupt to test FPU registers protection is not efficient and direct. This patch involves dedicated test interrupts respectively for NS and S, which get triggered by software (STIR) instead of a timer. This change is applied on AN521 and Musca-S1 platforms. Signed-off-by: Jianliang Shen <jianliang.shen@arm.com> Change-Id: I3ce92e837fe62f94ce6fd068efedc547c5f6f3c3