Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 1 | /* |
Boyan Karatotev | 232c189 | 2025-03-11 16:41:33 +0000 | [diff] [blame] | 2 | * Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved. |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 3 | * |
dp-arm | 82cb2c1 | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <asm_macros.S> |
Antonio Nino Diaz | 09d40e0 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 8 | #include <lib/psci/psci.h> |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 9 | #include <platform_def.h> |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 10 | |
| 11 | .globl psci_do_pwrdown_cache_maintenance |
| 12 | .globl psci_do_pwrup_cache_maintenance |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 13 | |
| 14 | /* ----------------------------------------------------------------------- |
Boyan Karatotev | aadb4b5 | 2025-03-12 10:36:46 +0000 | [diff] [blame] | 15 | * void psci_do_pwrdown_cache_maintenance(void); |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 16 | * |
Boyan Karatotev | aadb4b5 | 2025-03-12 10:36:46 +0000 | [diff] [blame] | 17 | * This function turns off data caches and also ensures that stack memory |
| 18 | * is correctly flushed out to avoid coherency issues due to a change in |
| 19 | * its memory attributes. |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 20 | * ----------------------------------------------------------------------- |
| 21 | */ |
| 22 | func psci_do_pwrdown_cache_maintenance |
| 23 | push {r4, lr} |
Boyan Karatotev | aadb4b5 | 2025-03-12 10:36:46 +0000 | [diff] [blame] | 24 | bl plat_get_my_stack |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 25 | |
Boyan Karatotev | aadb4b5 | 2025-03-12 10:36:46 +0000 | [diff] [blame] | 26 | /* Turn off the D-cache */ |
| 27 | ldcopr r1, SCTLR |
| 28 | bic r1, #SCTLR_C_BIT |
| 29 | stcopr r1, SCTLR |
| 30 | isb |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 31 | |
| 32 | /* --------------------------------------------- |
Boyan Karatotev | aadb4b5 | 2025-03-12 10:36:46 +0000 | [diff] [blame] | 33 | * Calculate and store the size of the used |
| 34 | * stack memory in r1. |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 35 | * --------------------------------------------- |
| 36 | */ |
Boyan Karatotev | aadb4b5 | 2025-03-12 10:36:46 +0000 | [diff] [blame] | 37 | mov r4, r0 |
| 38 | mov r1, sp |
| 39 | sub r1, r0, r1 |
| 40 | mov r0, sp |
| 41 | bl flush_dcache_range |
| 42 | |
| 43 | /* --------------------------------------------- |
| 44 | * Calculate and store the size of the unused |
| 45 | * stack memory in r1. Calculate and store the |
| 46 | * stack base address in r0. |
| 47 | * --------------------------------------------- |
| 48 | */ |
| 49 | sub r0, r4, #PLATFORM_STACK_SIZE |
| 50 | sub r1, sp, r0 |
| 51 | bl inv_dcache_range |
| 52 | |
| 53 | pop {r4, pc} |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 54 | endfunc psci_do_pwrdown_cache_maintenance |
| 55 | |
| 56 | |
| 57 | /* ----------------------------------------------------------------------- |
| 58 | * void psci_do_pwrup_cache_maintenance(void); |
| 59 | * |
| 60 | * This function performs cache maintenance after this cpu is powered up. |
| 61 | * Currently, this involves managing the used stack memory before turning |
| 62 | * on the data cache. |
| 63 | * ----------------------------------------------------------------------- |
| 64 | */ |
| 65 | func psci_do_pwrup_cache_maintenance |
Soby Mathew | 9f3ee61 | 2016-12-06 12:10:51 +0000 | [diff] [blame] | 66 | /* r12 is pushed to meet the 8 byte stack alignment requirement */ |
| 67 | push {r12, lr} |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 68 | |
| 69 | /* --------------------------------------------- |
| 70 | * Ensure any inflight stack writes have made it |
| 71 | * to main memory. |
| 72 | * --------------------------------------------- |
| 73 | */ |
| 74 | dmb st |
| 75 | |
| 76 | /* --------------------------------------------- |
| 77 | * Calculate and store the size of the used |
| 78 | * stack memory in r1. Calculate and store the |
| 79 | * stack base address in r0. |
| 80 | * --------------------------------------------- |
| 81 | */ |
| 82 | bl plat_get_my_stack |
| 83 | mov r1, sp |
| 84 | sub r1, r0, r1 |
| 85 | mov r0, sp |
| 86 | bl inv_dcache_range |
| 87 | |
| 88 | /* --------------------------------------------- |
| 89 | * Enable the data cache. |
| 90 | * --------------------------------------------- |
| 91 | */ |
| 92 | ldcopr r0, SCTLR |
| 93 | orr r0, r0, #SCTLR_C_BIT |
| 94 | stcopr r0, SCTLR |
| 95 | isb |
| 96 | |
Soby Mathew | 9f3ee61 | 2016-12-06 12:10:51 +0000 | [diff] [blame] | 97 | pop {r12, pc} |
Soby Mathew | 727e523 | 2016-05-05 14:11:23 +0100 | [diff] [blame] | 98 | endfunc psci_do_pwrup_cache_maintenance |