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Soby Mathew3fd5ddf2014-08-18 16:57:56 +01001ARM CPU Errata Workarounds
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Sandrine Bailleux44804252014-08-06 11:27:23 +01004ARM Trusted Firmware exports a series of build flags which control the
Soby Mathew3fd5ddf2014-08-18 16:57:56 +01005errata workarounds that are applied to each CPU by the reset handler. The
6errata details can be found in the CPU specifc errata documents published
7by ARM. The errata workarounds are implemented for a particular revision
Soby Mathew7395a722014-09-22 12:11:36 +01008or a set of processor revisions. This is checked by reset handler at runtime.
Soby Mathew3fd5ddf2014-08-18 16:57:56 +01009Each errata workaround is identified by its `ID` as specified in the processor's
10errata notice document. The format of the define used to enable/disable the
11errata is `ERRATA_<Processor name>_<ID>` where the `Processor name`
12is either `A57` for the `Cortex_A57` CPU or `A53` for `Cortex_A53` CPU.
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14All workarounds are disabled by default. The platform is reponsible for
15enabling these workarounds according to its requirement by defining the
Soby Mathew7395a722014-09-22 12:11:36 +010016errata workaround build flags in the platform specific makefile. In case
17these workarounds are enabled for the wrong CPU revision then the errata
18workaround is not applied. In the DEBUG build, this is indicated by
19printing a warning to the crash console.
Soby Mathew3fd5ddf2014-08-18 16:57:56 +010020
21In the current implementation, a platform which has more than 1 variant
22with different revisions of a processor has no runtime mechanism available
23for it to specify which errata workarounds should be enabled or not.
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Sandrine Bailleux44804252014-08-06 11:27:23 +010025The value of the build flags are 0 by default, that is, disabled. Any other
Soby Mathew3fd5ddf2014-08-18 16:57:56 +010026value will enable it.
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Soby Mathew7395a722014-09-22 12:11:36 +010028For Cortex-A57, following errata build flags are defined :
Soby Mathew3fd5ddf2014-08-18 16:57:56 +010029
Soby Mathew7395a722014-09-22 12:11:36 +010030* `ERRATA_A57_806969`: This applies errata 806969 workaround to Cortex-A57
Soby Mathew3fd5ddf2014-08-18 16:57:56 +010031 CPU. This needs to be enabled only for revision r0p0 of the CPU.
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Soby Mathew7395a722014-09-22 12:11:36 +010033* `ERRATA_A57_813420`: This applies errata 813420 workaround to Cortex-A57
Soby Mathew3fd5ddf2014-08-18 16:57:56 +010034 CPU. This needs to be enabled only for revision r0p0 of the CPU.
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38_Copyright (c) 2014, ARM Limited and Contributors. All rights reserved._