Manish Pandey | 270ee15 | 2020-03-16 22:25:40 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2019-2020, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | * |
| 6 | * This file is a Partition Manifest (PM) for a minimal Secure Partition (SP) |
| 7 | * that has additional optional properties defined. |
| 8 | * |
| 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | |
| 13 | / { |
| 14 | compatible = "arm,spci-manifest-1.0"; |
| 15 | |
| 16 | /* Properties */ |
| 17 | description = "Base-1"; |
| 18 | spci-version = <0x00000009>; /* 31:16 - Major, 15:0 - Minor */ |
| 19 | uuid = <0xd1582309 0xf02347b9 0x827c4464 0xf5578fc8>; |
| 20 | id = <2>; |
| 21 | auxiliary-id = <0xae>; |
| 22 | stream-endpoint-ids = <0 1 2 3>; |
| 23 | execution-ctx-count = <1>; |
| 24 | exception-level = <2>; /* S-EL1 */ |
| 25 | execution-state = <0>; /* AARCH64 */ |
| 26 | load-address = <0x7100000>; |
| 27 | entrypoint-offset = <0x00001000>; |
| 28 | xlat-granule = <0>; /* 4KiB */ |
| 29 | boot-order = <0>; |
| 30 | messaging-method = <0>; /* Direct messaging only */ |
| 31 | run-time-model = <0>; /* Run to completion */ |
| 32 | |
| 33 | /* Boot protocol */ |
| 34 | gp-register-num = <0x0>; |
| 35 | |
| 36 | rx_tx-info { |
| 37 | compatible = "arm,spci-manifest-rx_tx-buffer"; |
| 38 | |
| 39 | description = "NS RX/TX Buffer"; |
| 40 | pages-count = <1>; |
| 41 | attributes = <0x0>; |
| 42 | base-address = <0x7200000>; |
| 43 | }; |
| 44 | |
| 45 | memory-regions { |
| 46 | compatible = "arm,spci-manifest-memory-regions"; |
| 47 | test-memory { |
| 48 | description = "Test Memory"; |
| 49 | pages-count = <32>; /* 128KiB with 4KiB pages */ |
| 50 | base-address = <0x00000000 0x21000000>; |
| 51 | attributes = <0x0>; |
| 52 | }; |
| 53 | }; |
| 54 | |
| 55 | device-regions { |
| 56 | compatible = "arm,spci-manifest-device-regions"; |
| 57 | attributes = <0x0>; |
| 58 | test-reg { |
| 59 | reg = <0x10000008 0x00000001 1>; /* Arbitrary test address */ |
| 60 | smmu-id = <1>; |
| 61 | stream-ids = <0x0 0x1>; |
| 62 | interrupts = <0x2 0x3>, |
| 63 | <0x4 0x5>; |
| 64 | }; |
| 65 | }; |
| 66 | |
| 67 | }; |