blob: feb8727bb5d1d95cbf217bd3ba507b0506429ada [file] [log] [blame]
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +01001/*
2 * Copyright (c) 2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8#include <plat_topology.h>
9#include <tftf_lib.h>
10
11static const struct {
12 unsigned int cluster_id;
13 unsigned int cpu_id;
14} tc0_cores[] = {
15 /* Cluster0: 4 cores*/
16 { 0, 0 },
17 { 0, 1 },
18 { 0, 2 },
19 { 0, 3 }
20};
21
22/*
23 * The power domain tree descriptor. The cluster power domains are
24 * arranged so that when the PSCI generic code creates the power domain tree,
25 * the indices of the CPU power domain nodes it allocates match the linear
26 * indices returned by plat_core_pos_by_mpidr().
27 */
28const unsigned char tc0_pd_tree_desc[] = {
29 /* Number of root nodes */
30 TC0_CLUSTER_COUNT,
31 /* Number of children for the 1st node */
32 TC0_MAX_CPUS_PER_CLUSTER,
33 /* Number of children for the 2nd node */
34 TC0_MAX_CPUS_PER_CLUSTER
35};
36
37const unsigned char *tftf_plat_get_pwr_domain_tree_desc(void)
38{
39 return tc0_pd_tree_desc;
40}
41
42uint64_t tftf_plat_get_mpidr(unsigned int core_pos)
43{
44 uint64_t mpid;
45
46 assert(core_pos < PLATFORM_CORE_COUNT);
47
48 mpid = (uint64_t)make_mpid(tc0_cores[core_pos].cluster_id,
49 tc0_cores[core_pos].cpu_id);
50
51 return mpid;
52}