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review.trustedfirmware.org / TF-A / tf-a-tests.git / refs/heads/lts-v2.10 / . / plat / arm / rdinfra / rdn2 / topology.c
blob: 6918638c1f4f4df1f074fc08f14ee84571942d03 [file] [log] [blame]
Shriram K46aa2bb2022-09-15 16:11:13 +0530[diff] [blame]1/*
2 * Copyright (c) 2022, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <assert.h>
8#include <plat_topology.h>
9#include <tftf_lib.h>
10
11static const struct {
12 unsigned int cluster_id;
13 unsigned int cpu_id;
14} plat_cores[] = {
15 /* Cluster0: 1 core */
16 { 0, 0 },
17 /* Cluster1: 1 core */
18 { 1, 0 },
19 /* Cluster2: 1 core */
20 { 2, 0 },
21 /* Cluster3: 1 core */
22 { 3, 0 },
23 /* Cluster4: 1 core */
24 { 4, 0 },
25 /* Cluster5: 1 core */
26 { 5, 0 },
27 /* Cluster6: 1 core */
28 { 6, 0 },
29 /* Cluster7: 1 core */
30 { 7, 0 },
Shriram K6824dad2022-02-23 20:34:45 +0530[diff] [blame]31#if (CSS_SGI_PLATFORM_VARIANT == 0)
Shriram K46aa2bb2022-09-15 16:11:13 +0530[diff] [blame]32 /* Cluster8: 1 core */
33 { 8, 0 },
34 /* Cluster9: 1 core */
35 { 9, 0 },
36 /* Cluster10: 1 core */
37 { 10, 0 },
38 /* Cluster11: 1 core */
39 { 11, 0 },
40 /* Cluster12: 1 core */
41 { 12, 0 },
42 /* Cluster13: 1 core */
43 { 13, 0 },
44 /* Cluster14: 1 core */
45 { 14, 0 },
46 /* Cluster15: 1 core */
47 { 15, 0 },
Shriram K6824dad2022-02-23 20:34:45 +0530[diff] [blame]48#endif
Shriram K46aa2bb2022-09-15 16:11:13 +0530[diff] [blame]49};
50
51/*
52 * The power domain tree descriptor. The cluster power domains are
53 * arranged so that when the PSCI generic code creates the power domain tree,
54 * the indices of the CPU power domain nodes it allocates match the linear
55 * indices returned by plat_core_pos_by_mpidr().
56 */
57const unsigned char plat_pd_tree_desc[] = {
58 /* Number of root nodes */
59 PLAT_ARM_CLUSTER_COUNT,
60 /* Number of children for the 1st node */
61 CSS_SGI_MAX_CPUS_PER_CLUSTER,
62 /* Number of children for the 2nd node */
63 CSS_SGI_MAX_CPUS_PER_CLUSTER,
64 /* Number of children for the 3rd node */
65 CSS_SGI_MAX_CPUS_PER_CLUSTER,
66 /* Number of children for the 4th node */
67 CSS_SGI_MAX_CPUS_PER_CLUSTER,
68 /* Number of children for the 5th node */
69 CSS_SGI_MAX_CPUS_PER_CLUSTER,
70 /* Number of children for the 6th node */
71 CSS_SGI_MAX_CPUS_PER_CLUSTER,
72 /* Number of children for the 7th node */
73 CSS_SGI_MAX_CPUS_PER_CLUSTER,
74 /* Number of children for the 8th node */
75 CSS_SGI_MAX_CPUS_PER_CLUSTER,
Shriram K6824dad2022-02-23 20:34:45 +0530[diff] [blame]76#if (CSS_SGI_PLATFORM_VARIANT == 0)
Shriram K46aa2bb2022-09-15 16:11:13 +0530[diff] [blame]77 /* Number of children for the 9th node */
78 CSS_SGI_MAX_CPUS_PER_CLUSTER,
79 /* Number of children for the 10th node */
80 CSS_SGI_MAX_CPUS_PER_CLUSTER,
81 /* Number of children for the 11th node */
82 CSS_SGI_MAX_CPUS_PER_CLUSTER,
83 /* Number of children for the 12th node */
84 CSS_SGI_MAX_CPUS_PER_CLUSTER,
85 /* Number of children for the 13th node */
86 CSS_SGI_MAX_CPUS_PER_CLUSTER,
87 /* Number of children for the 14th node */
88 CSS_SGI_MAX_CPUS_PER_CLUSTER,
89 /* Number of children for the 15th node */
90 CSS_SGI_MAX_CPUS_PER_CLUSTER,
91 /* Number of children for the 16th node */
92 CSS_SGI_MAX_CPUS_PER_CLUSTER
Shriram K6824dad2022-02-23 20:34:45 +0530[diff] [blame]93#endif
Shriram K46aa2bb2022-09-15 16:11:13 +0530[diff] [blame]94};
95
96const unsigned char *tftf_plat_get_pwr_domain_tree_desc(void)
97{
98 return plat_pd_tree_desc;
99}
100
101uint64_t tftf_plat_get_mpidr(unsigned int core_pos)
102{
103 unsigned int mpid;
104
105 assert(core_pos < PLATFORM_CORE_COUNT);
106
107 mpid = make_mpid(plat_cores[core_pos].cluster_id,
108 plat_cores[core_pos].cpu_id);
109
110 return (uint64_t)mpid;
111}