| Jayanth Dodderi Chidanand | cd6c94b | 2022-02-15 17:19:05 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2024, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <asm_macros.S> |
| 8 | |
| 9 | #if __aarch64__ |
| 10 | |
| 11 | .arch armv8.7-a |
| 12 | .globl ls64_store |
| 13 | .globl ls64_load |
| 14 | |
| 15 | /* |
| 16 | * Function to store 64 bytes of data from consecutive registers into a memory |
| 17 | * location in single-copy atomic operation via st64b instruction. |
| 18 | * |
| 19 | * x0: Holds the base address of the input array of 8 64-bit integers. |
| 20 | * x1: Holds the base address of the destination/output array of 8 64-bit |
| 21 | * integers, where st64b does the single-copy atomic 64-byte store. |
| 22 | * x8-x15: Consecutive registers loaded with input array. |
| 23 | * |
| 24 | */ |
| 25 | func ls64_store |
| 26 | ldp x8, x9, [x0, #0] /* x0: Base address of Input Array */ |
| 27 | ldp x10, x11, [x0, #16] |
| 28 | ldp x12, x13, [x0, #32] |
| 29 | ldp x14, x15, [x0, #48] |
| 30 | st64b x8, [x1] /* x1: Address where 64-byte data to be stored */ |
| 31 | ret |
| 32 | endfunc ls64_store |
| 33 | |
| 34 | /* |
| 35 | * Function to load 64-byte of data from a memory location to eight consecutive |
| 36 | * 64-bit registers in single-copy atomic operation via ld64b instruction. |
| 37 | * |
| 38 | * x0: Holds the address of memory from where 64-byte of data to be loaded. |
| 39 | * x1: Holds the base address of the destination/output array of 8 64-bit integers. |
| 40 | * x9-x16: consecutive registers into which data will be copied with ld64b inst. |
| 41 | */ |
| 42 | |
| 43 | func ls64_load |
| 44 | ld64b x4, [x0] |
| 45 | stp x4, x5, [x1, #0] /* Base address of destination buffer */ |
| 46 | stp x6, x7, [x1, #16] |
| 47 | stp x8, x9, [x1, #32] |
| 48 | stp x10, x11, [x1, #48] |
| 49 | ret |
| 50 | endfunc ls64_load |
| 51 | |
| 52 | #endif /* __aarch64__ */ |