| Sandrine Bailleux | 3cd87d7 | 2018-10-09 11:12:55 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2018, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <asm_macros.S> |
| 9 | #include "../fvp_def.h" |
| 10 | |
| 11 | .globl platform_get_core_pos |
| 12 | |
| 13 | /*---------------------------------------------------------------------- |
| 14 | * unsigned int platform_get_core_pos(unsigned long mpid) |
| 15 | * |
| 16 | * Function to calculate the core position on FVP. |
| 17 | * |
| 18 | * (ClusterId * FVP_MAX_CPUS_PER_CLUSTER * FVP_MAX_PE_PER_CPU) + |
| 19 | * (CPUId * FVP_MAX_PE_PER_CPU) + |
| 20 | * ThreadId |
| 21 | * |
| 22 | * which can be simplified as: |
| 23 | * |
| 24 | * ((ClusterId * FVP_MAX_CPUS_PER_CLUSTER + CPUId) * FVP_MAX_PE_PER_CPU) |
| 25 | * + ThreadId |
| 26 | * --------------------------------------------------------------------- |
| 27 | */ |
| 28 | func platform_get_core_pos |
| 29 | /* |
| 30 | * Check for MT bit in MPIDR. If not set, shift MPIDR to left to make it |
| 31 | * look as if in a multi-threaded implementation |
| 32 | */ |
| 33 | tst r0, #MPIDR_MT_MASK |
| 34 | mov r3, r0 |
| 35 | lsleq r3, r0, #MPIDR_AFFINITY_BITS |
| 36 | |
| 37 | /* Extract individual affinity fields from MPIDR */ |
| 38 | ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS |
| 39 | ubfx r1, r3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS |
| 40 | ubfx r2, r3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS |
| 41 | |
| 42 | /* Compute linear position */ |
| 43 | mov r3, #FVP_MAX_CPUS_PER_CLUSTER |
| 44 | mla r1, r2, r3, r1 |
| 45 | mov r3, #FVP_MAX_PE_PER_CPU |
| 46 | mla r0, r1, r3, r0 |
| 47 | |
| 48 | bx lr |
| 49 | endfunc platform_get_core_pos |