blob: 1fac2c4b20cef9364178d05a5847bdd241f24170 [file] [log] [blame]
Arunachalam Ganapathya5b17762020-04-27 14:33:00 +01001/*
2 * Copyright (c) 2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include "arch.h"
8#include "asm_macros.S"
9#include "platform.h"
10
11 .globl platform_get_core_pos
12
13/*----------------------------------------------------------------------
14 * unsigned int platform_get_core_pos(unsigned long mpid)
15 *
16 * Function to calculate the core position on TC0 platforms.
17 *
18 * (ClusterId * TC0_MAX_CPUS_PER_CLUSTER * TC0_MAX_PE_PER_CPU) +
19 * (CPUId * TC0_MAX_PE_PER_CPU) +
20 * ThreadId
21 *
22 * which can be simplified as:
23 *
24 * ((ClusterId * TC0_MAX_CPUS_PER_CLUSTER + CPUId) * TC0_MAX_PE_PER_CPU)
25 * + ThreadId
26 *
27 * ---------------------------------------------------------------------
28 */
29func platform_get_core_pos
30 /*
31 * Check for MT bit in MPIDR. If not set, shift MPIDR to left to make it
32 * look as if in a multi-threaded implementation.
33 */
34 tst x0, #MPIDR_MT_MASK
35 lsl x3, x0, #MPIDR_AFFINITY_BITS
36 csel x3, x3, x0, eq
37
38 /* Extract individual affinity fields from MPIDR */
39 ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
40 ubfx x1, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
41 ubfx x2, x3, #MPIDR_AFF2_SHIFT, #MPIDR_AFFINITY_BITS
42
43 /* Compute linear position */
44 mov x3, #TC0_MAX_CPUS_PER_CLUSTER
45 madd x1, x2, x3, x1
46 mov x3, #TC0_MAX_PE_PER_CPU
47 madd x0, x1, x3, x0
48 ret
49endfunc platform_get_core_pos