Arunachalam Ganapathy | 0bbdc2d | 2023-04-05 15:30:18 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2023, Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <arch_features.h> |
| 8 | #include <arch_helpers.h> |
| 9 | #include <assert.h> |
| 10 | #include <debug.h> |
| 11 | #include <lib/extensions/sve.h> |
| 12 | |
| 13 | static inline uint64_t sve_read_zcr_elx(void) |
| 14 | { |
| 15 | return IS_IN_EL2() ? read_zcr_el2() : read_zcr_el1(); |
| 16 | } |
| 17 | |
| 18 | static inline void sve_write_zcr_elx(uint64_t reg_val) |
| 19 | { |
| 20 | if (IS_IN_EL2()) { |
| 21 | write_zcr_el2(reg_val); |
| 22 | } else { |
| 23 | write_zcr_el1(reg_val); |
| 24 | } |
| 25 | isb(); |
| 26 | } |
| 27 | |
| 28 | static void _sve_config_vq(uint8_t sve_vq) |
| 29 | { |
| 30 | u_register_t zcr_elx; |
| 31 | |
| 32 | zcr_elx = sve_read_zcr_elx(); |
| 33 | if (IS_IN_EL2()) { |
| 34 | zcr_elx &= ~(MASK(ZCR_EL2_SVE_VL)); |
| 35 | zcr_elx |= INPLACE(ZCR_EL2_SVE_VL, sve_vq); |
| 36 | } else { |
| 37 | zcr_elx &= ~(MASK(ZCR_EL1_SVE_VL)); |
| 38 | zcr_elx |= INPLACE(ZCR_EL1_SVE_VL, sve_vq); |
| 39 | } |
| 40 | sve_write_zcr_elx(zcr_elx); |
| 41 | } |
| 42 | |
| 43 | /* Set the SVE vector length in the current EL's ZCR_ELx register */ |
| 44 | void sve_config_vq(uint8_t sve_vq) |
| 45 | { |
| 46 | assert(is_armv8_2_sve_present()); |
| 47 | |
| 48 | /* cap vq to arch supported max value */ |
| 49 | if (sve_vq > SVE_VQ_ARCH_MAX) { |
| 50 | sve_vq = SVE_VQ_ARCH_MAX; |
| 51 | } |
| 52 | |
| 53 | _sve_config_vq(sve_vq); |
| 54 | } |
| 55 | |
| 56 | /* |
| 57 | * Probes all valid vector length upto 'sve_max_vq'. Configures ZCR_ELx with 0 |
| 58 | * to 'sve_max_vq'. And for each step, call sve_rdvl to get the vector length. |
| 59 | * Convert the vector length to VQ and set the bit corresponding to the VQ. |
| 60 | * Returns: |
| 61 | * bitmap corresponding to each support VL |
| 62 | */ |
| 63 | uint32_t sve_probe_vl(uint8_t sve_max_vq) |
| 64 | { |
| 65 | uint32_t vl_bitmap = 0; |
| 66 | uint8_t vq, rdvl_vq; |
| 67 | |
| 68 | assert(is_armv8_2_sve_present()); |
| 69 | |
| 70 | /* cap vq to arch supported max value */ |
| 71 | if (sve_max_vq > SVE_VQ_ARCH_MAX) { |
| 72 | sve_max_vq = SVE_VQ_ARCH_MAX; |
| 73 | } |
| 74 | |
| 75 | for (vq = 0; vq <= sve_max_vq; vq++) { |
| 76 | _sve_config_vq(vq); |
Arunachalam Ganapathy | 0358997 | 2023-08-30 11:04:51 +0100 | [diff] [blame^] | 77 | rdvl_vq = SVE_VL_TO_VQ(sve_rdvl_1()); |
Arunachalam Ganapathy | 0bbdc2d | 2023-04-05 15:30:18 +0100 | [diff] [blame] | 78 | if (vl_bitmap & BIT_32(rdvl_vq)) { |
| 79 | continue; |
| 80 | } |
| 81 | vl_bitmap |= BIT_32(rdvl_vq); |
| 82 | } |
| 83 | |
| 84 | return vl_bitmap; |
| 85 | } |
Arunachalam Ganapathy | d179ddc | 2023-04-12 10:41:42 +0100 | [diff] [blame] | 86 | |
Arunachalam Ganapathy | 0358997 | 2023-08-30 11:04:51 +0100 | [diff] [blame^] | 87 | void sve_z_regs_write(const sve_z_regs_t *z_regs) |
Arunachalam Ganapathy | d179ddc | 2023-04-12 10:41:42 +0100 | [diff] [blame] | 88 | { |
| 89 | assert(is_armv8_2_sve_present()); |
| 90 | |
| 91 | __asm__ volatile( |
| 92 | ".arch_extension sve\n" |
| 93 | fill_sve_helper(0) |
| 94 | fill_sve_helper(1) |
| 95 | fill_sve_helper(2) |
| 96 | fill_sve_helper(3) |
| 97 | fill_sve_helper(4) |
| 98 | fill_sve_helper(5) |
| 99 | fill_sve_helper(6) |
| 100 | fill_sve_helper(7) |
| 101 | fill_sve_helper(8) |
| 102 | fill_sve_helper(9) |
| 103 | fill_sve_helper(10) |
| 104 | fill_sve_helper(11) |
| 105 | fill_sve_helper(12) |
| 106 | fill_sve_helper(13) |
| 107 | fill_sve_helper(14) |
| 108 | fill_sve_helper(15) |
| 109 | fill_sve_helper(16) |
| 110 | fill_sve_helper(17) |
| 111 | fill_sve_helper(18) |
| 112 | fill_sve_helper(19) |
| 113 | fill_sve_helper(20) |
| 114 | fill_sve_helper(21) |
| 115 | fill_sve_helper(22) |
| 116 | fill_sve_helper(23) |
| 117 | fill_sve_helper(24) |
| 118 | fill_sve_helper(25) |
| 119 | fill_sve_helper(26) |
| 120 | fill_sve_helper(27) |
| 121 | fill_sve_helper(28) |
| 122 | fill_sve_helper(29) |
| 123 | fill_sve_helper(30) |
| 124 | fill_sve_helper(31) |
| 125 | ".arch_extension nosve\n" |
Arunachalam Ganapathy | 0358997 | 2023-08-30 11:04:51 +0100 | [diff] [blame^] | 126 | : : "r" (z_regs)); |
Arunachalam Ganapathy | d179ddc | 2023-04-12 10:41:42 +0100 | [diff] [blame] | 127 | } |
| 128 | |
Arunachalam Ganapathy | 0358997 | 2023-08-30 11:04:51 +0100 | [diff] [blame^] | 129 | void sve_z_regs_read(sve_z_regs_t *z_regs) |
Arunachalam Ganapathy | d179ddc | 2023-04-12 10:41:42 +0100 | [diff] [blame] | 130 | { |
| 131 | assert(is_armv8_2_sve_present()); |
| 132 | |
| 133 | __asm__ volatile( |
| 134 | ".arch_extension sve\n" |
| 135 | read_sve_helper(0) |
| 136 | read_sve_helper(1) |
| 137 | read_sve_helper(2) |
| 138 | read_sve_helper(3) |
| 139 | read_sve_helper(4) |
| 140 | read_sve_helper(5) |
| 141 | read_sve_helper(6) |
| 142 | read_sve_helper(7) |
| 143 | read_sve_helper(8) |
| 144 | read_sve_helper(9) |
| 145 | read_sve_helper(10) |
| 146 | read_sve_helper(11) |
| 147 | read_sve_helper(12) |
| 148 | read_sve_helper(13) |
| 149 | read_sve_helper(14) |
| 150 | read_sve_helper(15) |
| 151 | read_sve_helper(16) |
| 152 | read_sve_helper(17) |
| 153 | read_sve_helper(18) |
| 154 | read_sve_helper(19) |
| 155 | read_sve_helper(20) |
| 156 | read_sve_helper(21) |
| 157 | read_sve_helper(22) |
| 158 | read_sve_helper(23) |
| 159 | read_sve_helper(24) |
| 160 | read_sve_helper(25) |
| 161 | read_sve_helper(26) |
| 162 | read_sve_helper(27) |
| 163 | read_sve_helper(28) |
| 164 | read_sve_helper(29) |
| 165 | read_sve_helper(30) |
| 166 | read_sve_helper(31) |
| 167 | ".arch_extension nosve\n" |
Arunachalam Ganapathy | 0358997 | 2023-08-30 11:04:51 +0100 | [diff] [blame^] | 168 | : : "r" (z_regs)); |
Arunachalam Ganapathy | d179ddc | 2023-04-12 10:41:42 +0100 | [diff] [blame] | 169 | } |