feat(versal-net): introduce platform support
Introduce platform support for AMD-Xilinx Versal NET, an adaptive
compute acceleration platform (ACAP). The Versal NET is designed to
offer a wide range of compute, acceleration, and connectivity
options, including high-speed networking interfaces.
- pl011 is used for console.
- TTC is used for Timers.
- NVM is not supported.
For Versal devices with 1 cluster and 2 cores, the SCNTR and SCNTRS
registers are not accessible from NS EL1, so we are using TTC timers
instead.
For Versal NET devices with 4 clusters and 4 cores per cluster, the
SCNTR and SCNTRS registers are not accessible from NS EL1, so we
are using TTC timers instead.
summary:
=================================
Tests Skipped : 128
Tests Passed : 34
Tests Failed : 7
Tests Crashed : 0
Total tests : 169
=================================
NOTICE: Exiting tests.
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I80e76d9f898f5ebca91a403ff802857ea70d7868
diff --git a/plat/xilinx/versal_net/include/util.h b/plat/xilinx/versal_net/include/util.h
new file mode 100644
index 0000000..840c14f
--- /dev/null
+++ b/plat/xilinx/versal_net/include/util.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef UTIL_H
+#define UTIL_H
+
+#include <platform_def.h>
+
+#define CPU_DEF(cluster, cpu) { cluster, cpu }
+
+#if (PLATFORM_CORE_COUNT_PER_CLUSTER == 1U)
+#define CLUSTER_DEF(cluster) \
+ CPU_DEF(cluster, 0)
+#elif (PLATFORM_CORE_COUNT_PER_CLUSTER == 2U)
+#define CLUSTER_DEF(cluster) \
+ CPU_DEF(cluster, 0), \
+ CPU_DEF(cluster, 1)
+#elif (PLATFORM_CORE_COUNT_PER_CLUSTER == 4U)
+#define CLUSTER_DEF(cluster) \
+ CPU_DEF(cluster, 0), \
+ CPU_DEF(cluster, 1), \
+ CPU_DEF(cluster, 2), \
+ CPU_DEF(cluster, 3)
+#endif
+
+#endif /* UTIL_H */