Platform: Add ppc_bank_t for common_target_cfg.h
- Define a general ppc_bank_t type;
as only subset of platforms use it as enum;
others have it as a pointer.
- It is defined in platforms specific target_cfg.h.
- Minor step to a common target_cfg API.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Change-Id: I740e0e0501b61ce5ebe656e25995056882310b17
diff --git a/platform/ext/common/common_target_cfg.h b/platform/ext/common/common_target_cfg.h
index bff82f2..70cd039 100644
--- a/platform/ext/common/common_target_cfg.h
+++ b/platform/ext/common/common_target_cfg.h
@@ -20,7 +20,7 @@
{
uint32_t periph_start;
uint32_t periph_limit;
- enum ppc_bank_e periph_ppc_bank;
+ ppc_bank_t periph_ppc_bank;
int16_t periph_ppc_mask;
};
@@ -71,24 +71,24 @@
*
* \note The function does not configure privilege
*/
-void ppc_configure_to_secure(enum ppc_bank_e bank, uint32_t pos);
+void ppc_configure_to_secure(ppc_bank_t bank, uint32_t pos);
/**
* \brief Allow non-secure access to peripheral
*
* \note The function does not configure privilege
*/
-void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint32_t pos);
+void ppc_configure_to_non_secure(ppc_bank_t bank, uint32_t pos);
/**
* \brief Enable secure unprivileged access to peripheral
*/
-void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint32_t pos);
+void ppc_en_secure_unpriv(ppc_bank_t bank, uint32_t pos);
/**
* \brief Clear secure unprivileged access to peripheral
*/
-void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint32_t pos);
+void ppc_clr_secure_unpriv(ppc_bank_t bank, uint32_t pos);
/**
* \brief Enables the fault handlers BusFault, UsageFault,
diff --git a/platform/ext/target/arm/mps3/an524/target_cfg.c b/platform/ext/target/arm/mps3/an524/target_cfg.c
index e1de59e..3c2fc5c 100644
--- a/platform/ext/target/arm/mps3/an524/target_cfg.c
+++ b/platform/ext/target/arm/mps3/an524/target_cfg.c
@@ -688,7 +688,7 @@
return TFM_PLAT_ERR_SUCCESS;
}
-void ppc_configure_to_secure(enum ppc_bank_e bank, uint32_t pos)
+void ppc_configure_to_secure(ppc_bank_t bank, uint32_t pos)
{
ARM_DRIVER_PPC *ppc_driver;
@@ -703,7 +703,7 @@
}
}
-void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint32_t pos)
+void ppc_en_secure_unpriv(ppc_bank_t bank, uint32_t pos)
{
ARM_DRIVER_PPC *ppc_driver;
@@ -718,7 +718,7 @@
}
}
-void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint32_t pos)
+void ppc_clr_secure_unpriv(ppc_bank_t bank, uint32_t pos)
{
ppc_configure_to_secure(bank, pos);
}
diff --git a/platform/ext/target/arm/mps3/an524/target_cfg.h b/platform/ext/target/arm/mps3/an524/target_cfg.h
index 48d846e..d79eabe 100644
--- a/platform/ext/target/arm/mps3/an524/target_cfg.h
+++ b/platform/ext/target/arm/mps3/an524/target_cfg.h
@@ -26,7 +26,7 @@
* \brief Defines the word offsets of Slave Peripheral Protection Controller
* Registers
*/
-enum ppc_bank_e {
+typedef enum {
PPC_SP_DO_NOT_CONFIGURE = -1,
PPC_SP_AHB_PPC0 = 0,
PPC_SP_AHB_PPC_EXP0 = 4,
@@ -35,6 +35,6 @@
PPC_SP_APB_PPC_EXP0 = 12,
PPC_SP_APB_PPC_EXP1 = 13,
PPC_SP_APB_PPC_EXP2 = 14,
-};
+} ppc_bank_t;
#endif /* __TARGET_CFG_H__ */
diff --git a/platform/ext/target/arm/mps3/an547/target_cfg.c b/platform/ext/target/arm/mps3/an547/target_cfg.c
index 3b08c2a..5df14fa 100644
--- a/platform/ext/target/arm/mps3/an547/target_cfg.c
+++ b/platform/ext/target/arm/mps3/an547/target_cfg.c
@@ -474,7 +474,7 @@
return TFM_PLAT_ERR_SUCCESS;
}
-void ppc_configure_to_secure(enum ppc_bank_e bank, uint32_t pos)
+void ppc_configure_to_secure(ppc_bank_t bank, uint32_t pos)
{
DRIVER_PPC_SSE300 *ppc_driver;
@@ -488,7 +488,7 @@
}
}
-void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint32_t pos)
+void ppc_configure_to_non_secure(ppc_bank_t bank, uint32_t pos)
{
DRIVER_PPC_SSE300 *ppc_driver;
@@ -502,7 +502,7 @@
}
}
-void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint32_t pos)
+void ppc_en_secure_unpriv(ppc_bank_t bank, uint32_t pos)
{
DRIVER_PPC_SSE300 *ppc_driver;
@@ -518,7 +518,7 @@
}
}
-void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint32_t pos)
+void ppc_clr_secure_unpriv(ppc_bank_t bank, uint32_t pos)
{
DRIVER_PPC_SSE300 *ppc_driver;
diff --git a/platform/ext/target/arm/mps3/an547/target_cfg.h b/platform/ext/target/arm/mps3/an547/target_cfg.h
index 2a212fb..1b428e6 100644
--- a/platform/ext/target/arm/mps3/an547/target_cfg.h
+++ b/platform/ext/target/arm/mps3/an547/target_cfg.h
@@ -26,7 +26,7 @@
* \brief Defines the word offsets of Slave Peripheral Protection Controller
* Registers
*/
-enum ppc_bank_e
+typedef enum
{
PPC_SP_DO_NOT_CONFIGURE = -1,
PPC_SP_MAIN0 = 0,
@@ -40,7 +40,7 @@
PPC_SP_PERIPH_EXP1 = 8,
PPC_SP_PERIPH_EXP2 = 9,
PPC_SP_PERIPH_EXP3 = 10,
-};
+} ppc_bank_t;
/**
* \brief Set to secure the initialized non-secure regions of
diff --git a/platform/ext/target/arm/mps3/an552/target_cfg.c b/platform/ext/target/arm/mps3/an552/target_cfg.c
index bd29d9e..4161db2 100644
--- a/platform/ext/target/arm/mps3/an552/target_cfg.c
+++ b/platform/ext/target/arm/mps3/an552/target_cfg.c
@@ -536,7 +536,7 @@
return TFM_PLAT_ERR_SUCCESS;
}
-void ppc_configure_to_secure(enum ppc_bank_e bank, uint32_t pos)
+void ppc_configure_to_secure(ppc_bank_t bank, uint32_t pos)
{
DRIVER_PPC_SSE300 *ppc_driver;
@@ -550,7 +550,7 @@
}
}
-void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint32_t pos)
+void ppc_configure_to_non_secure(ppc_bank_t bank, uint32_t pos)
{
DRIVER_PPC_SSE300 *ppc_driver;
@@ -564,7 +564,7 @@
}
}
-void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint32_t pos)
+void ppc_en_secure_unpriv(ppc_bank_t bank, uint32_t pos)
{
DRIVER_PPC_SSE300 *ppc_driver;
@@ -580,7 +580,7 @@
}
}
-void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint32_t pos)
+void ppc_clr_secure_unpriv(ppc_bank_t bank, uint32_t pos)
{
DRIVER_PPC_SSE300 *ppc_driver;
diff --git a/platform/ext/target/arm/mps3/an552/target_cfg.h b/platform/ext/target/arm/mps3/an552/target_cfg.h
index fcc47cf..f184d2c 100644
--- a/platform/ext/target/arm/mps3/an552/target_cfg.h
+++ b/platform/ext/target/arm/mps3/an552/target_cfg.h
@@ -26,7 +26,7 @@
* \brief Defines the word offsets of Slave Peripheral Protection Controller
* Registers
*/
-enum ppc_bank_e
+typedef enum
{
PPC_SP_DO_NOT_CONFIGURE = -1,
PPC_SP_MAIN0 = 0,
@@ -40,6 +40,6 @@
PPC_SP_PERIPH_EXP1 = 8,
PPC_SP_PERIPH_EXP2 = 9,
PPC_SP_PERIPH_EXP3 = 10,
-};
+} ppc_bank_t;
#endif /* __TARGET_CFG_H__ */
diff --git a/platform/ext/target/arm/mps3/corstone310/common/target_cfg.c b/platform/ext/target/arm/mps3/corstone310/common/target_cfg.c
index 7ba96b5..2ca2ce7 100644
--- a/platform/ext/target/arm/mps3/corstone310/common/target_cfg.c
+++ b/platform/ext/target/arm/mps3/corstone310/common/target_cfg.c
@@ -780,7 +780,7 @@
return TFM_PLAT_ERR_SUCCESS;
}
-void ppc_configure_to_secure(enum ppc_bank_e bank, uint32_t pos)
+void ppc_configure_to_secure(ppc_bank_t bank, uint32_t pos)
{
ARM_DRIVER_PPC_CORSTONE310 *ppc_driver;
@@ -794,7 +794,7 @@
}
}
-void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint32_t pos)
+void ppc_configure_to_non_secure(ppc_bank_t bank, uint32_t pos)
{
ARM_DRIVER_PPC_CORSTONE310 *ppc_driver;
@@ -808,7 +808,7 @@
}
}
-void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint32_t pos)
+void ppc_en_secure_unpriv(ppc_bank_t bank, uint32_t pos)
{
ARM_DRIVER_PPC_CORSTONE310 *ppc_driver;
@@ -824,7 +824,7 @@
}
}
-void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint32_t pos)
+void ppc_clr_secure_unpriv(ppc_bank_t bank, uint32_t pos)
{
ARM_DRIVER_PPC_CORSTONE310 *ppc_driver;
diff --git a/platform/ext/target/arm/mps3/corstone310/common/target_cfg.h b/platform/ext/target/arm/mps3/corstone310/common/target_cfg.h
index 68a2ad4..7003a02 100644
--- a/platform/ext/target/arm/mps3/corstone310/common/target_cfg.h
+++ b/platform/ext/target/arm/mps3/corstone310/common/target_cfg.h
@@ -27,7 +27,7 @@
* \brief Defines the word offsets of Slave Peripheral Protection Controller
* Registers
*/
-enum ppc_bank_e
+typedef enum
{
PPC_SP_DO_NOT_CONFIGURE = -1,
PPC_SP_MAIN0 = 0,
@@ -41,7 +41,7 @@
PPC_SP_PERIPH_EXP1 = 8,
PPC_SP_PERIPH_EXP2 = 9,
PPC_SP_PERIPH_EXP3 = 10,
-};
+} ppc_bank_t;
/**
* \brief Initialize the DMA devices and channels.