Core: Add volatile to inline assembly blocks
This patch introduces the consistent usage of the keyword
volatile to mark inline assembly blocks in order to avoid
potential issues with aggressive optimisation modes that
could remove them.
Change-Id: I304286658b87ec41e738760479ef067895a63464
Signed-off-by: Antonio de Angelis <antonio.deangelis@arm.com>
diff --git a/interface/include/tfm_ns_svc.h b/interface/include/tfm_ns_svc.h
index a45cd97..366a70a 100644
--- a/interface/include/tfm_ns_svc.h
+++ b/interface/include/tfm_ns_svc.h
@@ -24,7 +24,7 @@
* \brief Macro to encode an svc instruction
*
*/
-#define SVC(code) __ASM("svc %0" : : "I" (code))
+#define SVC(code) __ASM volatile("svc %0" : : "I" (code))
/**
* \def LIST_SVC_NSPM