Build: cfi drivers unification for corstone1000 and rss/*
Signed-off-by: Joel Goddard <joel.goddard@arm.com>
Change-Id: I25a565a23d74e42c2a06b6303850f2db4382ded3
diff --git a/platform/ext/target/arm/corstone1000/CMakeLists.txt b/platform/ext/target/arm/corstone1000/CMakeLists.txt
index 8dab1c0..d75f648 100644
--- a/platform/ext/target/arm/corstone1000/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/CMakeLists.txt
@@ -73,6 +73,7 @@
partition
services/include
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
${PLATFORM_DIR}/ext/target/arm/drivers/qspi/xilinx_pg153_axi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/n25q256a
@@ -112,7 +113,7 @@
target_sources(platform_s
PRIVATE
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
- Native_Driver/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
)
else()
target_sources(platform_s
@@ -150,7 +151,7 @@
./CMSIS_Driver/Driver_Flash.c
./CMSIS_Driver/Driver_USART.c
./Native_Driver/uart_pl011_drv.c
- $<$<BOOL:${PLATFORM_IS_FVP}>:${CMAKE_CURRENT_SOURCE_DIR}/Native_Driver/cfi_drv.c>
+ $<$<BOOL:${PLATFORM_IS_FVP}>:${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c>
$<$<BOOL:${PLATFORM_IS_FVP}>:${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c>
$<$<NOT:$<BOOL:${PLATFORM_IS_FVP}>>:${PLATFORM_DIR}/ext/target/arm/drivers/qspi/xilinx_pg153_axi/xilinx_pg153_axi_qspi_controller_drv.c>
$<$<NOT:$<BOOL:${PLATFORM_IS_FVP}>>:${PLATFORM_DIR}/ext/target/arm/drivers/flash/n25q256a/spi_n25q256a_flash_lib.c>
@@ -182,6 +183,7 @@
./fw_update_agent
./soft_crc
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
${PLATFORM_DIR}/ext/target/arm/drivers/qspi/xilinx_pg153_axi/
${PLATFORM_DIR}/ext/target/arm/drivers/flash/n25q256a/
@@ -218,7 +220,7 @@
target_sources(platform_bl2
PRIVATE
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
- Native_Driver/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
)
else()
target_sources(platform_bl2
@@ -272,6 +274,7 @@
soft_crc
io
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
${PLATFORM_DIR}/ext/target/arm/drivers/qspi/xilinx_pg153_axi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/n25q256a
diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/cfi_drv.c b/platform/ext/target/arm/corstone1000/Native_Driver/cfi_drv.c
deleted file mode 100644
index 533f087..0000000
--- a/platform/ext/target/arm/corstone1000/Native_Driver/cfi_drv.c
+++ /dev/null
@@ -1,314 +0,0 @@
-/*
- * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <errno.h>
-
-#include "cfi_drv.h"
-
-
-
-/*
- * This memory is organized as an interleaved memory of two chips
- * with a 16 bit word. It means that every 32 bit access is going
- * to access to two different chips. This is very important when
- * we send commands or read status of the chips.
- */
-
-/*
- * DWS ready poll retries. The number of retries in this driver have been
- * obtained empirically from Juno. FVP implements a zero wait state NOR flash
- * model
- */
-#define DWS_WORD_PROGRAM_RETRIES 1000
-#define DWS_WORD_ERASE_RETRIES 3000000
-#define DWS_WORD_LOCK_RETRIES 1000
-
-/* Helper macro to detect end of command */
-#define NOR_CMD_END (NOR_DWS | (NOR_DWS << 16l))
-#define NOR_CMD_END_8BIT (NOR_DWS)
-
-
-/* Helper macros to access two flash banks in parallel */
-#define NOR_2X16(d) ((d << 16) | (d & 0xffff))
-
-static inline void mmio_write_32(uintptr_t addr, uint32_t value)
-{
- *(volatile uint32_t*)addr = value;
-}
-
-static inline void mmio_write_8(uintptr_t addr, uint8_t value)
-{
- *(volatile uint8_t*)addr = value;
-}
-
-static inline uint32_t mmio_read_32(uintptr_t addr)
-{
- return *(volatile uint32_t*)addr;
-}
-
-uint8_t nor_cfi_reg_read(uintptr_t addr){
- return *(volatile uint8_t*)addr;
-}
-
-void nor_cfi_reg_write(uintptr_t addr, uint32_t value){
- *(volatile uint32_t*)addr = value;
-}
-
-static unsigned int nor_status(uintptr_t base_addr)
-{
- unsigned long status;
-
- nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG);
- status = mmio_read_32(base_addr);
- status |= status >> 16; /* merge status from both flash banks */
-
- return status & 0xFFFF;
-}
-
-void nor_send_cmd(uintptr_t base_addr, unsigned long cmd)
-{
- mmio_write_32(base_addr, NOR_2X16(cmd));
-}
-
-void nor_send_cmd_byte(uintptr_t base_addr, unsigned long cmd)
-{
- mmio_write_8(base_addr, cmd);
-}
-
-/*
- * Poll Write State Machine.
- * Return values:
- * 0 = WSM ready
- * -EBUSY = WSM busy after the number of retries
- */
-static enum cfi_error_t nor_poll_dws(uintptr_t base_addr, unsigned long int retries)
-{
- unsigned long status;
-
- do {
- nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG);
- status = mmio_read_32(base_addr);
- if ((status & NOR_CMD_END) == NOR_CMD_END)
- return 0;
- } while (retries-- > 0);
-
- return -CFI_ERR_DEV_BUSY;
-}
-
-/*
- * Poll Write State Machine.
- * Return values:
- * 0 = WSM ready
- * -EBUSY = WSM busy after the number of retries
- */
-static enum cfi_error_t nor_poll_dws_byte(uintptr_t base_addr, unsigned long int retries)
-{
- unsigned long status;
-
- do {
- nor_send_cmd_byte(base_addr, NOR_CMD_READ_STATUS_REG);
- status = nor_cfi_reg_read(base_addr);
- if ((status & NOR_CMD_END_8BIT) == NOR_CMD_END_8BIT)
- return 0;
- } while (retries-- > 0);
-
- return -CFI_ERR_DEV_BUSY;
-}
-
-/*
- * Return values:
- * 0 = success
- * -EPERM = Device protected or Block locked
- * -EIO = General I/O error
- */
-static enum cfi_error_t nor_full_status_check(uintptr_t base_addr)
-{
- unsigned long status;
-
- /* Full status check */
- status = nor_status(base_addr);
-
- if (status & (NOR_PS | NOR_BLS | NOR_ESS | NOR_PSS))
- return -CFI_ERR_DEV_PROTECTED;
- if (status & (NOR_VPPS | NOR_ES))
- return -CFI_ERR_GENERAL_IO;
- return 0;
-}
-
-
-/*
- * This function programs a word in the flash. Be aware that it only
- * can reset bits that were previously set. It cannot set bits that
- * were previously reset. The resulting bits = old_bits & new bits.
- * Return values:
- * 0 = success
- * otherwise it returns a negative value
- */
-enum cfi_error_t nor_word_program(uintptr_t base_addr, unsigned long data)
-{
- uint32_t status;
- int ret;
-
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- /* Set the device in write word mode */
- nor_send_cmd(base_addr, NOR_CMD_WORD_PROGRAM);
- mmio_write_32(base_addr, data);
-
- ret = nor_poll_dws(base_addr, DWS_WORD_PROGRAM_RETRIES);
- if (ret == 0) {
- /* Full status check */
- nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG);
- status = mmio_read_32(base_addr);
-
- if (status & (NOR_PS | NOR_BLS)) {
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
- ret = -CFI_ERR_DEV_PROTECTED;
- }
- }
-
- if (ret == 0)
- ret = nor_full_status_check(base_addr);
- nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-
-enum cfi_error_t nor_byte_program(uintptr_t base_addr, uint8_t data)
-{
- uint32_t status;
- int ret;
-
- nor_send_cmd_byte(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- /* Set the device in write byte mode */
- nor_send_cmd_byte(base_addr, NOR_CMD_WORD_PROGRAM);
- mmio_write_8(base_addr, data);
-
- ret = nor_poll_dws_byte(base_addr, DWS_WORD_PROGRAM_RETRIES);
- if (ret == 0) {
- /* Full status check */
- nor_send_cmd_byte(base_addr, NOR_CMD_READ_STATUS_REG);
- status = nor_cfi_reg_read(base_addr);
-
- if (status & (NOR_PS | NOR_BLS)) {
- nor_send_cmd_byte(base_addr, NOR_CMD_CLEAR_STATUS_REG);
- ret = -CFI_ERR_DEV_PROTECTED;
- }
- }
-
-
- nor_send_cmd_byte(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-/*
- * Erase a full 256K block
- * Return values:
- * 0 = success
- * otherwise it returns a negative value
- */
-enum cfi_error_t nor_erase(uintptr_t base_addr)
-{
- int ret;
-
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- nor_send_cmd(base_addr, NOR_CMD_BLOCK_ERASE);
- nor_send_cmd(base_addr, NOR_CMD_BLOCK_ERASE_ACK);
-
- ret = nor_poll_dws(base_addr, DWS_WORD_ERASE_RETRIES);
- if (ret == 0)
- ret = nor_full_status_check(base_addr);
- nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-enum cfi_error_t nor_erase_byte(uintptr_t base_addr)
-{
- enum cfi_error_t ret;
-
- nor_send_cmd_byte(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- nor_send_cmd_byte(base_addr, NOR_CMD_BLOCK_ERASE);
- nor_send_cmd_byte(base_addr, NOR_CMD_BLOCK_ERASE_ACK);
-
- ret = nor_poll_dws_byte(base_addr, DWS_WORD_ERASE_RETRIES);
-
- nor_send_cmd_byte(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-/*
- * Lock a full 256 block
- * Return values:
- * 0 = success
- * otherwise it returns a negative value
- */
-enum cfi_error_t nor_lock(uintptr_t base_addr)
-{
- enum cfi_error_t ret;
-
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- nor_send_cmd(base_addr, NOR_CMD_LOCK_UNLOCK);
- nor_send_cmd(base_addr, NOR_LOCK_BLOCK);
-
- ret = nor_poll_dws(base_addr, DWS_WORD_LOCK_RETRIES);
- if (ret == 0)
- ret = nor_full_status_check(base_addr);
- nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-/*
- * unlock a full 256 block
- * Return values:
- * 0 = success
- * otherwise it returns a negative value
- */
-enum cfi_error_t nor_unlock(uintptr_t base_addr)
-{
- enum cfi_error_t ret;
-
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- nor_send_cmd(base_addr, NOR_CMD_LOCK_UNLOCK);
- nor_send_cmd(base_addr, NOR_UNLOCK_BLOCK);
-
- ret = nor_poll_dws(base_addr, DWS_WORD_LOCK_RETRIES);
- if (ret == 0)
- ret = nor_full_status_check(base_addr);
- nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-
-
-unsigned int nor_id_check(uintptr_t base_addr)
-{
- unsigned long status,status1,status2;
-
- nor_send_cmd(base_addr, NOR_CMD_READ_ID_CODE);
- status = mmio_read_32(base_addr);
- status1 = mmio_read_32(base_addr+1*4);
- status2 = mmio_read_32(base_addr+2*4);
-
- CFI_FLASH_LOG_MSG("STATUS ID: %X \n",status);
- CFI_FLASH_LOG_MSG("STATUS ID: %X \n",status1);
- CFI_FLASH_LOG_MSG("STATUS ID: %X \n",status2);
- status |= status >> 16; /* merge status from both flash banks */
-
- CFI_FLASH_LOG_MSG("STATUS ID: %X \n",status);
-
- return status & 0xFFFF;
-}
diff --git a/platform/ext/target/arm/corstone1000/Native_Driver/cfi_drv.h b/platform/ext/target/arm/corstone1000/Native_Driver/cfi_drv.h
deleted file mode 100644
index 75e93ad..0000000
--- a/platform/ext/target/arm/corstone1000/Native_Driver/cfi_drv.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- *
- * Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- *
- */
-
-#ifndef CFI_DRV_H
-#define CFI_DRV_H
-
-#include <stdint.h>
-#include <stdbool.h>
-
-/* First bus cycle */
-#define NOR_CMD_READ_ARRAY 0xFF
-#define NOR_CMD_READ_ID_CODE 0x90
-#define NOR_CMD_READ_QUERY 0x98
-#define NOR_CMD_READ_STATUS_REG 0x70
-#define NOR_CMD_CLEAR_STATUS_REG 0x50
-#define NOR_CMD_WRITE_TO_BUFFER 0xE8
-#define NOR_CMD_WORD_PROGRAM 0x40
-#define NOR_CMD_BLOCK_ERASE 0x20
-#define NOR_CMD_LOCK_UNLOCK 0x60
-#define NOR_CMD_BLOCK_ERASE_ACK 0xD0
-
-/* Second bus cycle */
-#define NOR_LOCK_BLOCK 0x01
-#define NOR_UNLOCK_BLOCK 0xD0
-
-/* Status register bits */
-#define NOR_DWS (1 << 7)
-#define NOR_ESS (1 << 6)
-#define NOR_ES (1 << 5)
-#define NOR_PS (1 << 4)
-#define NOR_VPPS (1 << 3)
-#define NOR_PSS (1 << 2)
-#define NOR_BLS (1 << 1)
-#define NOR_BWS (1 << 0)
-
-/* Set 1 to enable debug messages */
-#define DEBUG_CFI_FLASH 0
-
-#include <stdio.h>
-#if (DEBUG_CFI_FLASH == 1)
- #define CFI_FLASH_LOG_MSG(f_, ...) printf((f_), ##__VA_ARGS__)
-#else
- #define CFI_FLASH_LOG_MSG(f_, ...)
-#endif
-
-enum cfi_error_t {
- CFI_ERR_NONE,
- CFI_ERR_WRONG_ARGUMENT,
- CFI_ERR_NOT_INITIALIZED,
- CFI_ERR_DEV_BUSY,
- CFI_ERR_GENERAL_IO,
- CFI_ERR_DEV_PROTECTED
-};
-
-/**
- * \brief CFI device configuration structure
- */
-struct cfi_dev_cfg_t {
- const uint32_t base; /*!< CFI base address */
-};
-
-/**
- * \brief CFI controller device structure
- */
-struct cfi_dev_t {
- const struct cfi_dev_cfg_t* const cfg;
-};
-
-/* Public API */
-void nor_send_cmd(uintptr_t base_addr, unsigned long cmd);
-void nor_send_cmd_byte(uintptr_t base_addr, unsigned long cmd);
-enum cfi_error_t nor_word_program(uintptr_t base_addr, unsigned long data);
-enum cfi_error_t nor_byte_program(uintptr_t base_addr, uint8_t data);
-enum cfi_error_t nor_lock(uintptr_t base_addr);
-enum cfi_error_t nor_unlock(uintptr_t base_addr);
-enum cfi_error_t nor_erase(uintptr_t base_addr);
-unsigned int nor_id_check(uintptr_t base_addr);
-uint8_t nor_cfi_reg_read(uintptr_t addr);
-void nor_cfi_reg_write(uintptr_t addr, uint32_t value);
-#endif
diff --git a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
index f67c729..bfaed56 100644
--- a/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
+++ b/platform/ext/target/arm/corstone1000/bl1/CMakeLists.txt
@@ -257,7 +257,7 @@
target_sources(bl1_main
PRIVATE
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
- ../Native_Driver/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
)
else()
target_sources(bl1_main
@@ -278,6 +278,7 @@
../Native_Driver
../fw_update_agent
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
${PLATFORM_DIR}/ext/target/arm/drivers/qspi/xilinx_pg153_axi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/n25q256a
diff --git a/platform/ext/target/arm/rss/tc/host_drivers/cfi_drv.c b/platform/ext/target/arm/drivers/flash/cfi/cfi_drv.c
similarity index 100%
rename from platform/ext/target/arm/rss/tc/host_drivers/cfi_drv.c
rename to platform/ext/target/arm/drivers/flash/cfi/cfi_drv.c
diff --git a/platform/ext/target/arm/rss/tc/host_drivers/cfi_drv.h b/platform/ext/target/arm/drivers/flash/cfi/cfi_drv.h
similarity index 100%
rename from platform/ext/target/arm/rss/tc/host_drivers/cfi_drv.h
rename to platform/ext/target/arm/drivers/flash/cfi/cfi_drv.h
diff --git a/platform/ext/target/arm/rss/kronos/CMakeLists.txt b/platform/ext/target/arm/rss/kronos/CMakeLists.txt
index b359ad4..5776ae7 100644
--- a/platform/ext/target/arm/rss/kronos/CMakeLists.txt
+++ b/platform/ext/target/arm/rss/kronos/CMakeLists.txt
@@ -23,7 +23,7 @@
PRIVATE
cmsis_drivers/Driver_Flash.c
device/host_device_definition.c
- host_drivers/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_drivers/Driver_USART.c>
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011/uart_pl011_drv.c>
@@ -34,8 +34,8 @@
PUBLIC
./cmsis_drivers
./device
- ./host_drivers
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
@@ -46,7 +46,7 @@
PRIVATE
cmsis_drivers/Driver_Flash.c
device/host_device_definition.c
- host_drivers/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_drivers/Driver_USART.c>
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011/uart_pl011_drv.c>
@@ -56,8 +56,8 @@
PUBLIC
./cmsis_drivers
./device
- ./host_drivers
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
@@ -71,7 +71,7 @@
cmsis_drivers/Driver_Flash.c
cmsis_drivers/Driver_Flash.c
device/host_device_definition.c
- host_drivers/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_drivers/Driver_USART.c>
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011/uart_pl011_drv.c>
@@ -81,9 +81,9 @@
PUBLIC
./cmsis_drivers
./device
- ./host_drivers
./bl2
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
@@ -92,7 +92,7 @@
target_sources(platform_bl1_1
PRIVATE
- host_drivers/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
cmsis_drivers/Driver_Flash.c
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_drivers/Driver_USART.c>
@@ -105,16 +105,16 @@
INTERFACE
./cmsis_drivers
./device
- ./host_drivers
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
target_include_directories(platform_bl1_2
PUBLIC
- ./host_drivers
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
diff --git a/platform/ext/target/arm/rss/kronos/host_drivers/cfi_drv.c b/platform/ext/target/arm/rss/kronos/host_drivers/cfi_drv.c
deleted file mode 100644
index 3feecd2..0000000
--- a/platform/ext/target/arm/rss/kronos/host_drivers/cfi_drv.c
+++ /dev/null
@@ -1,312 +0,0 @@
-/*
- * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <errno.h>
-
-#include "cfi_drv.h"
-
-
-
-/*
- * This memory is organized as an interleaved memory of two chips
- * with a 16 bit word. It means that every 32 bit access is going
- * to access to two different chips. This is very important when
- * we send commands or read status of the chips.
- */
-
-/*
- * DWS ready poll retries. The number of retries in this driver have been
- * obtained empirically from Juno. FVP implements a zero wait state NOR flash
- * model
- */
-#define DWS_WORD_PROGRAM_RETRIES 1000
-#define DWS_WORD_ERASE_RETRIES 3000000
-#define DWS_WORD_LOCK_RETRIES 1000
-
-/* Helper macro to detect end of command */
-#define NOR_CMD_END (NOR_DWS | (NOR_DWS << 16l))
-#define NOR_CMD_END_8BIT (NOR_DWS)
-
-
-/* Helper macros to access two flash banks in parallel */
-#define NOR_2X16(d) ((d << 16) | (d & 0xffff))
-
-static inline void mmio_write_32(uintptr_t addr, uint32_t value)
-{
- *(volatile uint32_t*)addr = value;
-}
-
-static inline void mmio_write_8(uintptr_t addr, uint8_t value)
-{
- *(volatile uint8_t*)addr = value;
-}
-
-static inline uint32_t mmio_read_32(uintptr_t addr)
-{
- return *(volatile uint32_t*)addr;
-}
-
-uint8_t nor_cfi_reg_read(uintptr_t addr){
- return *(volatile uint8_t*)addr;
-}
-
-void nor_cfi_reg_write(uintptr_t addr, uint32_t value){
- *(volatile uint32_t*)addr = value;
-}
-
-static unsigned int nor_status(uintptr_t base_addr)
-{
- unsigned long status;
-
- nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG);
- status = mmio_read_32(base_addr);
- status |= status >> 16; /* merge status from both flash banks */
-
- return status & 0xFFFF;
-}
-
-void nor_send_cmd(uintptr_t base_addr, unsigned long cmd)
-{
- mmio_write_32(base_addr, NOR_2X16(cmd));
-}
-
-void nor_send_cmd_byte(uintptr_t base_addr, unsigned long cmd)
-{
- mmio_write_8(base_addr, cmd);
-}
-
-/*
- * Poll Write State Machine.
- * Return values:
- * 0 = WSM ready
- * -EBUSY = WSM busy after the number of retries
- */
-static enum cfi_error_t nor_poll_dws(uintptr_t base_addr, unsigned long int retries)
-{
- unsigned long status;
-
- do {
- nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG);
- status = mmio_read_32(base_addr);
- if ((status & NOR_CMD_END) == NOR_CMD_END)
- return 0;
- } while (retries-- > 0);
-
- return -CFI_ERR_DEV_BUSY;
-}
-
-/*
- * Poll Write State Machine.
- * Return values:
- * 0 = WSM ready
- * -EBUSY = WSM busy after the number of retries
- */
-static enum cfi_error_t nor_poll_dws_byte(uintptr_t base_addr, unsigned long int retries)
-{
- unsigned long status;
-
- do {
- nor_send_cmd_byte(base_addr, NOR_CMD_READ_STATUS_REG);
- status = nor_cfi_reg_read(base_addr);
- if ((status & NOR_CMD_END_8BIT) == NOR_CMD_END_8BIT)
- return 0;
- } while (retries-- > 0);
-
- return -CFI_ERR_DEV_BUSY;
-}
-
-/*
- * Return values:
- * 0 = success
- * -EPERM = Device protected or Block locked
- * -EIO = General I/O error
- */
-static enum cfi_error_t nor_full_status_check(uintptr_t base_addr)
-{
- unsigned long status;
-
- /* Full status check */
- status = nor_status(base_addr);
-
- if (status & (NOR_PS | NOR_BLS | NOR_ESS | NOR_PSS))
- return -CFI_ERR_DEV_PROTECTED;
- if (status & (NOR_VPPS | NOR_ES))
- return -CFI_ERR_GENERAL_IO;
- return 0;
-}
-
-
-/*
- * This function programs a word in the flash. Be aware that it only
- * can reset bits that were previously set. It cannot set bits that
- * were previously reset. The resulting bits = old_bits & new bits.
- * Return values:
- * 0 = success
- * otherwise it returns a negative value
- */
-enum cfi_error_t nor_word_program(uintptr_t base_addr, unsigned long data)
-{
- uint32_t status;
- int ret;
-
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- /* Set the device in write word mode */
- nor_send_cmd(base_addr, NOR_CMD_WORD_PROGRAM);
- mmio_write_32(base_addr, data);
-
- ret = nor_poll_dws(base_addr, DWS_WORD_PROGRAM_RETRIES);
- if (ret == 0) {
- /* Full status check */
- nor_send_cmd(base_addr, NOR_CMD_READ_STATUS_REG);
- status = mmio_read_32(base_addr);
-
- if (status & (NOR_PS | NOR_BLS)) {
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
- ret = -CFI_ERR_DEV_PROTECTED;
- }
- }
-
- if (ret == 0)
- ret = nor_full_status_check(base_addr);
- nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-
-enum cfi_error_t nor_byte_program(uintptr_t base_addr, uint8_t data)
-{
- uint32_t status;
- int ret;
-
- nor_send_cmd_byte(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- /* Set the device in write byte mode */
- nor_send_cmd_byte(base_addr, NOR_CMD_WORD_PROGRAM);
- mmio_write_8(base_addr, data);
-
- ret = nor_poll_dws_byte(base_addr, DWS_WORD_PROGRAM_RETRIES);
- if (ret == 0) {
- /* Full status check */
- nor_send_cmd_byte(base_addr, NOR_CMD_READ_STATUS_REG);
- status = nor_cfi_reg_read(base_addr);
-
- if (status & (NOR_PS | NOR_BLS)) {
- nor_send_cmd_byte(base_addr, NOR_CMD_CLEAR_STATUS_REG);
- ret = -CFI_ERR_DEV_PROTECTED;
- }
- }
-
-
- nor_send_cmd_byte(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-/*
- * Erase a full 256K block
- * Return values:
- * 0 = success
- * otherwise it returns a negative value
- */
-enum cfi_error_t nor_erase(uintptr_t base_addr)
-{
- int ret;
-
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- nor_send_cmd(base_addr, NOR_CMD_BLOCK_ERASE);
- nor_send_cmd(base_addr, NOR_CMD_BLOCK_ERASE_ACK);
-
- ret = nor_poll_dws(base_addr, DWS_WORD_ERASE_RETRIES);
- if (ret == 0)
- ret = nor_full_status_check(base_addr);
- nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-enum cfi_error_t nor_erase_byte(uintptr_t base_addr)
-{
- enum cfi_error_t ret;
-
- nor_send_cmd_byte(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- nor_send_cmd_byte(base_addr, NOR_CMD_BLOCK_ERASE);
- nor_send_cmd_byte(base_addr, NOR_CMD_BLOCK_ERASE_ACK);
-
- ret = nor_poll_dws_byte(base_addr, DWS_WORD_ERASE_RETRIES);
-
- nor_send_cmd_byte(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-/*
- * Lock a full 256 block
- * Return values:
- * 0 = success
- * otherwise it returns a negative value
- */
-enum cfi_error_t nor_lock(uintptr_t base_addr)
-{
- enum cfi_error_t ret;
-
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- nor_send_cmd(base_addr, NOR_CMD_LOCK_UNLOCK);
- nor_send_cmd(base_addr, NOR_LOCK_BLOCK);
-
- ret = nor_poll_dws(base_addr, DWS_WORD_LOCK_RETRIES);
- if (ret == 0)
- ret = nor_full_status_check(base_addr);
- nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-/*
- * unlock a full 256 block
- * Return values:
- * 0 = success
- * otherwise it returns a negative value
- */
-enum cfi_error_t nor_unlock(uintptr_t base_addr)
-{
- enum cfi_error_t ret;
-
- nor_send_cmd(base_addr, NOR_CMD_CLEAR_STATUS_REG);
-
- nor_send_cmd(base_addr, NOR_CMD_LOCK_UNLOCK);
- nor_send_cmd(base_addr, NOR_UNLOCK_BLOCK);
-
- ret = nor_poll_dws(base_addr, DWS_WORD_LOCK_RETRIES);
- if (ret == 0)
- ret = nor_full_status_check(base_addr);
- nor_send_cmd(base_addr, NOR_CMD_READ_ARRAY);
-
- return ret;
-}
-
-unsigned int nor_id_check(uintptr_t base_addr)
-{
- unsigned long status,status1,status2;
-
- nor_send_cmd(base_addr, NOR_CMD_READ_ID_CODE);
- status = mmio_read_32(base_addr);
- status1 = mmio_read_32(base_addr+1*4);
- status2 = mmio_read_32(base_addr+2*4);
-
- CFI_FLASH_LOG_MSG("STATUS ID: %X \n",status);
- CFI_FLASH_LOG_MSG("STATUS ID: %X \n",status1);
- CFI_FLASH_LOG_MSG("STATUS ID: %X \n",status2);
- status |= status >> 16; /* merge status from both flash banks */
-
- CFI_FLASH_LOG_MSG("STATUS ID: %X \n",status);
-
- return status & 0xFFFF;
-}
diff --git a/platform/ext/target/arm/rss/kronos/host_drivers/cfi_drv.h b/platform/ext/target/arm/rss/kronos/host_drivers/cfi_drv.h
deleted file mode 100644
index 2a4fab2..0000000
--- a/platform/ext/target/arm/rss/kronos/host_drivers/cfi_drv.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- *
- * Copyright (c) 2021-2023, Arm Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- *
- */
-
-#ifndef CFI_DRV_H
-#define CFI_DRV_H
-
-#include <stdint.h>
-#include <stdbool.h>
-
-/* First bus cycle */
-#define NOR_CMD_READ_ARRAY 0xFF
-#define NOR_CMD_READ_ID_CODE 0x90
-#define NOR_CMD_READ_QUERY 0x98
-#define NOR_CMD_READ_STATUS_REG 0x70
-#define NOR_CMD_CLEAR_STATUS_REG 0x50
-#define NOR_CMD_WRITE_TO_BUFFER 0xE8
-#define NOR_CMD_WORD_PROGRAM 0x40
-#define NOR_CMD_BLOCK_ERASE 0x20
-#define NOR_CMD_LOCK_UNLOCK 0x60
-#define NOR_CMD_BLOCK_ERASE_ACK 0xD0
-
-/* Second bus cycle */
-#define NOR_LOCK_BLOCK 0x01
-#define NOR_UNLOCK_BLOCK 0xD0
-
-/* Status register bits */
-#define NOR_DWS (1 << 7)
-#define NOR_ESS (1 << 6)
-#define NOR_ES (1 << 5)
-#define NOR_PS (1 << 4)
-#define NOR_VPPS (1 << 3)
-#define NOR_PSS (1 << 2)
-#define NOR_BLS (1 << 1)
-#define NOR_BWS (1 << 0)
-
-/* Set 1 to enable debug messages */
-#define DEBUG_CFI_FLASH 0
-
-#include <stdio.h>
-#if (DEBUG_CFI_FLASH == 1)
- #define CFI_FLASH_LOG_MSG(f_, ...) printf((f_), ##__VA_ARGS__)
-#else
- #define CFI_FLASH_LOG_MSG(f_, ...)
-#endif
-
-enum cfi_error_t {
- CFI_ERR_NONE,
- CFI_ERR_WRONG_ARGUMENT,
- CFI_ERR_NOT_INITIALIZED,
- CFI_ERR_DEV_BUSY,
- CFI_ERR_GENERAL_IO,
- CFI_ERR_DEV_PROTECTED
-};
-
-/**
- * \brief CFI device configuration structure
- */
-struct cfi_dev_cfg_t {
- const uint32_t base; /*!< CFI base address */
-};
-
-/**
- * \brief CFI controller device structure
- */
-struct cfi_dev_t {
- const struct cfi_dev_cfg_t* const cfg;
-};
-
-/* Public API */
-void nor_send_cmd(uintptr_t base_addr, unsigned long cmd);
-void nor_send_cmd_byte(uintptr_t base_addr, unsigned long cmd);
-enum cfi_error_t nor_word_program(uintptr_t base_addr, unsigned long data);
-enum cfi_error_t nor_byte_program(uintptr_t base_addr, uint8_t data);
-enum cfi_error_t nor_lock(uintptr_t base_addr);
-enum cfi_error_t nor_unlock(uintptr_t base_addr);
-enum cfi_error_t nor_erase(uintptr_t base_addr);
-unsigned int nor_id_check(uintptr_t base_addr);
-uint8_t nor_cfi_reg_read(uintptr_t addr);
-void nor_cfi_reg_write(uintptr_t addr, uint32_t value);
-#endif
diff --git a/platform/ext/target/arm/rss/tc/CMakeLists.txt b/platform/ext/target/arm/rss/tc/CMakeLists.txt
index b359ad4..5776ae7 100644
--- a/platform/ext/target/arm/rss/tc/CMakeLists.txt
+++ b/platform/ext/target/arm/rss/tc/CMakeLists.txt
@@ -23,7 +23,7 @@
PRIVATE
cmsis_drivers/Driver_Flash.c
device/host_device_definition.c
- host_drivers/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_drivers/Driver_USART.c>
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011/uart_pl011_drv.c>
@@ -34,8 +34,8 @@
PUBLIC
./cmsis_drivers
./device
- ./host_drivers
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
@@ -46,7 +46,7 @@
PRIVATE
cmsis_drivers/Driver_Flash.c
device/host_device_definition.c
- host_drivers/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_drivers/Driver_USART.c>
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011/uart_pl011_drv.c>
@@ -56,8 +56,8 @@
PUBLIC
./cmsis_drivers
./device
- ./host_drivers
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
@@ -71,7 +71,7 @@
cmsis_drivers/Driver_Flash.c
cmsis_drivers/Driver_Flash.c
device/host_device_definition.c
- host_drivers/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_drivers/Driver_USART.c>
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011/uart_pl011_drv.c>
@@ -81,9 +81,9 @@
PUBLIC
./cmsis_drivers
./device
- ./host_drivers
./bl2
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
@@ -92,7 +92,7 @@
target_sources(platform_bl1_1
PRIVATE
- host_drivers/cfi_drv.c
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi/cfi_drv.c
cmsis_drivers/Driver_Flash.c
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata/spi_strataflashj3_flash_lib.c
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${CMAKE_CURRENT_SOURCE_DIR}/cmsis_drivers/Driver_USART.c>
@@ -105,16 +105,16 @@
INTERFACE
./cmsis_drivers
./device
- ./host_drivers
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)
target_include_directories(platform_bl1_2
PUBLIC
- ./host_drivers
${PLATFORM_DIR}/ext/target/arm/drivers/flash/common
+ ${PLATFORM_DIR}/ext/target/arm/drivers/flash/cfi
${PLATFORM_DIR}/ext/target/arm/drivers/flash/strata
$<$<NOT:$<BOOL:${RSS_DEBUG_UART}>>:${PLATFORM_DIR}/ext/target/arm/drivers/usart/pl011>
)