diff --git a/cmake/install.cmake b/cmake/install.cmake
index cd5e77c..6bbf6ac 100644
--- a/cmake/install.cmake
+++ b/cmake/install.cmake
@@ -1,6 +1,7 @@
 #-------------------------------------------------------------------------------
 # Copyright (c) 2020-2022, Arm Limited. All rights reserved.
-# Copyright (c) 2020, Cypress Semiconductor Corporation. All rights reserved.
+# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+# or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -18,7 +19,7 @@
 set(INSTALL_INTERFACE_LIB_DIR    ${TFM_INSTALL_PATH}/interface/lib)
 
 # export veneer lib
-if (NOT TFM_MULTI_CORE_TOPOLOGY)
+if (TFM_CONFIG_USE_TRUSTZONE)
     install(FILES       ${CMAKE_BINARY_DIR}/secure_fw/s_veneers.o
             DESTINATION ${INSTALL_INTERFACE_LIB_DIR})
 endif()
diff --git a/config/check_config.cmake b/config/check_config.cmake
index bae577b..9f023e4 100644
--- a/config/check_config.cmake
+++ b/config/check_config.cmake
@@ -24,6 +24,7 @@
 set (TFM_L3_PLATFORM_LISTS arm/mps2/an521 arm/musca_b1/sse_200 stm/stm32l562e_dk)
 set (VALID_ISOLATION_LEVELS 1 2 3)
 
+tfm_invalid_config(TFM_LIB_MODEL AND NOT TFM_CONFIG_USE_TRUSTZONE)
 tfm_invalid_config(TFM_LIB_MODEL AND TFM_PSA_API)
 tfm_invalid_config(NOT TFM_LIB_MODEL AND NOT TFM_PSA_API)
 tfm_invalid_config(NOT TFM_ISOLATION_LEVEL IN_LIST VALID_ISOLATION_LEVELS)
diff --git a/config/config_default.cmake b/config/config_default.cmake
index b1a87fc..6d7e097 100755
--- a/config/config_default.cmake
+++ b/config/config_default.cmake
@@ -1,6 +1,7 @@
 #-------------------------------------------------------------------------------
 # Copyright (c) 2020-2022, Arm Limited. All rights reserved.
-# Copyright (c) 2022, Cypress Semiconductor Corporation. All rights reserved.
+# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+# or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -23,6 +24,7 @@
 # TFM_LIB_MODEL is the only user configuration for Library Model selection.
 # TFM_PSA_API becomes an internal variable. Please do NOT use it in build command line.
 set(TFM_LIB_MODEL                       OFF         CACHE BOOL      "Use secure library model instead of PSA API (IPC model)")
+set(TFM_CONFIG_USE_TRUSTZONE            ON          CACHE BOOL      "Enable use of TrustZone to transition between NSPE and SPE")
 set(TFM_ISOLATION_LEVEL                 1           CACHE STRING    "Isolation level")
 set(PSA_FRAMEWORK_HAS_MM_IOVEC          OFF         CACHE BOOL      "Enable MM-IOVEC")
 set(TFM_PROFILE                         ""          CACHE STRING    "Profile to use")
diff --git a/interface/CMakeLists.txt b/interface/CMakeLists.txt
index a38bd9c..b02cc11 100644
--- a/interface/CMakeLists.txt
+++ b/interface/CMakeLists.txt
@@ -48,6 +48,7 @@
         $<$<BOOL:${TFM_PSA_API}>:TFM_PSA_API>
         $<$<BOOL:${CONFIG_TFM_ENABLE_CTX_MGMT}>:CONFIG_TFM_ENABLE_CTX_MGMT>
         $<$<BOOL:${TFM_ISOLATION_LEVEL}>:TFM_LVL=${TFM_ISOLATION_LEVEL}>
+        $<$<BOOL:${TFM_CONFIG_USE_TRUSTZONE}>:TFM_CONFIG_USE_TRUSTZONE>
         $<$<BOOL:${TFM_MULTI_CORE_TOPOLOGY}>:TFM_MULTI_CORE_TOPOLOGY>
         $<$<BOOL:${FORWARD_PROT_MSG}>:FORWARD_PROT_MSG=${FORWARD_PROT_MSG}>
         $<$<BOOL:${CONFIG_TFM_PARTITION_META}>:CONFIG_TFM_PARTITION_META>
diff --git a/lib/ext/CMSIS_5/CMakeLists.txt b/lib/ext/CMSIS_5/CMakeLists.txt
index 9a00b23..54ff2b0 100644
--- a/lib/ext/CMSIS_5/CMakeLists.txt
+++ b/lib/ext/CMSIS_5/CMakeLists.txt
@@ -29,7 +29,7 @@
     set_target_properties(CMSIS_5_RTX_V8MMFN PROPERTIES IMPORTED_LOCATION ${CMSIS_5_PATH}/RTOS2/RTX/Library/IAR/RTX_V8MMFN.a)
     set_target_properties(CMSIS_5_RTX_V8MBN PROPERTIES IMPORTED_LOCATION ${CMSIS_5_PATH}/RTOS2/RTX/Library/IAR/RTX_V8MBN.a)
     set_target_properties(CMSIS_5_RTX_CM3   PROPERTIES IMPORTED_LOCATION ${CMSIS_5_PATH}/RTOS2/RTX/Library/IAR/RTX_CM3.a)
-    if(NOT TFM_MULTI_CORE_TOPOLOGY)
+    if (TFM_CONFIG_USE_TRUSTZONE)
         target_link_libraries(CMSIS_5_RTX_V81MMN
             INTERFACE
                 tfm_s_veneers
@@ -39,7 +39,7 @@
     message(FATAL_ERROR "${CMAKE_C_COMPILER_ID} does not have CMSIS RTX static libraries set up")
 endif()
 
-if(NOT TFM_MULTI_CORE_TOPOLOGY)
+if (TFM_CONFIG_USE_TRUSTZONE)
     target_link_libraries(CMSIS_5_RTX_V8MMN
         INTERFACE
             tfm_s_veneers
diff --git a/platform/ext/common/armclang/tfm_common_s.sct b/platform/ext/common/armclang/tfm_common_s.sct
index e4e566a..2987963 100644
--- a/platform/ext/common/armclang/tfm_common_s.sct
+++ b/platform/ext/common/armclang/tfm_common_s.sct
@@ -1,5 +1,7 @@
 /*
  * Copyright (c) 2017-2022 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -22,7 +24,7 @@
     ER_VECTORS S_CODE_START S_CODE_VECTOR_TABLE_SIZE {
         *.o (RESET +First)
     }
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
     ER_VECTORS_FILL +0 EMPTY (S_CODE_VECTOR_TABLE_SIZE - ImageLength(ER_VECTORS)) {
     }
     /*
diff --git a/platform/ext/common/armclang/tfm_isolation_l3.sct.template b/platform/ext/common/armclang/tfm_isolation_l3.sct.template
index d147d0c..ea45165 100644
--- a/platform/ext/common/armclang/tfm_isolation_l3.sct.template
+++ b/platform/ext/common/armclang/tfm_isolation_l3.sct.template
@@ -1,5 +1,7 @@
 /*
  * Copyright (c) 2017-2022 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -37,7 +39,7 @@
     ER_VECTORS +0 ALIGN 32 S_CODE_VECTOR_TABLE_SIZE {
         *.o (RESET +First)
     }
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
     ER_VECTORS_FILL +0 EMPTY (S_CODE_VECTOR_TABLE_SIZE - ImageLength(ER_VECTORS)) {
     }
 
diff --git a/platform/ext/common/gcc/tfm_common_s.ld b/platform/ext/common/gcc/tfm_common_s.ld
index 4d26ad7..1540ba0 100644
--- a/platform/ext/common/gcc/tfm_common_s.ld
+++ b/platform/ext/common/gcc/tfm_common_s.ld
@@ -1,5 +1,7 @@
 ;/*
 ; * Copyright (c) 2009-2022 Arm Limited
+; * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+; * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
 ; *
 ; * Licensed under the Apache License, Version 2.0 (the "License");
 ; * you may not use this file except in compliance with the License.
@@ -55,7 +57,7 @@
         __vectors_end__ = .;
     } > FLASH
 
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
     ASSERT(. <= ADDR(.TFM_VECTORS) + S_CODE_VECTOR_TABLE_SIZE, ".TFM_VECTORS section size overflow.")
     . = ADDR(.TFM_VECTORS) + S_CODE_VECTOR_TABLE_SIZE;
     /*
diff --git a/platform/ext/common/gcc/tfm_isolation_l3.ld.template b/platform/ext/common/gcc/tfm_isolation_l3.ld.template
index 6c15057..7ab806d 100644
--- a/platform/ext/common/gcc/tfm_isolation_l3.ld.template
+++ b/platform/ext/common/gcc/tfm_isolation_l3.ld.template
@@ -1,5 +1,7 @@
 ;/*
 ; * Copyright (c) 2009-2022 Arm Limited
+; * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+; * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
 ; *
 ; * Licensed under the Apache License, Version 2.0 (the "License");
 ; * you may not use this file except in compliance with the License.
@@ -53,7 +55,7 @@
         . = ALIGN(4);
     } > FLASH
 
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
     ASSERT(. <= ADDR(.TFM_VECTORS) + S_CODE_VECTOR_TABLE_SIZE, ".TFM_VECTORS section size overflow.")
     . = ADDR(.TFM_VECTORS) + S_CODE_VECTOR_TABLE_SIZE;
     /*
diff --git a/platform/ext/common/iar/tfm_common_s.icf b/platform/ext/common/iar/tfm_common_s.icf
index 1988e06..9e4dc1a 100644
--- a/platform/ext/common/iar/tfm_common_s.icf
+++ b/platform/ext/common/iar/tfm_common_s.icf
@@ -1,6 +1,8 @@
 /*
  * Copyright (c) 2017-2022 Arm Limited. All rights reserved.
  * Copyright (c) 2020-2021 IAR Systems AB
+ * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -23,7 +25,7 @@
        readonly section .intvec
 };
 
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
     /*
      * Place the CMSE Veneers (containing the SG instruction) in a separate
      * 32 bytes aligned region so that the SAU can be programmed to
@@ -244,7 +246,7 @@
 
 define block LR_CODE with fixed order, maximum size = S_CODE_SIZE {
        block ER_VECTORS,
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
        block ER_VENEER,
        block VENEER_ALIGN,
 #endif
diff --git a/platform/ext/common/iar/tfm_isolation_l3.icf.template b/platform/ext/common/iar/tfm_isolation_l3.icf.template
index ed69e5f..20fdd99 100644
--- a/platform/ext/common/iar/tfm_isolation_l3.icf.template
+++ b/platform/ext/common/iar/tfm_isolation_l3.icf.template
@@ -1,5 +1,7 @@
 /*
  * Copyright (c) 2017-2022 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -35,7 +37,7 @@
        readonly section .intvec
 };
 
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
     /*
      * Place the CMSE Veneers (containing the SG instruction) in a separate
      * 32 bytes aligned region so that the SAU can be programmed to
@@ -210,7 +212,7 @@
 /* Define Flash content */
 define block LR_CODE with fixed order {
     block ER_VECTORS,
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
     block ER_VENEER,
     block VENEER_ALIGN,
 #endif
diff --git a/platform/ext/target/arm/corstone1000/config.cmake b/platform/ext/target/arm/corstone1000/config.cmake
index 756d1ac..8294251 100644
--- a/platform/ext/target/arm/corstone1000/config.cmake
+++ b/platform/ext/target/arm/corstone1000/config.cmake
@@ -1,5 +1,7 @@
 #-------------------------------------------------------------------------------
 # Copyright (c) 2020-2022, Arm Limited. All rights reserved.
+# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+# or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -22,6 +24,7 @@
   set(TFM_ISOLATION_LEVEL                 2          CACHE STRING   "Isolation level")
 endif()
 
+set(TFM_CONFIG_USE_TRUSTZONE            OFF        CACHE BOOL     "Enable use of TrustZone to transition between NSPE and SPE")
 set(TFM_MULTI_CORE_TOPOLOGY             ON         CACHE BOOL     "Whether to build for a dual-cpu architecture")
 set(TFM_PLAT_SPECIFIC_MULTI_CORE_COMM   ON         CACHE BOOL     "Whether to use a platform specific inter core communication instead of mailbox in dual-cpu topology")
 set(CRYPTO_HW_ACCELERATOR               ON         CACHE BOOL     "Whether to enable the crypto hardware accelerator on supported platforms")
diff --git a/platform/ext/target/arm/musca_b1/secure_enclave/config.cmake b/platform/ext/target/arm/musca_b1/secure_enclave/config.cmake
index 14a5d4b..c563742 100644
--- a/platform/ext/target/arm/musca_b1/secure_enclave/config.cmake
+++ b/platform/ext/target/arm/musca_b1/secure_enclave/config.cmake
@@ -1,5 +1,7 @@
 #-------------------------------------------------------------------------------
 # Copyright (c) 2020-2021, Arm Limited. All rights reserved.
+# Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+# or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -7,6 +9,7 @@
 set(BL2_TRAILER_SIZE                    0x800        CACHE STRING    "Trailer size")
 
 # Configuration values forced due to the Secure Enclave topology
+set(TFM_CONFIG_USE_TRUSTZONE            OFF          CACHE BOOL      "Enable use of TrustZone to transition between NSPE and SPE")
 set(TFM_MULTI_CORE_TOPOLOGY             ON           CACHE BOOL      "Whether to build for a dual-cpu architecture" FORCE)
 set(NS                                  FALSE        CACHE BOOL      "Whether to build NS app" FORCE)
 set(TEST_NS                             OFF          CACHE BOOL      "Whether to build NS regression tests" FORCE)
diff --git a/platform/ext/target/cypress/psoc64/config.cmake b/platform/ext/target/cypress/psoc64/config.cmake
index 3279916..7061060 100644
--- a/platform/ext/target/cypress/psoc64/config.cmake
+++ b/platform/ext/target/cypress/psoc64/config.cmake
@@ -1,6 +1,8 @@
 #-------------------------------------------------------------------------------
 # Copyright (c) 2020-2021, Arm Limited. All rights reserved.
-# Copyright (c) 2021-2022, Cypress Semiconductor Corporation. All rights reserved.
+# Copyright (c) 2021-2022 Cypress Semiconductor Corporation (an Infineon
+# company) or an affiliate of Cypress Semiconductor Corporation. All rights
+# reserved.
 # SPDX-License-Identifier: BSD-3-Clause
 #
 #-------------------------------------------------------------------------------
@@ -13,6 +15,7 @@
 
 add_definitions(-DCYB0644ABZI_S2D44)
 
+set(TFM_CONFIG_USE_TRUSTZONE            OFF         CACHE BOOL      "Enable use of TrustZone to transition between NSPE and SPE")
 set(TFM_MULTI_CORE_TOPOLOGY             ON          CACHE BOOL      "Whether to build for a dual-cpu architecture")
 set(NUM_MAILBOX_QUEUE_SLOT              4           CACHE BOOL      "Number of mailbox queue slots")
 set(PLATFORM_SLIH_IRQ_TEST_SUPPORT      ON          CACHE BOOL      "Platform supports SLIH IRQ tests")
diff --git a/platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld b/platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld
index e4c4de3..a6de8c3 100644
--- a/platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld
+++ b/platform/ext/target/nordic_nrf/common/core/gcc/nordic_nrf_s.ld
@@ -1,6 +1,8 @@
 ;/*
 ; * Copyright (c) 2009-2022 Arm Limited
 ; * Copyright (c) 2020 Nordic Semiconductor ASA
+; * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+; * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
 ; *
 ; * Licensed under the Apache License, Version 2.0 (the "License");
 ; * you may not use this file except in compliance with the License.
diff --git a/platform/ext/target/nuvoton/m2351/device/source/armclang/m2351_s.sct b/platform/ext/target/nuvoton/m2351/device/source/armclang/m2351_s.sct
index 864634f..302bc46 100644
--- a/platform/ext/target/nuvoton/m2351/device/source/armclang/m2351_s.sct
+++ b/platform/ext/target/nuvoton/m2351/device/source/armclang/m2351_s.sct
@@ -1,5 +1,7 @@
 /*
  * Copyright (c) 2017-2022 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
diff --git a/platform/ext/target/nuvoton/m2354/device/source/armclang/m2354_s.sct b/platform/ext/target/nuvoton/m2354/device/source/armclang/m2354_s.sct
index 6216ff4..62d281a 100644
--- a/platform/ext/target/nuvoton/m2354/device/source/armclang/m2354_s.sct
+++ b/platform/ext/target/nuvoton/m2354/device/source/armclang/m2354_s.sct
@@ -1,5 +1,7 @@
 /*
  * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
diff --git a/secure_fw/CMakeLists.txt b/secure_fw/CMakeLists.txt
index c039929..8aff0d5 100644
--- a/secure_fw/CMakeLists.txt
+++ b/secure_fw/CMakeLists.txt
@@ -1,6 +1,8 @@
 #-------------------------------------------------------------------------------
 # Copyright (c) 2020-2022, Arm Limited. All rights reserved.
-# Copyright (c) 2021, Cypress Semiconductor Corporation. All rights reserved.
+# Copyright (c) 2021-2022 Cypress Semiconductor Corporation (an Infineon
+# company) or an affiliate of Cypress Semiconductor Corporation. All rights
+# reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -97,7 +99,7 @@
 
 ############################# Secure veneers ###################################
 
-if(NOT (TFM_PSA_API AND TFM_MULTI_CORE_TOPOLOGY))
+if(TFM_CONFIG_USE_TRUSTZONE)
     add_library(tfm_s_veneers STATIC)
 
     target_sources(tfm_s_veneers
diff --git a/secure_fw/partitions/ns_agent_tz/CMakeLists.txt b/secure_fw/partitions/ns_agent_tz/CMakeLists.txt
index 31d0a18..3813a6a 100644
--- a/secure_fw/partitions/ns_agent_tz/CMakeLists.txt
+++ b/secure_fw/partitions/ns_agent_tz/CMakeLists.txt
@@ -7,7 +7,7 @@
 #
 #-------------------------------------------------------------------------------
 
-if (TFM_MULTI_CORE_TOPOLOGY)
+if (NOT TFM_CONFIG_USE_TRUSTZONE)
     return()
 endif()
 
diff --git a/secure_fw/spm/CMakeLists.txt b/secure_fw/spm/CMakeLists.txt
index d88fb63..78e437a 100755
--- a/secure_fw/spm/CMakeLists.txt
+++ b/secure_fw/spm/CMakeLists.txt
@@ -1,6 +1,8 @@
 #-------------------------------------------------------------------------------
 # Copyright (c) 2020-2022, Arm Limited. All rights reserved.
-# Copyright (c) 2021-2022, Cypress Semiconductor Corporation. All rights reserved.
+# Copyright (c) 2021-2022 Cypress Semiconductor Corporation (an Infineon
+# company) or an affiliate of Cypress Semiconductor Corporation. All rights
+# reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -156,7 +158,7 @@
 
 ############################# Secure veneers ###################################
 
-if(NOT TFM_MULTI_CORE_TOPOLOGY)
+if(TFM_CONFIG_USE_TRUSTZONE)
     # If this is added to the spm, it is discarded as it is not used. Since the
     # spm is a static library it can't generate veneers under all compilers so
     # instead this single file is added to the tfm_s target.
diff --git a/secure_fw/spm/include/tfm_nspm.h b/secure_fw/spm/include/tfm_nspm.h
index 7906f80..fe1069d 100644
--- a/secure_fw/spm/include/tfm_nspm.h
+++ b/secure_fw/spm/include/tfm_nspm.h
@@ -1,5 +1,7 @@
 /*
  * Copyright (c) 2018-2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  *
@@ -12,7 +14,7 @@
 
 #define TFM_NS_CLIENT_INVALID_ID            ((int32_t)0)
 
-#if !defined(TFM_MULTI_CORE_TOPOLOGY)
+#ifdef TFM_CONFIG_USE_TRUSTZONE
 /*
  * The macro cmse_nsfptr_create defined in the gcc library uses the non-standard
  * gcc C lanuage extension 'typeof'. TF-M is built with '-std=c99' so typeof
@@ -38,7 +40,7 @@
 #define __tfm_nspm_secure_gateway_attributes__ \
         __attribute__((cmse_nonsecure_entry))
 #endif /* !__ARMCC_VERSION */
-#endif /* __GNUC__ && !TFM_MULTI_CORE_TOPOLOGY */
+#endif /* TFM_CONFIG_USE_TRUSTZONE */
 
 /**
  * \brief initialise the NS context database
diff --git a/secure_fw/spm/include/tfm_secure_api.h b/secure_fw/spm/include/tfm_secure_api.h
index 36d1be0..4b5e453 100644
--- a/secure_fw/spm/include/tfm_secure_api.h
+++ b/secure_fw/spm/include/tfm_secure_api.h
@@ -10,7 +10,7 @@
 #ifndef __TFM_SECURE_API_H__
 #define __TFM_SECURE_API_H__
 
-#ifndef TFM_MULTI_CORE_TOPOLOGY
+#ifdef TFM_CONFIG_USE_TRUSTZONE
 #include <arm_cmse.h>
 #endif
 #include "tfm_arch.h"