Build: Remove encoding width suffix from Arm bignum assembly
Older armclang compilers (6.13, 6.14, ...) fails to compile mbedtls,
with DSP enabled.
For more info about this patch, check:
https://github.com/Mbed-TLS/mbedtls/pull/6090/commits/907a367b5035ab120095c325b48fdf90b04a5081
Signed-off-by: Dávid Házi <david.hazi@arm.com>
Change-Id: I433014867e6239a7a1493a44f41a39a9089d25cc
diff --git a/lib/ext/mbedcrypto/0001-BUILD-Update-IAR-support-in-CMakeLists.txt.patch b/lib/ext/mbedcrypto/0001-BUILD-Update-IAR-support-in-CMakeLists.txt.patch
index b411fc1..674ab56 100644
--- a/lib/ext/mbedcrypto/0001-BUILD-Update-IAR-support-in-CMakeLists.txt.patch
+++ b/lib/ext/mbedcrypto/0001-BUILD-Update-IAR-support-in-CMakeLists.txt.patch
@@ -1,7 +1,7 @@
From c0e88bba61a814023032be4f1fabe8aff3deb00c Mon Sep 17 00:00:00 2001
From: TTornblom <thomas.tornblom@iar.com>
Date: Thu, 16 Apr 2020 13:53:38 +0200
-Subject: [PATCH 1/5] BUILD: Update IAR support in CMakeLists.txt
+Subject: [PATCH 1/6] BUILD: Update IAR support in CMakeLists.txt
Applied the same change as in mbed-crypto for using this as a sub
project with the IAR toolchain.
diff --git a/lib/ext/mbedcrypto/0002-Enable-crypto-code-sharing-between-independent-binar.patch b/lib/ext/mbedcrypto/0002-Enable-crypto-code-sharing-between-independent-binar.patch
index 59c9eee..f965215 100644
--- a/lib/ext/mbedcrypto/0002-Enable-crypto-code-sharing-between-independent-binar.patch
+++ b/lib/ext/mbedcrypto/0002-Enable-crypto-code-sharing-between-independent-binar.patch
@@ -1,7 +1,7 @@
From 1d8011d0dbd174ffcda57f9977bca8fdccf5aea0 Mon Sep 17 00:00:00 2001
From: Tamas Ban <tamas.ban@arm.com>
Date: Tue, 27 Oct 2020 08:55:37 +0000
-Subject: [PATCH 2/5] Enable crypto code sharing between independent binaries
+Subject: [PATCH 2/6] Enable crypto code sharing between independent binaries
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
---
diff --git a/lib/ext/mbedcrypto/0003-Add-MBEDTLS_CHACHA20_C-and-MBEDTLS_POLY1305_C.patch b/lib/ext/mbedcrypto/0003-Add-MBEDTLS_CHACHA20_C-and-MBEDTLS_POLY1305_C.patch
index 5be9fca..98b0421 100644
--- a/lib/ext/mbedcrypto/0003-Add-MBEDTLS_CHACHA20_C-and-MBEDTLS_POLY1305_C.patch
+++ b/lib/ext/mbedcrypto/0003-Add-MBEDTLS_CHACHA20_C-and-MBEDTLS_POLY1305_C.patch
@@ -1,7 +1,7 @@
From 281356afac7b6217a65c87dde490d1b24f625d65 Mon Sep 17 00:00:00 2001
From: Summer Qin <summer.qin@arm.com>
Date: Thu, 30 Jun 2022 14:14:11 +0800
-Subject: [PATCH 3/5] Add MBEDTLS_CHACHA20_C and MBEDTLS_POLY1305_C
+Subject: [PATCH 3/6] Add MBEDTLS_CHACHA20_C and MBEDTLS_POLY1305_C
MBEDTLS_CHACHA20_C and MBEDTLS_POLY1305_C are needed when
PSA_WANT_ALG_CHACHA20_POLY1305 is defined.
diff --git a/lib/ext/mbedcrypto/0005-Add-LMS-implementation.patch b/lib/ext/mbedcrypto/0005-Add-LMS-implementation.patch
index acd7f6d..0ce185f 100644
--- a/lib/ext/mbedcrypto/0005-Add-LMS-implementation.patch
+++ b/lib/ext/mbedcrypto/0005-Add-LMS-implementation.patch
@@ -1,7 +1,7 @@
From 37bad45c56543a289be7854a8723d9b29c0b8cb2 Mon Sep 17 00:00:00 2001
From: Raef Coles <raef.coles@arm.com>
Date: Wed, 21 Jul 2021 12:42:15 +0100
-Subject: [PATCH 5/5] Add LMS implementation
+Subject: [PATCH 5/6] Add LMS implementation
Also an LM-OTS implementation as one is required for LMS.
diff --git a/lib/ext/mbedcrypto/0006-Build-Remove-encoding-width-suffix-from-Arm-bignum.patch b/lib/ext/mbedcrypto/0006-Build-Remove-encoding-width-suffix-from-Arm-bignum.patch
new file mode 100644
index 0000000..3c366df
--- /dev/null
+++ b/lib/ext/mbedcrypto/0006-Build-Remove-encoding-width-suffix-from-Arm-bignum.patch
@@ -0,0 +1,52 @@
+From 1698af1aa6a8cbf4ca59dd5dbd756418e58273d5 Mon Sep 17 00:00:00 2001
+From: Dávid Házi <david.hazi@arm.com>
+Date: Tue, 2 Aug 2022 14:38:32 +0200
+Subject: [PATCH 6/6] Build: Remove encoding width suffix from Arm bignum assembly
+
+Signed-off-by: Dávid Házi <david.hazi@arm.com>
+---
+ library/bn_mul.h | 18 +++++++++---------
+ 1 file changed, 9 insertions(+), 9 deletions(-)
+
+diff --git a/library/bn_mul.h b/library/bn_mul.h
+index 962d7a97..9cc84d06 100644
+--- a/library/bn_mul.h
++++ b/library/bn_mul.h
+@@ -717,10 +717,10 @@
+
+ #define MULADDC_X1_CORE \
+ ".p2align 2 \n\t" \
+- "ldr.w %[a], [%[in]], #4 \n\t" \
+- "ldr.w %[b], [%[acc]] \n\t" \
++ "ldr %[a], [%[in]], #4 \n\t" \
++ "ldr %[b], [%[acc]] \n\t" \
+ "umaal %[b], %[carry], %[scalar], %[a] \n\t" \
+- "str.w %[b], [%[acc]], #4 \n\t"
++ "str %[b], [%[acc]], #4 \n\t"
+
+ #define MULADDC_X1_STOP \
+ : [a] "=&r" (tmp_a), \
+@@ -751,14 +751,14 @@
+ * 2 cycles, while subsequent loads/stores are single-cycle. */
+ #define MULADDC_X2_CORE \
+ ".p2align 2 \n\t" \
+- "ldr.w %[a0], [%[in]], #+8 \n\t" \
+- "ldr.w %[b0], [%[acc]], #+8 \n\t" \
+- "ldr.w %[a1], [%[in], #-4] \n\t" \
+- "ldr.w %[b1], [%[acc], #-4] \n\t" \
++ "ldr %[a0], [%[in]], #+8 \n\t" \
++ "ldr %[b0], [%[acc]], #+8 \n\t" \
++ "ldr %[a1], [%[in], #-4] \n\t" \
++ "ldr %[b1], [%[acc], #-4] \n\t" \
+ "umaal %[b0], %[carry], %[scalar], %[a0] \n\t" \
+ "umaal %[b1], %[carry], %[scalar], %[a1] \n\t" \
+- "str.w %[b0], [%[acc], #-8] \n\t" \
+- "str.w %[b1], [%[acc], #-4] \n\t"
++ "str %[b0], [%[acc], #-8] \n\t" \
++ "str %[b1], [%[acc], #-4] \n\t"
+
+ #define MULADDC_X2_STOP \
+ : [a0] "=&r" (tmp_a0), \
+--
+2.34.1
+