BL1: Add boot_platform_pre/post_init
Change-Id: Ib4e2364edf523946446e754d49833fb91406a6e6
Signed-off-by: Raef Coles <raef.coles@arm.com>
diff --git a/bl1/bl1_1/main.c b/bl1/bl1_1/main.c
index 4238a42..f2cf4b8 100644
--- a/bl1/bl1_1/main.c
+++ b/bl1/bl1_1/main.c
@@ -22,7 +22,7 @@
fih_int fih_rc = FIH_FAILURE;
FIH_CALL(bl1_sha256_compute, fih_rc, image, BL1_2_CODE_SIZE,
- computed_bl1_2_hash);
+ computed_bl1_2_hash);
if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
FIH_RET(FIH_FAILURE);
}
@@ -71,6 +71,11 @@
run_bl1_1_testsuite();
#endif /* TEST_BL1_1 */
+ fih_rc = fih_int_encode_zero_equality(boot_platform_pre_load(0));
+ if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
+ FIH_PANIC;
+ }
+
/* Copy BL1_2 from OTP into SRAM*/
FIH_CALL(bl1_read_bl1_2_image, fih_rc, (uint8_t *)BL1_2_CODE_START);
if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
@@ -83,6 +88,11 @@
FIH_PANIC;
}
+ fih_rc = fih_int_encode_zero_equality(boot_platform_post_load(0));
+ if (fih_not_eq(fih_rc, FIH_SUCCESS)) {
+ FIH_PANIC;
+ }
+
BL1_LOG("[INF] Jumping to BL1_2\r\n");
/* Jump to BL1_2 */
boot_platform_quit((struct boot_arm_vector_table *)BL1_2_CODE_START);
diff --git a/platform/ext/common/boot_hal_bl1.c b/platform/ext/common/boot_hal_bl1.c
index a627a47..e47b631 100644
--- a/platform/ext/common/boot_hal_bl1.c
+++ b/platform/ext/common/boot_hal_bl1.c
@@ -218,6 +218,16 @@
boot_jump_to_next_image(vt_cpy->reset);
}
+__WEAK int boot_platform_pre_load(uint32_t image_id)
+{
+ return 0;
+}
+
+__WEAK int boot_platform_post_load(uint32_t image_id)
+{
+ return 0;
+}
+
#ifdef MEASURED_BOOT_API
static int boot_add_data_to_shared_area(uint8_t major_type,
uint16_t minor_type,