Platform: Update Diphda BL1 cmake
To be more easily extensible, and avoid potential compilation issues
with the use of the BL1 flag.
Change-Id: I02aae694637ff25acee19b8652147e9195f18111
Signed-off-by: Raef Coles <raef.coles@arm.com>
diff --git a/platform/CMakeLists.txt b/platform/CMakeLists.txt
index 7bc845b..1db3208 100755
--- a/platform/CMakeLists.txt
+++ b/platform/CMakeLists.txt
@@ -160,6 +160,7 @@
#TODO maybe just link the other platforms to this
target_compile_definitions(platform_region_defs
INTERFACE
+ $<$<BOOL:${BL1}>:BL1>
$<$<BOOL:${BL2}>:BL2>
$<$<BOOL:${SECURE_UART1}>:SECURE_UART1>
DAUTH_${DEBUG_AUTHENTICATION}
diff --git a/platform/ext/accelerator/cc312/CMakeLists.txt b/platform/ext/accelerator/cc312/CMakeLists.txt
index 2f4ac95..cdaf004 100644
--- a/platform/ext/accelerator/cc312/CMakeLists.txt
+++ b/platform/ext/accelerator/cc312/CMakeLists.txt
@@ -35,6 +35,7 @@
endif()
################################ BL2 ###########################################
+
if(BL2)
target_sources(bl2_crypto_hw
PRIVATE
@@ -70,8 +71,9 @@
target_link_libraries(bl2_cc312
PRIVATE
bl2_mbedcrypto
- PUBLIC
platform_bl2
+ PUBLIC
+ platform_common_interface
)
target_link_libraries(bl2_mbedcrypto
PRIVATE
diff --git a/platform/ext/target/arm/diphda/CMakeLists.txt b/platform/ext/target/arm/diphda/CMakeLists.txt
index 9d39cc9..fea0e23 100644
--- a/platform/ext/target/arm/diphda/CMakeLists.txt
+++ b/platform/ext/target/arm/diphda/CMakeLists.txt
@@ -85,7 +85,6 @@
Native_Driver/xilinx_pg153_axi_qspi_controller_drv.c
Native_Driver/spi_n25q256a_flash_lib.c
bl2_boot_hal.c
- bl2_security_cnt.c
)
target_sources(bl2
diff --git a/platform/ext/target/arm/diphda/bl1/CMakeLists.txt b/platform/ext/target/arm/diphda/bl1/CMakeLists.txt
index eb531f9..787f571 100644
--- a/platform/ext/target/arm/diphda/bl1/CMakeLists.txt
+++ b/platform/ext/target/arm/diphda/bl1/CMakeLists.txt
@@ -104,6 +104,7 @@
PRIVATE
MCUBOOT_IMAGE_NUMBER=${BL1_IMAGE_NUMBER}
BL1
+ BL2
)
# Configurations based on bl2/CMakeLists.txt
@@ -114,6 +115,7 @@
target_sources(bl1_main
PRIVATE
${BL2_SOURCE}/src/flash_map.c
+ ${BL2_SOURCE}/src/provisioning.c
)
target_include_directories(bl1_main
@@ -143,7 +145,6 @@
PRIVATE
${BL2_SOURCE}/ext/mcuboot/bl2_main.c
${BL2_SOURCE}/ext/mcuboot/keys.c
- ${BL2_SOURCE}/ext/mcuboot/flash_map_extended.c
${BL2_SOURCE}/ext/mcuboot/flash_map_legacy.c
)
@@ -189,6 +190,8 @@
${CMAKE_SOURCE_DIR}/platform/ext/common/boot_hal.c
$<$<BOOL:${PLATFORM_DEFAULT_UART_STDOUT}>:${CMAKE_SOURCE_DIR}/platform/ext/common/uart_stdout.c>
$<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:${CMAKE_SOURCE_DIR}/platform/ext/common/template/nv_counters.c>
+ $<$<OR:$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>,$<BOOL:${PLATFORM_DEFAULT_OTP}>>:${CMAKE_SOURCE_DIR}/platform/ext/common/template/flash_otp_nv_counters_backend.c>
+ $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:${CMAKE_SOURCE_DIR}/platform/ext/common/template/otp_flash.c>
)
target_link_libraries(bl1_main
@@ -201,8 +204,13 @@
PRIVATE
MCUBOOT_${MCUBOOT_UPGRADE_STRATEGY}
$<$<BOOL:${SYMMETRIC_INITIAL_ATTESTATION}>:SYMMETRIC_INITIAL_ATTESTATION>
+ $<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:PLATFORM_DEFAULT_NV_COUNTERS>
$<$<BOOL:${MCUBOOT_HW_KEY}>:MCUBOOT_HW_KEY>
MCUBOOT_FIH_PROFILE_${MCUBOOT_FIH_PROFILE}
+ $<$<BOOL:${PLATFORM_DEFAULT_NV_COUNTERS}>:PLATFORM_DEFAULT_NV_COUNTERS>
+ $<$<BOOL:${PLATFORM_DEFAULT_OTP}>:PLATFORM_DEFAULT_OTP>
+ $<$<BOOL:${OTP_NV_COUNTERS_RAM_EMULATION}>:OTP_NV_COUNTERS_RAM_EMULATION>
+ $<$<BOOL:${TFM_DUMMY_PROVISIONING}>:TFM_DUMMY_PROVISIONING>
)
# Configurations based on cc312 cmake files
@@ -233,6 +241,8 @@
bl1_boot_hal.c
bl1_flash_map.c
bl1_security_cnt.c
+ flash_map_extended.c
+ bl1_rotpk.c
)
target_include_directories(bl1_main
@@ -249,8 +259,8 @@
find_package(Python3)
-set(FLASH_AREA_NUM 0)
-configure_file(${BL2_SOURCE}/ext/mcuboot/signing_layout.c.in ${CMAKE_CURRENT_BINARY_DIR}/signing_layout.c @ONLY)
+set(FLASH_AREA_NUM 8)
+configure_file(signing_layout.c.in ${CMAKE_CURRENT_BINARY_DIR}/signing_layout.c @ONLY)
add_library(signing_layout_for_bl2 OBJECT ${CMAKE_CURRENT_BINARY_DIR}/signing_layout.c)
target_compile_options(signing_layout_for_bl2
diff --git a/platform/ext/target/arm/diphda/bl1/bl1_flash_map.c b/platform/ext/target/arm/diphda/bl1/bl1_flash_map.c
index 4caf2be..fbb8294 100644
--- a/platform/ext/target/arm/diphda/bl1/bl1_flash_map.c
+++ b/platform/ext/target/arm/diphda/bl1/bl1_flash_map.c
@@ -19,18 +19,18 @@
const struct flash_area flash_map[] = {
{
- .fa_id = FLASH_AREA_0_ID,
+ .fa_id = FLASH_AREA_8_ID,
.fa_device_id = FLASH_DEVICE_ID,
.fa_driver = &FLASH_DEV_NAME,
- .fa_off = FLASH_AREA_0_OFFSET,
- .fa_size = FLASH_AREA_0_SIZE,
+ .fa_off = FLASH_AREA_8_OFFSET,
+ .fa_size = FLASH_AREA_8_SIZE,
},
{
- .fa_id = FLASH_AREA_1_ID,
+ .fa_id = FLASH_AREA_9_ID,
.fa_device_id = FLASH_DEVICE_ID,
.fa_driver = &FLASH_DEV_NAME,
- .fa_off = FLASH_AREA_1_OFFSET,
- .fa_size = FLASH_AREA_1_SIZE,
+ .fa_off = FLASH_AREA_9_OFFSET,
+ .fa_size = FLASH_AREA_9_SIZE,
},
};
diff --git a/platform/ext/target/arm/diphda/bl1/bl1_rotpk.c b/platform/ext/target/arm/diphda/bl1/bl1_rotpk.c
new file mode 100644
index 0000000..d8cfe37
--- /dev/null
+++ b/platform/ext/target/arm/diphda/bl1/bl1_rotpk.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include <stdint.h>
+#include "tfm_plat_otp.h"
+
+static enum tfm_plat_err_t get_rotpk_hash(enum tfm_otp_element_id_t id,
+ uint8_t* rotpk_hash,
+ uint32_t* rotpk_hash_size)
+{
+ enum tfm_plat_err_t err;
+ size_t otp_size;
+
+ err = tfm_plat_otp_read(id, *rotpk_hash_size, rotpk_hash);
+ if (err != TFM_PLAT_ERR_SUCCESS) {
+ return err;
+ }
+
+ err = tfm_plat_otp_get_size(id, &otp_size);
+ if (err != TFM_PLAT_ERR_SUCCESS) {
+ return err;
+ }
+
+ *rotpk_hash_size = otp_size;
+
+ return TFM_PLAT_ERR_SUCCESS;
+}
+
+enum tfm_plat_err_t
+tfm_plat_get_rotpk_hash(uint8_t image_id,
+ uint8_t *rotpk_hash,
+ uint32_t *rotpk_hash_size)
+{
+ switch(image_id) {
+ case 0:
+ return get_rotpk_hash(PLAT_OTP_ID_BL1_ROTPK_0, rotpk_hash,
+ rotpk_hash_size);
+
+ default:
+ return TFM_PLAT_ERR_INVALID_INPUT;
+ }
+
+ return TFM_PLAT_ERR_SYSTEM_ERR;
+}
diff --git a/platform/ext/target/arm/diphda/bl1/bl1_security_cnt.c b/platform/ext/target/arm/diphda/bl1/bl1_security_cnt.c
index 84040f0..f275cbf 100644
--- a/platform/ext/target/arm/diphda/bl1/bl1_security_cnt.c
+++ b/platform/ext/target/arm/diphda/bl1/bl1_security_cnt.c
@@ -11,9 +11,6 @@
#include "bootutil/fault_injection_hardening.h"
#include <stdint.h>
-/* BL1 only loads 1 image. First 3 counters are used by PS service */
-#define TFM_BOOT_NV_COUNTER (3)
-
fih_int boot_nv_security_counter_init(void)
{
fih_int fih_rc = FIH_FAILURE;
@@ -38,7 +35,7 @@
}
fih_rc = fih_int_encode_zero_equality(
- tfm_plat_read_nv_counter(TFM_BOOT_NV_COUNTER,
+ tfm_plat_read_nv_counter(PLAT_NV_COUNTER_BL1_0,
sizeof(security_cnt_soft),
(uint8_t *)&security_cnt_soft));
*security_cnt = fih_int_encode(security_cnt_soft);
@@ -55,7 +52,7 @@
return -1;
}
- err = tfm_plat_set_nv_counter(TFM_BOOT_NV_COUNTER, img_security_cnt);
+ err = tfm_plat_set_nv_counter(PLAT_NV_COUNTER_BL1_0, img_security_cnt);
if (err != TFM_PLAT_ERR_SUCCESS) {
return -1;
}
diff --git a/platform/ext/target/arm/diphda/bl1/flash_map_extended.c b/platform/ext/target/arm/diphda/bl1/flash_map_extended.c
new file mode 100644
index 0000000..b6632b6
--- /dev/null
+++ b/platform/ext/target/arm/diphda/bl1/flash_map_extended.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2018 Nordic Semiconductor ASA
+ * Copyright (c) 2015 Runtime Inc
+ * Copyright (c) 2019-2021 Arm Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * Original code taken from mcuboot project at:
+ * https://github.com/mcu-tools/mcuboot
+ * Git SHA of the original version: ac55554059147fff718015be9f4bd3108123f50a
+ */
+
+#include <errno.h>
+#include "target.h"
+#include "cmsis.h"
+#include "Driver_Flash.h"
+#include "sysflash/sysflash.h"
+#include "flash_map/flash_map.h"
+#include "flash_map_backend/flash_map_backend.h"
+#include "bootutil/bootutil_log.h"
+
+__WEAK int flash_device_base(uint8_t fd_id, uintptr_t *ret)
+{
+ if (fd_id != FLASH_DEVICE_ID) {
+ BOOT_LOG_ERR("invalid flash ID %d; expected %d",
+ fd_id, FLASH_DEVICE_ID);
+ return -1;
+ }
+ *ret = FLASH_DEVICE_BASE;
+ return 0;
+}
+
+/*
+ * This depends on the mappings defined in flash_map.h.
+ * MCUBoot uses continuous numbering for the primary slot, the secondary slot,
+ * and the scratch while TF-M might number it differently.
+ */
+int flash_area_id_from_multi_image_slot(int image_index, int slot)
+{
+ switch (slot) {
+ case 0: return BL1_FLASH_AREA_IMAGE_PRIMARY(image_index);
+ case 1: return BL1_FLASH_AREA_IMAGE_SECONDARY(image_index);
+ case 2: return BL1_FLASH_AREA_IMAGE_SCRATCH;
+ }
+
+ return -1; /* flash_area_open will fail on that */
+}
+
+int flash_area_id_from_image_slot(int slot)
+{
+ return flash_area_id_from_multi_image_slot(0, slot);
+}
+
+int flash_area_id_to_multi_image_slot(int image_index, int area_id)
+{
+ if (area_id == BL1_FLASH_AREA_IMAGE_PRIMARY(image_index)) {
+ return 0;
+ }
+ if (area_id == BL1_FLASH_AREA_IMAGE_SECONDARY(image_index)) {
+ return 1;
+ }
+
+ BOOT_LOG_ERR("invalid flash area ID");
+ return -1;
+}
+
+int flash_area_id_to_image_slot(int area_id)
+{
+ return flash_area_id_to_multi_image_slot(0, area_id);
+}
+
+uint8_t flash_area_erased_val(const struct flash_area *fap)
+{
+ return DRV_FLASH_AREA(fap)->GetInfo()->erased_value;
+}
+
+int flash_area_read_is_empty(const struct flash_area *fa, uint32_t off,
+ void *dst, uint32_t len)
+{
+ uint32_t i;
+ uint8_t *u8dst;
+ int rc;
+
+ BOOT_LOG_DBG("read_is_empty area=%d, off=%#x, len=%#x",
+ fa->fa_id, off, len);
+
+ rc = DRV_FLASH_AREA(fa)->ReadData(fa->fa_off + off, dst, len);
+ if (rc) {
+ return -1;
+ }
+
+ u8dst = (uint8_t*)dst;
+
+ for (i = 0; i < len; i++) {
+ if (u8dst[i] != flash_area_erased_val(fa)) {
+ return 0;
+ }
+ }
+
+ return 1;
+}
diff --git a/platform/ext/target/arm/diphda/bl1/signing_layout.c.in b/platform/ext/target/arm/diphda/bl1/signing_layout.c.in
new file mode 100644
index 0000000..3d68c2b
--- /dev/null
+++ b/platform/ext/target/arm/diphda/bl1/signing_layout.c.in
@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2020-2021, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+#include "region_defs.h"
+/* Enumeration that is used by the assemble.py and imgtool.py scripts
+ * for correct binary generation when nested macros are used
+ */
+enum image_attributes {
+ RE_SECURE_IMAGE_OFFSET = BL2_IMAGE_OFFSET,
+ RE_SECURE_IMAGE_MAX_SIZE = BL2_IMAGE_MAX_SIZE,
+ RE_NON_SECURE_IMAGE_OFFSET = BL2_IMAGE_OFFSET + BL2_IMAGE_MAX_SIZE,
+ RE_NON_SECURE_IMAGE_MAX_SIZE = 0,
+#ifdef IMAGE_LOAD_ADDRESS
+ RE_IMAGE_LOAD_ADDRESS = BL2_IMAGE_LOAD_ADDRESS,
+#endif
+ RE_SIGN_BIN_SIZE = FLASH_AREA_@FLASH_AREA_NUM@_SIZE,
+};
diff --git a/platform/ext/target/arm/diphda/bl2_security_cnt.c b/platform/ext/target/arm/diphda/bl2_security_cnt.c
deleted file mode 100644
index 8175859..0000000
--- a/platform/ext/target/arm/diphda/bl2_security_cnt.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * Copyright (c) 2019-2021, Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- *
- */
-
-#include "bootutil/security_cnt.h"
-#include "tfm_plat_nv_counters.h"
-#include "tfm_plat_defs.h"
-#include "bootutil/fault_injection_hardening.h"
-#include <stdint.h>
-
-/* Counters for BL2 images. First 3 counters are used by PS service, 4th is
- * used by BL1. */
-#define TFM_BOOT_NV_COUNTER_0 4 /* NV counter of Image 0 */
-#define TFM_BOOT_NV_COUNTER_1 5 /* NV counter of Image 1 */
-#define TFM_BOOT_NV_COUNTER_2 6 /* NV counter of Image 2 */
-#define TFM_BOOT_NV_COUNTER_MAX 7
-
-static enum tfm_nv_counter_t get_nv_counter_from_image_id(uint32_t image_id)
-{
- uint32_t nv_counter;
-
- /* Avoid integer overflow */
- if ((UINT32_MAX - TFM_BOOT_NV_COUNTER_0) < image_id) {
- return TFM_BOOT_NV_COUNTER_MAX;
- }
-
- nv_counter = TFM_BOOT_NV_COUNTER_0 + image_id;
-
- /* Check the existence of the enumerated counter value */
- if (nv_counter >= TFM_BOOT_NV_COUNTER_MAX) {
- return TFM_BOOT_NV_COUNTER_MAX;
- }
-
- return (enum tfm_nv_counter_t)nv_counter;
-}
-
-fih_int boot_nv_security_counter_init(void)
-{
- fih_int fih_rc = FIH_FAILURE;
-
- fih_rc = fih_int_encode_zero_equality(tfm_plat_init_nv_counter());
-
- FIH_RET(fih_rc);
-}
-
-fih_int boot_nv_security_counter_get(uint32_t image_id, fih_int *security_cnt)
-{
- enum tfm_nv_counter_t nv_counter;
- fih_int fih_rc = FIH_FAILURE;
- uint32_t security_cnt_soft;
-
- /* Check if it's a null-pointer. */
- if (!security_cnt) {
- FIH_RET(FIH_FAILURE);
- }
-
- nv_counter = get_nv_counter_from_image_id(image_id);
- if (nv_counter == TFM_BOOT_NV_COUNTER_MAX) {
- FIH_RET(FIH_FAILURE);
- }
-
- fih_rc = fih_int_encode_zero_equality(
- tfm_plat_read_nv_counter(nv_counter,
- sizeof(security_cnt_soft),
- (uint8_t *)&security_cnt_soft));
- *security_cnt = fih_int_encode(security_cnt_soft);
-
- FIH_RET(fih_rc);
-}
-
-int32_t boot_nv_security_counter_update(uint32_t image_id,
- uint32_t img_security_cnt)
-{
- enum tfm_nv_counter_t nv_counter;
- enum tfm_plat_err_t err;
-
- nv_counter = get_nv_counter_from_image_id(image_id);
- if (nv_counter == TFM_BOOT_NV_COUNTER_MAX) {
- return -1;
- }
-
- err = tfm_plat_set_nv_counter(nv_counter, img_security_cnt);
- if (err != TFM_PLAT_ERR_SUCCESS) {
- return -1;
- }
-
- return 0;
-}
diff --git a/platform/ext/target/arm/diphda/config.cmake b/platform/ext/target/arm/diphda/config.cmake
index 083bcf5..db5ab66 100644
--- a/platform/ext/target/arm/diphda/config.cmake
+++ b/platform/ext/target/arm/diphda/config.cmake
@@ -5,16 +5,16 @@
#
#-------------------------------------------------------------------------------
+set(BL1 ON CACHE BOOL "Whether to build BL1")
set(BL2 ON CACHE BOOL "Whether to build BL2")
set(DEFAULT_MCUBOOT_FLASH_MAP OFF CACHE BOOL "Whether to use the default flash map defined by TF-M project")
-set(DEFAULT_MCUBOOT_SECURITY_COUNTERS OFF CACHE BOOL "Whether to use the default security counter configuration defined by TF-M project")
set(MCUBOOT_UPGRADE_STRATEGY "RAM_LOAD" CACHE STRING "Upgrade strategy when multiple boot images are loaded [OVERWRITE_ONLY, SWAP, DIRECT_XIP, RAM_LOAD]")
set(MCUBOOT_IMAGE_NUMBER 3 CACHE STRING "Number of images loaded by mcuboot")
set(TFM_MULTI_CORE_TOPOLOGY ON CACHE BOOL "Whether to build for a dual-cpu architecture")
set(TFM_PLAT_SPECIFIC_MULTI_CORE_COMM ON CACHE BOOL "Whether to use a platform specific inter core communication instead of mailbox in dual-cpu topology")
set(CRYPTO_HW_ACCELERATOR ON CACHE BOOL "Whether to enable the crypto hardware accelerator on supported platforms")
-set(CRYPTO_NV_SEED OFF CACHE BOOL "Use stored NV seed to provide entropy")
+set(CRYPTO_NV_SEED OFF CACHE BOOL "Use stored NV seed to provide entropy")
set(NS FALSE CACHE BOOL "Whether to build NS app")
# External dependency on OpenAMP and Libmetal
diff --git a/platform/ext/target/arm/diphda/partition/flash_layout.h b/platform/ext/target/arm/diphda/partition/flash_layout.h
index 5d6ba9d..65ed940 100644
--- a/platform/ext/target/arm/diphda/partition/flash_layout.h
+++ b/platform/ext/target/arm/diphda/partition/flash_layout.h
@@ -81,29 +81,27 @@
#define IMAGE_EXECUTABLE_RAM_SIZE (SRAM_SIZE - BL1_DATA_SIZE)
/* BL2 primary and secondary images */
-#define FLASH_AREA_0_ID (1)
-#define FLASH_AREA_0_OFFSET (0x50000)
-#define FLASH_AREA_0_SIZE (SE_BL2_PARTITION_SIZE)
+#define FLASH_AREA_8_ID (1)
+#define FLASH_AREA_8_OFFSET (0x50000)
+#define FLASH_AREA_8_SIZE (SE_BL2_PARTITION_SIZE)
-#define FLASH_AREA_1_ID (FLASH_AREA_0_ID + 1)
-#define FLASH_AREA_1_OFFSET (FLASH_AREA_0_OFFSET + FLASH_AREA_0_SIZE)
-#define FLASH_AREA_1_SIZE (SE_BL2_PARTITION_SIZE)
+#define FLASH_AREA_9_ID (FLASH_AREA_8_ID + 1)
+#define FLASH_AREA_9_OFFSET (FLASH_AREA_8_OFFSET + FLASH_AREA_8_SIZE)
+#define FLASH_AREA_9_SIZE (SE_BL2_PARTITION_SIZE)
/* Macros needed to imgtool.py, used when creating BL2 signed image */
-#define IMAGE_LOAD_ADDRESS (SRAM_BASE + TFM_PARTITION_SIZE + BL2_DATA_GAP_SIZE)
-#define SECURE_IMAGE_OFFSET (0x0)
-#define SECURE_IMAGE_MAX_SIZE (SE_BL2_PARTITION_SIZE)
-#define NON_SECURE_IMAGE_OFFSET (SE_BL2_PARTITION_SIZE)
-#define NON_SECURE_IMAGE_MAX_SIZE (0x0)
+#define BL2_IMAGE_LOAD_ADDRESS (SRAM_BASE + TFM_PARTITION_SIZE + BL2_DATA_GAP_SIZE)
+#define BL2_IMAGE_OFFSET (0x0)
+#define BL2_IMAGE_MAX_SIZE (SE_BL2_PARTITION_SIZE)
-#define FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_0_ID : \
- 255 )
-#define FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_1_ID : \
- 255 )
+#define BL1_FLASH_AREA_IMAGE_PRIMARY(x) (((x) == 0) ? FLASH_AREA_8_ID : \
+ 255 )
+#define BL1_FLASH_AREA_IMAGE_SECONDARY(x) (((x) == 0) ? FLASH_AREA_9_ID : \
+ 255 )
-#define FLASH_AREA_IMAGE_SCRATCH 255
+#define BL1_FLASH_AREA_IMAGE_SCRATCH 255
-#else
+#endif /* BL1 */
/* TF-M primary and secondary images */
#define FLASH_AREA_0_ID (1)
@@ -160,8 +158,6 @@
#define FLASH_AREA_IMAGE_SCRATCH 255
-#endif /* BL1 */
-
#define FLASH_SECTOR_SIZE (PMOD_SF3_FLASH_SECTOR_SIZE) /* 1 kB */
#define FLASH_ITS_AREA_OFFSET (0)
diff --git a/platform/ext/target/arm/diphda/partition/region_defs.h b/platform/ext/target/arm/diphda/partition/region_defs.h
index 2369fc5..6091cd6 100644
--- a/platform/ext/target/arm/diphda/partition/region_defs.h
+++ b/platform/ext/target/arm/diphda/partition/region_defs.h
@@ -94,16 +94,7 @@
#define BL1_CODE_SIZE (0x00020000) /* Whole SE ROM, 128 KiB */
#define BL1_CODE_LIMIT (BL2_CODE_START + BL2_CODE_SIZE - 1)
-#ifndef BL1
-/* Shared data area between bootloader and runtime firmware.
- * Shared data area is allocated at the beginning of the privileged data area,
- * it is overlapping with TF-M Secure code's MSP stack
- */
#define BOOT_TFM_SHARED_DATA_BASE (S_DATA_PRIV_START)
-#else
-/* Shared data area between BL1 and BL2 */
-#define BOOT_TFM_SHARED_DATA_BASE (BL1_DATA_START + BL1_DATA_SIZE)
-#endif
#define BOOT_TFM_SHARED_DATA_LIMIT (BOOT_TFM_SHARED_DATA_BASE + \
BOOT_TFM_SHARED_DATA_SIZE - 1)