Log - aaa0567c38ea6f08d68ce64210800b51a8872c13 - sandbox/pfalcon/trusted-firmware-a

2ee2c4f Tegra132: set TZDRAM_BASE to 0xF5C00000 by Varun Wadekar · 10 years ago
0bf1b02 Tegra: retrieve BL32's bootargs from bl32_ep_info by Varun Wadekar · 10 years ago
42ca2d8 Tegra210: enable WRAP to INCR burst type conversions by Varun Wadekar · 10 years ago
1f95e28 Tegra: modify 'BUILD_PLAT' to point to soc specific build dirs by Varun Wadekar · 10 years ago
e7d4caa Tegra: Support for Tegra's T132 platforms by Varun Wadekar · 10 years ago
93eafbc Tegra: implement per-SoC validate_power_state() handler by Varun Wadekar · 10 years ago
fb11a62 Tegra: T210: include CPU files from SoC's platform.mk by Varun Wadekar · 10 years ago
8061a97 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · 10 years ago
e5b0664 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · 10 years ago
764c57f Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · 10 years ago
2e7aea3 Tegra: PMC: check if a CPU is already online by Varun Wadekar · 10 years ago
03cd23a Tegra210: deassert CPU reset signals during power on by Varun Wadekar · 10 years ago
6a367fd Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · 10 years ago
c896132 Tegra: introduce delay timer support by Varun Wadekar · 10 years ago
68e2a64 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · 10 years ago
94c672e Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · 10 years ago
e1e094c Add missing features to the Tegra GIC driver by Varun Wadekar · 10 years ago
09aa039 Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · 10 years ago
9a96451 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · 10 years ago
dc7fdad Boot Trusted OS' on Tegra SoCs by Varun Wadekar · 10 years ago
08438e2 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · 10 years ago