Merge changes Ie650728a,Ie2736ef4 into integration
* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on DHCOM
diff --git a/fdts/stm32mp131.dtsi b/fdts/stm32mp131.dtsi
index decd812..e4d9d3b 100644
--- a/fdts/stm32mp131.dtsi
+++ b/fdts/stm32mp131.dtsi
@@ -383,7 +383,7 @@
status = "disabled";
};
- ddr: ddr@5a003000{
+ ddr: ddr@5a003000 {
compatible = "st,stm32mp13-ddr";
reg = <0x5a003000 0x550>, <0x5a004000 0x234>;
clocks = <&rcc AXIDCG>,
diff --git a/fdts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi b/fdts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi
index d9f7a1a..ff184c2 100644
--- a/fdts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi
+++ b/fdts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi
@@ -101,20 +101,8 @@
#define DDR_ODTCR 0x00010000
#define DDR_ZQ0CR1 0x00000038
#define DDR_DX0GCR 0x0000CE81
-#define DDR_DX0DLLCR 0x40000000
-#define DDR_DX0DQTR 0xFFFFFFFF
-#define DDR_DX0DQSTR 0x3DB02000
#define DDR_DX1GCR 0x0000CE81
-#define DDR_DX1DLLCR 0x40000000
-#define DDR_DX1DQTR 0xFFFFFFFF
-#define DDR_DX1DQSTR 0x3DB02000
#define DDR_DX2GCR 0x0000CE81
-#define DDR_DX2DLLCR 0x40000000
-#define DDR_DX2DQTR 0xFFFFFFFF
-#define DDR_DX2DQSTR 0x3DB02000
#define DDR_DX3GCR 0x0000CE81
-#define DDR_DX3DLLCR 0x40000000
-#define DDR_DX3DQTR 0xFFFFFFFF
-#define DDR_DX3DQSTR 0x3DB02000
#include "stm32mp15-ddr.dtsi"
diff --git a/fdts/stm32mp15-pinctrl.dtsi b/fdts/stm32mp15-pinctrl.dtsi
index d74dc2b..1b5fbc6 100644
--- a/fdts/stm32mp15-pinctrl.dtsi
+++ b/fdts/stm32mp15-pinctrl.dtsi
@@ -114,7 +114,7 @@
drive-push-pull;
bias-pull-up;
};
- pins2{
+ pins2 {
pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
bias-pull-up;
};
diff --git a/fdts/stm32mp151.dtsi b/fdts/stm32mp151.dtsi
index 20071fe..575d61e 100644
--- a/fdts/stm32mp151.dtsi
+++ b/fdts/stm32mp151.dtsi
@@ -360,7 +360,7 @@
status = "disabled";
};
- ddr: ddr@5a003000{
+ ddr: ddr@5a003000 {
compatible = "st,stm32mp1-ddr";
reg = <0x5A003000 0x550 0x5A004000 0x234>;
clocks = <&rcc AXIDCG>,
diff --git a/fdts/stm32mp15xx-dhcom-som.dtsi b/fdts/stm32mp15xx-dhcom-som.dtsi
index 3241ea9..3021ef8 100644
--- a/fdts/stm32mp15xx-dhcom-som.dtsi
+++ b/fdts/stm32mp15xx-dhcom-som.dtsi
@@ -23,11 +23,11 @@
};
};
-&cpu0{
+&cpu0 {
cpu-supply = <&vddcore>;
};
-&cpu1{
+&cpu1 {
cpu-supply = <&vddcore>;
};
diff --git a/fdts/stm32mp15xx-dkx.dtsi b/fdts/stm32mp15xx-dkx.dtsi
index 05eb46a..74e529d 100644
--- a/fdts/stm32mp15xx-dkx.dtsi
+++ b/fdts/stm32mp15xx-dkx.dtsi
@@ -33,11 +33,11 @@
st,digbypass;
};
-&cpu0{
+&cpu0 {
cpu-supply = <&vddcore>;
};
-&cpu1{
+&cpu1 {
cpu-supply = <&vddcore>;
};
diff --git a/fdts/stm32mp15xx-osd32.dtsi b/fdts/stm32mp15xx-osd32.dtsi
index ca67235..c7ddc92 100644
--- a/fdts/stm32mp15xx-osd32.dtsi
+++ b/fdts/stm32mp15xx-osd32.dtsi
@@ -167,11 +167,11 @@
st,digbypass;
};
-&cpu0{
+&cpu0 {
cpu-supply = <&vddcore>;
};
-&cpu1{
+&cpu1 {
cpu-supply = <&vddcore>;
};