rk3399: dram: use PMU M0 to do ddr frequency scaling
We used dcf do ddr frequency scaling, but we just include a dcf
binary, it hard to maintain later, we have M0 compile flow in ATF,
and M0 can also work for ddr frequency scaling, so let's use it.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
diff --git a/plat/rockchip/rk3399/drivers/soc/soc.c b/plat/rockchip/rk3399/drivers/soc/soc.c
index d74a6cd..7131b89 100644
--- a/plat/rockchip/rk3399/drivers/soc/soc.c
+++ b/plat/rockchip/rk3399/drivers/soc/soc.c
@@ -34,10 +34,10 @@
#include <dfs.h>
#include <dram.h>
#include <mmio.h>
+#include <m0_ctl.h>
#include <platform_def.h>
#include <plat_private.h>
#include <rk3399_def.h>
-#include <rk3399m0.h>
#include <soc.h>
/* Table of regions to map using the MMU. */
@@ -456,20 +456,6 @@
;
}
-static void soc_m0_init(void)
-{
- /* secure config for pmu M0 */
- mmio_write_32(SGRF_BASE + SGRF_PMU_CON(0), WMSK_BIT(7));
-
- /* set the execute address for M0 */
- mmio_write_32(SGRF_BASE + SGRF_PMU_CON(3),
- BITS_WITH_WMASK((M0_BINCODE_BASE >> 12) & 0xffff,
- 0xffff, 0));
- mmio_write_32(SGRF_BASE + SGRF_PMU_CON(7),
- BITS_WITH_WMASK((M0_BINCODE_BASE >> 28) & 0xf,
- 0xf, 0));
-}
-
void plat_rockchip_soc_init(void)
{
secure_timer_init();
@@ -477,7 +463,7 @@
sgrf_init();
soc_global_soft_reset_init();
plat_rockchip_gpio_init();
- soc_m0_init();
+ m0_init();
dram_init();
dram_dfs_init();
}