commit 1438a5e729e894eb9358732f20641800d956fc6a
author Lauren Wehrmeister <lauren.wehrmeister@arm.com> Thu Sep 21 17:28:07 2023 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Thu Sep 21 17:28:07 2023 +0200
tree 1e6963e070cd6236e3cc23250cebe5d821e787da
parent aadb759a5ab6761a5d18c7f1849ef21c7fe5d987
parent 67a2ad171d1fb604d4cba8fa7f92ccb66d1ef3f9

Merge "fix(cpus): update the fix for Cortex-A78AE erratum 1941500" into integration

lib/cpus/aarch64/cortex_a78_ae.S

diff --git a/lib/cpus/aarch64/cortex_a78_ae.S b/lib/cpus/aarch64/cortex_a78_ae.S
index 9f729c1..94f6465 100644
--- a/lib/cpus/aarch64/cortex_a78_ae.S
+++ b/lib/cpus/aarch64/cortex_a78_ae.S
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
- * Copyright (c) 2021-2022, NVIDIA Corporation. All rights reserved.
+ * Copyright (c) 2021-2023, NVIDIA Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -23,7 +23,7 @@
 #endif /* WORKAROUND_CVE_2022_23960 */
 
 workaround_reset_start cortex_a78_ae, ERRATUM(1941500), ERRATA_A78_AE_1941500
-	sysreg_bit_clear CORTEX_A78_AE_CPUECTLR_EL1, CORTEX_A78_AE_CPUECTLR_EL1_BIT_8
+	sysreg_bit_set CORTEX_A78_AE_CPUECTLR_EL1, CORTEX_A78_AE_CPUECTLR_EL1_BIT_8
 workaround_reset_end cortex_a78_ae, ERRATUM(1941500)
 
 check_erratum_ls cortex_a78_ae, ERRATUM(1941500), CPU_REV(0, 1)