- 52ed157 fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS) by Sieu Mun Tang · 3 years, 5 months ago
- 52cf9c2 feat(intel): add SMC support for HWMON voltage and temp sensor by Kris Chaplin · 4 years, 1 month ago
- 93a5b97 feat(intel): add SMC support for Get USERCODE by Sieu Mun Tang · 3 years, 3 months ago
- c026dfe fix(intel): extend SDM command to return the SDM firmware version by Sieu Mun Tang · 3 years, 3 months ago
- c34b2a7 feat(intel): add SMC for enquiring firmware version by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 6 months ago
- e40910e fix(intel): configuration status based on start request by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 7 months ago
- 276a436 fix(intel): bit-wise configuration flag handling by Sieu Mun Tang · 3 years, 3 months ago
- 07915a4 fix(intel): get config status OK status by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
- e0fc2d1 fix(intel): use macro as return value by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
- ef51b09 fix(intel): fix fpga config write return mechanism by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
- 984e236 feat(intel): add SiP service for DCMF status by Sieu Mun Tang · 3 years, 3 months ago
- 4c26957 feat(intel): add RSU 'Max Retry' SiP SMC services by Chee Hong Ang · 5 years ago
- b7f3044 feat(intel): enable SMC SoC FPGA bridges enable/disable by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 44eb782 feat(intel): add SMC/PSCI services for DCMF version support by Chee Hong Ang · 5 years ago
- 7e954df feat(intel): allow to access all register addresses if DEBUG=1 by Siew Chin Lim · 4 years, 3 months ago
- ec4f28e fix(intel): modify how configuration type is handled by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- f0c40b8 feat(intel): support SiP SVC version by Sieu Mun Tang · 3 years, 3 months ago
- ae19fef feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- afa0b1a feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- bc1a573 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 447e699 feat(intel): add macro to switch between different UART PORT by Boon Khai Ng · 4 years ago
- 77902fc feat(intel): add SMC support for ROM Patch SHA384 mailbox by Sieu Mun Tang · 3 years, 5 months ago
- 39f262c build(intel): enable access to on-chip ram in BL31 for N5X by Boon Khai Ng · 4 years, 3 months ago
- f571183 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · 3 years, 5 months ago
- c703d75 fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · 3 years, 5 months ago
- 1f1c020 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 325eb35 build(intel): add N5X as a new Intel platform by Sieu Mun Tang · 3 years, 5 months ago
- 286b96f build(intel): initial commit for crypto driver by Sieu Mun Tang · 3 years, 5 months ago
- f83de3b Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration by Madhukar Pappireddy · 3 years, 5 months ago
- a250c04 fix(intel): null pointer handling for resp_len by Sieu Mun Tang · 3 years, 6 months ago
- 7db1895 fix(intel): define macros to handle buffer entries by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 108514f fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD by Sieu Mun Tang · 3 years, 6 months ago
- e93551b fix(intel): always set doorbell to SDM after sending command by Siew Chin Lim · 4 years ago
- c9c0709 fix(intel): fix bit masking issue in intel_secure_reg_update by Siew Chin Lim · 4 years, 1 month ago
- 12d71ac fix(intel): fix ddr address range checker by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 000267b fix(intel): enable HPS QSPI access by default by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 10 months ago
- d57318b intel: common: Fix non-MISRA compliant code v2 by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 10 months ago
- 9e28590 intel: mailbox: Fix non-MISRA compliant code by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 9975604 intel: mailbox: Mailbox error recovery handling by Chee Hong Ang · 5 years ago
- d14e965 intel: mailbox: Enable sending large mailbox command by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 4978bc2 intel: mailbox: Use retry count in mailbox poll by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- d96e7cd intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · 5 years ago
- 6d9f9f5 intel: mailbox: Read mailbox response even there is an error by Chee Hong Ang · 5 years ago
- 39aebd3 intel: mailbox: Driver now handles larger response by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- aad868b intel: common: Change how mailbox handles job id & buffer by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 941fc5c intel: common: Improve readability of mailbox read response by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 1ae7b6f intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB by Richard Gong · 5 years ago
- d191eb2 intel: common: Remove urgent from mailbox async by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- f8e6a09 intel: common: Improve mailbox driver readability by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 516f322 intel: common: Clean up mailbox and sip header by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 7f56f24 intel: clear 'PLAT_SEC_ENTRY' in early platform setup by Chee Hong Ang · 5 years ago
- 811af8b plat: intel: Additional instruction required to enable global timer by Tien Hock Loh · 5 years ago
- 27cd1a4 plat: intel: Fix CCU initialization for Agilex by Tien Hock Loh · 5 years ago
- e734ecd plat: intel: Add FPGAINTF configuration to when configuring pinmux by Tien Hock Loh · 5 years ago
- aea772d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · 5 years ago
- 351d358 Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration by Sandrine Bailleux · 5 years ago
- 8f74c88 Merge "intel: Fix argument type for mailbox driver" into integration by Sandrine Bailleux · 5 years ago
- 960896e intel: Update RSU driver return code by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- ea9b962 intel: Fix argument type for mailbox driver by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- d603fd3 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · 6 years ago
- eda880f Merge "intel: Fix Coverity Scan Defects" into integration by Sandrine Bailleux · 5 years ago
- a62b47b intel: Fix Coverity Scan Defects by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 78fcbd6 Merge "intel: Change boot source selection" into integration by Sandrine Bailleux · 5 years ago
- 1a87db5 intel: Include address range check for SiP Mailbox by Abdul Halim, Muhammad Hadi Asyrafi · 5 years ago
- 0c5d62a intel: Introduce SMC support for mailbox command by Hadi Asyrafi · 6 years ago
- e1f97d9 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · 6 years ago
- 77fc469 intel: Change boot source selection by Hadi Asyrafi · 6 years ago
- ca661a0 Enable -Wredundant-decls warning check by Madhukar Pappireddy · 6 years ago
- dc2d366 intel: Unify Platform specific defines for PSCI module by Deepika Bhavnani · 6 years ago
- f2decc7 intel: Add function to check fpga readiness by Hadi Asyrafi · 6 years ago
- 9c8f3af intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · 6 years ago
- dfdd38c intel: FPGA config_isdone() status query by Hadi Asyrafi · 6 years ago
- 20335ca intel: System Manager refactoring by Hadi Asyrafi · 6 years ago
- 391eeee intel: Refactor reset manager driver by Hadi Asyrafi · 6 years ago
- 5d3ee07 Merge "plat: intel: Fix UEFI decompression issue" into integration by Manish Pandey · 6 years ago
- 389091a plat: intel: Fix UEFI decompression issue by Tien Hock, Loh · 6 years ago
- e5ebe87 intel: Change all global sip function to static by Hadi Asyrafi · 6 years ago
- e9ed7fa Merge changes from topic "sip-svc" into integration by Manish Pandey · 6 years ago
- f6c4b19 intel: Remove un-needed checks for qspi driver r/w by Hadi Asyrafi · 6 years ago
- 32cf34a intel: Implement platform specific system reset 2 by Hadi Asyrafi · 6 years ago
- 13d33d5 intel: Enable SiP SMC secure register access by Hadi Asyrafi · 6 years ago
- aeb3d83 Merge changes from topic "mailbox-fixes" into integration by Manish Pandey · 6 years ago
- 98ee29c Merge "intel: Create SiP service header file" into integration by Manish Pandey · 6 years ago
- 7c58fd4 intel: Fix SMC SIP service by Hadi Asyrafi · 6 years ago
- 96612fc intel: Introduce mailbox response length handling by Hadi Asyrafi · 6 years ago
- b68ba6c intel: Fix mailbox config return status by Hadi Asyrafi · 6 years ago
- 8014a53 intel: Mailbox driver logic fixes by Hadi Asyrafi · 6 years ago
- cefb37e plat: intel: Fix FPGA manager on reconfiguration by Tien Hock, Loh · 6 years ago
- 68dd5e1 plat: intel: Fix mailbox send_cmd issue by Tien Hock, Loh · 6 years ago
- 23f31d3 intel: stratix10: Modify BL31 parameter handling by Hadi Asyrafi · 6 years ago
- cf82aff intel: Modify BL31 address mapping by Hadi Asyrafi · 6 years ago
- 2db1e76 intel: stratix10: Enable uboot entrypoint support by Hadi Asyrafi · 6 years ago
- ec7d005 intel: Modify mailbox's get_config_status by Hadi Asyrafi · 6 years ago
- d25041b intel: Create SiP service header file by Hadi Asyrafi · 6 years ago
- 1520b5d intel: Refactor common platform code [5/5] by Hadi Asyrafi · 6 years ago
- c76d423 intel: Refactor common platform code [4/5] by Hadi Asyrafi · 6 years ago
- d09adcb intel: Refactor common platform code [3/5] by Hadi Asyrafi · 6 years ago
- e9b5e36 intel: Refactor common platform code [2/5] by Hadi Asyrafi · 6 years ago
- 328718f intel: Refactor common platform code [1/5] by Hadi Asyrafi · 6 years ago
- 3f7b149 intel: Platform common code refactor by Hadi Asyrafi · 6 years ago