1. 52010cc Rationalize reset handling code by Sandrine Bailleux · 10 years ago
  2. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  3. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 11 years ago
  4. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 11 years ago
  5. ab8707e Remove coherent memory from the BL memory maps by Soby Mathew · 11 years ago
  6. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 11 years ago
  7. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  8. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago
  9. 0c8d4fe Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 11 years ago
  10. 53fdceb Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 11 years ago
  11. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 11 years ago
  12. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 11 years ago
  13. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 11 years ago
  14. 754a2b7 Remove coherent stack usage from the cold boot path by Achin Gupta · 11 years ago
  15. dac1235 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 11 years ago
  16. 03396c4 Simplify entry point information generation code on FVP by Vikram Kanigiri · 11 years ago
  17. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 11 years ago
  18. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 11 years ago
  19. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 11 years ago
  20. dbad1ba Add support for BL3-1 as a reset vector by Vikram Kanigiri · 11 years ago
  21. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago
  22. 29fb905 Rework handover interface between BL stages by Vikram Kanigiri · 11 years ago
  23. 401607c Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · 11 years ago
  24. c3260f9 Preserve x19-x29 across world switch for exception handling by Soby Mathew · 11 years ago
  25. 7935d0a Access system registers directly in assembler by Andrew Thoelke · 11 years ago
  26. 8cec598 Correct usage of data and instruction barriers by Andrew Thoelke · 11 years ago
  27. 97043ac Reduce deep nesting of header files by Dan Handley · 11 years ago
  28. 35e98e5 Make use of user/system includes more consistent by Dan Handley · 11 years ago
  29. 0a30cf5 Place assembler functions in separate sections by Andrew Thoelke · 11 years ago
  30. 35ca351 Add support for BL3-2 in BL3-1 by Achin Gupta · 11 years ago
  31. e4d084e Rework BL2 to BL3-1 hand over interface by Achin Gupta · 11 years ago
  32. caa8493 Add support for handling runtime service requests by Jeenu Viswambharan · 12 years ago
  33. b739f22 Setup VBAR_EL3 incrementally by Achin Gupta · 12 years ago
  34. 3a4cae0 Change comments in assembler files to help ctags by Jeenu Viswambharan · 12 years ago
  35. 4f60368 Do not trap access to floating point registers by Harry Liebel · 12 years ago
  36. e83b0ca Update year in copyright text to 2014 by Dan Handley · 12 years ago
  37. 93ca221 Make BL31's ns_entry_info a single-cpu area by Sandrine Bailleux · 12 years ago
  38. ba6980a Move RUN_IMAGE constant from bl1.h to bl_common.h by Sandrine Bailleux · 12 years ago
  39. ab2d31e Enable third party contributions by Dan Handley · 12 years ago
  40. 65f546a Properly initialise the C runtime environment by Sandrine Bailleux · 12 years ago
  41. 8d69a03 Various improvements/cleanups on the linker scripts by Sandrine Bailleux · 12 years ago
  42. c10bd2c Move generic architectural setup out of blx_plat_arch_setup(). by Sandrine Bailleux · 12 years ago
  43. 4f6ad66 ARMv8 Trusted Firmware release v0.2 by Achin Gupta · 12 years ago v0.2