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review.trustedfirmware.org / sandbox / arthur / trustedfirmware-a / 23fc05a33d2bd67d25e20b51f68e18872d761608 / bl31 / aarch64 / bl31_entrypoint.S
  1. 3e14df6 fix(bl31): avoid clearing of argument registers in RESET_TO_BL31 case by Manish V Badarkhe · 2 years, 6 months ago
  2. 3eb8cd6 Revert "feat(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS" by Manish V Badarkhe · 2 years, 6 months ago
  3. 25844ff feat(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS by Jorge Ramirez-Ortiz · 3 years, 4 months ago
  4. f19dc62 refactor(gpt): productize and refactor GPT library by johpow01 · 4 years, 2 months ago
  5. 1839012 feat(rme): add GPT Library by Zelalem Aweke · 4 years, 1 month ago
  6. c367b75 Changes necessary to support SEPARATE_NOBITS_REGION feature by Madhukar Pappireddy · 6 years ago
  7. 3b5454e Revert "Changes necessary to support SEPARATE_NOBITS_REGION feature" by Mark Dykes · 6 years ago
  8. 76d84cb Changes necessary to support SEPARATE_NOBITS_REGION feature by Madhukar Pappireddy · 6 years ago
  9. 0531ada pmf: Make the runtime instrumentation work on AArch32 by Bence Szépkúti · 6 years ago
  10. da90359 PIE: make call to GDT relocation fixup generalized by Manish Pandey · 6 years ago
  11. ed108b5 Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 6 years ago
  12. 9fc5963 Add support for Branch Target Identification by Alexei Fedorov · 6 years ago
  13. 330ead8 PIE: Fix reloc at the beginning of bl31 entrypoint by Louis Mayencourt · 6 years ago
  14. 7dcbb4f BL31: Enable pointer authentication support in warm boot path by Alexei Fedorov · 6 years ago
  15. 88cfd9a BL31: Enable pointer authentication support by Antonio Nino Diaz · 7 years ago
  16. 09d40e0 Sanitise includes across codebase by Antonio Nino Diaz · 7 years ago
  17. 931f7c6 PIE: Position Independant Executable support for BL31 by Soby Mathew · 7 years ago
  18. 81542c0 Remove some MISRA defects in common code by Antonio Nino Diaz · 7 years ago
  19. 64ee263 DynamIQ: Enable MMU without using stack by Jeenu Viswambharan · 7 years ago
  20. c69145f Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatch by davidcunado-arm · 7 years ago
  21. 883d1b5 Add comments about mismatched TCR_ELx and xlat tables by Antonio Nino Diaz · 7 years ago
  22. a6f340f Introduce the new BL handover interface by Soby Mathew · 8 years ago
  23. 18f2efd Fully initialise essential control registers by David Cunado · 8 years ago
  24. 82cb2c1 Use SPDX license identifiers by dp-arm · 8 years ago
  25. bcc3c49 PSCI: Build option to enable D-Caches early in warmboot by Soby Mathew · 8 years ago
  26. 510a9de Merge pull request #860 from jeenu-arm/hw-asstd-coh by davidcunado-arm · 8 years ago
  27. d50ece0 Simplify translation tables headers dependencies by Antonio Nino Diaz · 8 years ago
  28. 25a93f7 Enable data caches early with hardware-assisted coherency by Jeenu Viswambharan · 9 years ago
  29. 872be88 Add PMF instrumentation points in TF by dp-arm · 9 years ago
  30. cf0b149 Introduce PSCI Library Interface by Soby Mathew · 9 years ago
  31. d178637 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 10 years ago
  32. a9bec67 Introduce COLD_BOOT_SINGLE_CPU build option by Sandrine Bailleux · 10 years ago
  33. 54dc71e Make generic code work in presence of system caches by Achin Gupta · 10 years ago
  34. bf031bb Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 10 years ago
  35. 52010cc Rationalize reset handling code by Sandrine Bailleux · 10 years ago
  36. 8b77962 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  37. 12e7c4a Initialise cpu ops after enabling data cache by Vikram Kanigiri · 11 years ago
  38. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 11 years ago
  39. ab8707e Remove coherent memory from the BL memory maps by Soby Mathew · 11 years ago
  40. 4480425 Miscellaneous documentation fixes by Sandrine Bailleux · 11 years ago
  41. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  42. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago
  43. 0c8d4fe Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 11 years ago
  44. 53fdceb Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 11 years ago
  45. 6397bf6 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 11 years ago
  46. 626ed51 Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 11 years ago
  47. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 11 years ago
  48. 754a2b7 Remove coherent stack usage from the cold boot path by Achin Gupta · 11 years ago
  49. dac1235 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 11 years ago
  50. 03396c4 Simplify entry point information generation code on FVP by Vikram Kanigiri · 11 years ago
  51. ee94cc6 Remove early_exceptions from BL3-1 by Andrew Thoelke · 11 years ago
  52. 5e91007 Per-cpu data cache restructuring by Andrew Thoelke · 11 years ago
  53. dce74b8 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 11 years ago
  54. dbad1ba Add support for BL3-1 as a reset vector by Vikram Kanigiri · 11 years ago
  55. 4112bfa Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago
  56. 29fb905 Rework handover interface between BL stages by Vikram Kanigiri · 11 years ago
  57. 401607c Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · 11 years ago
  58. c3260f9 Preserve x19-x29 across world switch for exception handling by Soby Mathew · 11 years ago
  59. 7935d0a Access system registers directly in assembler by Andrew Thoelke · 11 years ago
  60. 8cec598 Correct usage of data and instruction barriers by Andrew Thoelke · 11 years ago
  61. 97043ac Reduce deep nesting of header files by Dan Handley · 11 years ago
  62. 35e98e5 Make use of user/system includes more consistent by Dan Handley · 11 years ago
  63. 0a30cf5 Place assembler functions in separate sections by Andrew Thoelke · 11 years ago
  64. 35ca351 Add support for BL3-2 in BL3-1 by Achin Gupta · 11 years ago
  65. e4d084e Rework BL2 to BL3-1 hand over interface by Achin Gupta · 11 years ago
  66. caa8493 Add support for handling runtime service requests by Jeenu Viswambharan · 12 years ago
  67. b739f22 Setup VBAR_EL3 incrementally by Achin Gupta · 12 years ago
  68. 3a4cae0 Change comments in assembler files to help ctags by Jeenu Viswambharan · 12 years ago
  69. 4f60368 Do not trap access to floating point registers by Harry Liebel · 12 years ago
  70. e83b0ca Update year in copyright text to 2014 by Dan Handley · 12 years ago
  71. 93ca221 Make BL31's ns_entry_info a single-cpu area by Sandrine Bailleux · 12 years ago
  72. ba6980a Move RUN_IMAGE constant from bl1.h to bl_common.h by Sandrine Bailleux · 12 years ago
  73. ab2d31e Enable third party contributions by Dan Handley · 12 years ago
  74. 65f546a Properly initialise the C runtime environment by Sandrine Bailleux · 12 years ago
  75. 8d69a03 Various improvements/cleanups on the linker scripts by Sandrine Bailleux · 12 years ago
  76. c10bd2c Move generic architectural setup out of blx_plat_arch_setup(). by Sandrine Bailleux · 12 years ago
  77. 4f6ad66 ARMv8 Trusted Firmware release v0.2 by Achin Gupta · 12 years ago v0.2