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review.trustedfirmware.org / sandbox / arthur / trustedfirmware-a / 1ad9f93e8da8245237b01bea23b0a61bd42be9b8 / include / lib
  1. 81b491f Merge pull request #595 from sandrine-bailleux-arm/sb/unoptimised-build by danh-arm · 9 years ago
  2. 10c252c Fix build error with optimizations disabled (-O0) by Sandrine Bailleux · 9 years ago
  3. 3ca9928 Refactor the xlat_tables library code by Soby Mathew · 9 years ago
  4. c291641 Merge pull request #577 from antonio-nino-diaz-arm/an/remove-xlat-helpers by danh-arm · 9 years ago
  5. f33fbb2 Remove xlat_helpers.c by Antonio Nino Diaz · 9 years ago
  6. 6b836cf Add ISR_EL1 to crash report by Gerald Lejeune · 9 years ago
  7. 4ca5753 Remove DAIF bits handling macros by Gerald Lejeune · 9 years ago
  8. 5f65497 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · 9 years ago
  9. 85df7e4 Merge pull request #523 from jcastillo-arm/jc/genfw-791 by danh-arm · 9 years ago
  10. 74eb26e ARM platforms: rationalise memory attributes of shared memory by Juan Castillo · 10 years ago
  11. 54035fc Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 10 years ago
  12. 65cd299 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · 10 years ago
  13. 820756e9 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 10 years ago
  14. d178637 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 10 years ago
  15. 85d80e5 Initialize VTTBR_EL2 when bypassing EL2 by Sandrine Bailleux · 10 years ago
  16. df37373 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · 10 years ago
  17. 4a1dcde Merge pull request #435 from sandrine-bailleux/sb/juno-r2 by Achin Gupta · 10 years ago
  18. 1dbe315 Juno R2: Configure the correct L2 RAM latency values by Sandrine Bailleux · 10 years ago
  19. 6cd12da Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · 10 years ago
  20. c17a4dc Make CASSERT() macro callable from anywhere by Sandrine Bailleux · 10 years ago
  21. 54dc71e Make generic code work in presence of system caches by Achin Gupta · 10 years ago
  22. ee7b35c Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · 10 years ago
  23. e0d913c Add macros for retention control in Cortex-A53/A57 by Varun Wadekar · 10 years ago
  24. 6b0d97b cortex_a53: Add A53 errata #826319, #836870 by Jimmy Huang · 10 years ago
  25. fd904df Add mmio utility functions by Jimmy Huang · 10 years ago
  26. 3a8c55f Add "Project Denver" CPU support by Varun Wadekar · 10 years ago
  27. e2bf57f Add header guards to asm macro files by Dan Handley · 10 years ago
  28. ce4c820 Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · 10 years ago
  29. cd31914 Merge pull request #277 from soby-mathew/sm/coh_lock_opt by danh-arm · 10 years ago
  30. 874cd37 Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · 10 years ago
  31. 6e159e7 Translate secure/non-secure virtual addresses by Varun Wadekar · 10 years ago
  32. 548579f Remove the `owner` field in bakery_lock_t data structure by Soby Mathew · 10 years ago
  33. 1c9573a Optimize the bakery lock structure for coherent memory by Soby Mathew · 10 years ago
  34. 27a51c7 Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · 10 years ago
  35. 1ba93ae Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 10 years ago
  36. 4991ecd Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · 10 years ago
  37. 79a97b2 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 11 years ago
  38. 22f0897 Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · 11 years ago
  39. 8c5fe0b Move bakery algorithm implementation out of coherent memory by Soby Mathew · 11 years ago
  40. 5b1cd43 Add macros for domain specific barriers. by Soby Mathew · 11 years ago
  41. 36e2fd0 Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · 11 years ago
  42. 235585b Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 11 years ago
  43. 7395a72 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 11 years ago
  44. d07baec Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 11 years ago
  45. d0ecd97 Create BL stage specific translation tables by Soby Mathew · 11 years ago
  46. ae213ce Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 11 years ago
  47. 14c0526 Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 11 years ago
  48. 01b916b Juno: Implement initial platform port by Sandrine Bailleux · 11 years ago
  49. d9bdaf2 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 11 years ago
  50. d3f70af Add CPU specific crash reporting handlers by Soby Mathew · 11 years ago
  51. add4035 Add CPU specific power management operations by Soby Mathew · 11 years ago
  52. 9b47684 Introduce framework for CPU specific operations by Soby Mathew · 11 years ago
  53. 935db69 Move IO storage source to drivers directory by Dan Handley · 11 years ago
  54. ec3c100 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 11 years ago
  55. afff8cb Make enablement of the MMU more flexible by Achin Gupta · 11 years ago
  56. 73ad257 Calculate TCR bits based on VA and PA by Lin Ma · 11 years ago
  57. 5e0f9bd Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · 11 years ago
  58. e73af8a Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · 11 years ago
  59. 7eea135 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · 11 years ago
  60. 5e11375 Inline the mmio accessor functions by Andrew Thoelke · 11 years ago
  61. 4f2104f Remove all checkpatch errors from codebase by Juan Castillo · 11 years ago
  62. 634ec6c Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · 11 years ago
  63. 167a935 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 11 years ago
  64. 5c633bd Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · 11 years ago
  65. 5c3272a Make system register functions inline assembly by Andrew Thoelke · 11 years ago
  66. f984ce8 Enable mapping higher physical address by Lin Ma · 11 years ago
  67. dff8e47 Add enable mmu platform porting interfaces by Dan Handley · 11 years ago for-v0.4-rc0
  68. 5f0cdb0 Split platform.h into separate headers by Dan Handley · 11 years ago
  69. c6bc071 Remove extern keyword from function declarations by Dan Handley · 11 years ago
  70. fa9c08b Use secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  71. c429b5e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  72. 23ff9ba Introduce macros to manipulate the SPSR by Vikram Kanigiri · 11 years ago
  73. a43d431 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  74. b3254e8 Introduce IS_IN_ELX() macros by Sandrine Bailleux · 11 years ago
  75. 228a9f0 Remove unused or invalid asm helper functions by Andrew Thoelke · 11 years ago
  76. 2f5dcfe Replace disable_mmu with assembler version by Andrew Thoelke · 11 years ago
  77. 625de1d Remove variables from .data section by Dan Handley · 11 years ago
  78. 97043ac Reduce deep nesting of header files by Dan Handley · 11 years ago
  79. fb037bf Always use named structs in header files by Dan Handley · 11 years ago
  80. 5b827a8 Separate BL functions out of arch.h by Dan Handley · 11 years ago
  81. bdbfc3c Separate out CASSERT macro into own header by Dan Handley · 11 years ago
  82. 4ecca33 Move include and source files to logical locations by Dan Handley · 11 years ago